From patchwork Thu Dec 8 03:02:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liu Peibao X-Patchwork-Id: 13067850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D0D0C4708E for ; Thu, 8 Dec 2022 03:03:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229602AbiLHDDb (ORCPT ); Wed, 7 Dec 2022 22:03:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229978AbiLHDDJ (ORCPT ); Wed, 7 Dec 2022 22:03:09 -0500 Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 37D3F9896C; Wed, 7 Dec 2022 19:02:18 -0800 (PST) Received: from loongson.cn (unknown [10.20.42.77]) by gateway (Coremail) with SMTP id _____8BxE_C5U5FjzAMEAA--.9736S3; Thu, 08 Dec 2022 11:02:17 +0800 (CST) Received: from loongson-PC.loongson.cn (unknown [10.20.42.77]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxTuCwU5Fjx6MnAA--.32070S2; Thu, 08 Dec 2022 11:02:16 +0800 (CST) From: Liu Peibao To: Rob Herring , Thomas Gleixner , Marc Zyngier , Krzysztof Kozlowski , Huacai Chen , WANG Xuerui Cc: Jianmin Lv , Yinbo Zhu , wanghongliang , Liu Peibao , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] dt-bindings: interrupt-controller: loongarch: Fix mismathed compatible Date: Thu, 8 Dec 2022 11:02:08 +0800 Message-Id: <20221208030208.10841-1-liupeibao@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8BxTuCwU5Fjx6MnAA--.32070S2 X-CM-SenderInfo: xolx1vpled0qxorr0wxvrqhubq/1tbiAQAOCmOQgmgMegACso X-Coremail-Antispam: 1Uk129KBjvJXoW7ZF4UtFW3GFWrGry5tr1DWrg_yoW8JF4fpF W7Ca9xWF4jqF15Aa1ktasYkrnxZFnxJrna9an7tw4xGr12g34UXFWj9F95JFWrWFZ7XrWU Zr1Fq3W0qasrJF7anT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b28YFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_Jrv_JF1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVWUCVW8JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4xG64xvF2 IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE14v26r1j6r4U McvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwIxGrwCFx2 IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v2 6r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67 AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IY s7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr 0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07j1WlkUUUUU= Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The "compatible" doesn't match what the kernel is using. Fix it as kernel using. Fixes: 855d4ca4bdb3 ("irqchip: loongarch-cpu: add DT support") Signed-off-by: Liu Peibao Acked-by: Krzysztof Kozlowski --- .../loongarch,cpu-interrupt-controller.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml index 2a1cf885c99d..81e4c0feb11e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml @@ -11,7 +11,7 @@ maintainers: properties: compatible: - const: loongarch,cpu-interrupt-controller + const: loongson,cpu-interrupt-controller '#interrupt-cells': const: 1 @@ -28,7 +28,7 @@ required: examples: - | interrupt-controller { - compatible = "loongarch,cpu-interrupt-controller"; + compatible = "loongson,cpu-interrupt-controller"; #interrupt-cells = <1>; interrupt-controller; };