From patchwork Fri Dec 9 15:23:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13069852 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A415AC04FDE for ; Fri, 9 Dec 2022 15:24:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4BDE510E53F; Fri, 9 Dec 2022 15:24:48 +0000 (UTC) Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by gabe.freedesktop.org (Postfix) with ESMTPS id 798D110E53F for ; Fri, 9 Dec 2022 15:24:46 +0000 (UTC) Received: by mail-pl1-x630.google.com with SMTP id y17so5219249plp.3 for ; Fri, 09 Dec 2022 07:24:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eTlIC0zI1Wi04nUSq7MlTOuX//tM1g/xJ2R4VB/eGys=; b=g1b6XAl8aH+YaD6otDmNaD3Bue22WRopExSEMZUBXh96YiL+lLM3JtmYqZwoFW7wcF 3UgsImB2AnViVJD/2slwmg6c29rY7vpgsLm25JFYkMajOJ4RMtuczXdWw3fyiGNqVW7+ 7W4vDEYSB0L/iGmPCosUvm0TP8XGfs6rObHHY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eTlIC0zI1Wi04nUSq7MlTOuX//tM1g/xJ2R4VB/eGys=; b=0gdOVs8O3JrkGfiQ82i83xc/iLry/YIfrzxlLThaUXpvM7HWd75GNnZTsFfKsGS2R9 Tm+JFXlywcmqJ0x8rKqTwBc3aEP+WCF4wQSX1UeiTF3ty3VMMae+4YSHNW6jg8n0yBoF ixInaoYjBFh3Fs0rDYhHqkmfqOcNUbJFfJ2xj6ARfPJhVB/4E1j1/+HJEkfQWAYrUlNa YhI5D87M3FwfD1OKrqRtp6Ayvxxc+dLdT8oMjk9Zpb9kGxOpdRFmGnkHJex7uvd+Ysfb qvOYrBQsbo5wqaG77si+paEoru7o641ZAm8f/vqKiWrHc6BFHtiiJMAPWscyCyJh5/2f ZzLA== X-Gm-Message-State: ANoB5pkNvDmnStiXqm6a8jwSJj98cgjNJK0sjljp6SWzGHwsWwWhfFsf X/UjMpPIcSnIBn/3Ce8N6r6VPA== X-Google-Smtp-Source: AA0mqf5cQQSzU9aFwm47EhabJSc6yk+HBn2AkQ718jULfiQnBSs+wvKclsDN7KSCgGIi5nUDX4SqeQ== X-Received: by 2002:a17:902:a9c6:b0:189:e7e:7843 with SMTP id b6-20020a170902a9c600b001890e7e7843mr5805033plr.32.1670599486009; Fri, 09 Dec 2022 07:24:46 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a809:6ba1:bbda:c542:ba0b]) by smtp.gmail.com with ESMTPSA id x14-20020a170902ec8e00b00188c5f0f9e9sm1477587plg.199.2022.12.09.07.24.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Dec 2022 07:24:45 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Subject: [PATCH v9 01/18] drm: panel: Enable prepare_prev_first flag for samsung-s6e panels Date: Fri, 9 Dec 2022 20:53:26 +0530 Message-Id: <20221209152343.180139-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221209152343.180139-1-jagan@amarulasolutions.com> References: <20221209152343.180139-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Enable the drm panel prepare_prev_first flag so-that the previous controller should be prepared first before the prepare for the panel is called.     samsung-s6e3ha2, samsung-s6e63j0x03 and samsung-s6e8aa0 are the effected samsung-s6e panels for this change.     This makes sure that the previous controller, likely to be a DSI host controller should be initialized to LP-11 before the panel is powered up. Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v9: - new patch drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c | 1 + drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c | 1 + drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c | 1 + 3 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c index 5c621b15e84c..1355b2c27932 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c @@ -731,6 +731,7 @@ static int s6e3ha2_probe(struct mipi_dsi_device *dsi) drm_panel_init(&ctx->panel, dev, &s6e3ha2_drm_funcs, DRM_MODE_CONNECTOR_DSI); + ctx->panel.prepare_prev_first = true; drm_panel_add(&ctx->panel); diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c index e06fd35de814..3223a9d06a50 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c @@ -462,6 +462,7 @@ static int s6e63j0x03_probe(struct mipi_dsi_device *dsi) drm_panel_init(&ctx->panel, dev, &s6e63j0x03_funcs, DRM_MODE_CONNECTOR_DSI); + ctx->panel.prepare_prev_first = true; ctx->bl_dev = backlight_device_register("s6e63j0x03", dev, ctx, &s6e63j0x03_bl_ops, NULL); diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c b/drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c index 54213beafaf5..362eb10f10ce 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c @@ -1018,6 +1018,7 @@ static int s6e8aa0_probe(struct mipi_dsi_device *dsi) drm_panel_init(&ctx->panel, dev, &s6e8aa0_drm_funcs, DRM_MODE_CONNECTOR_DSI); + ctx->panel.prepare_prev_first = true; drm_panel_add(&ctx->panel); From patchwork Fri Dec 9 15:23:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13069853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A31BDC4167B for ; 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Fri, 09 Dec 2022 07:25:03 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Subject: [PATCH v9 02/18] drm/bridge: tc358764: Enable pre_enable_prev_first flag Date: Fri, 9 Dec 2022 20:53:27 +0530 Message-Id: <20221209152343.180139-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221209152343.180139-1-jagan@amarulasolutions.com> References: <20221209152343.180139-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Marek Szyprowski Enable the drm bridge pre_enable_prev_first flag so that the previous bridge pre_enable should be called first before the pre_enable for the tc358764 bridge is called. This makes sure that the previous bridge should be initialized properly before the tc358764 bridge is powered up. Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v9: - new patch drivers/gpu/drm/bridge/tc358764.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/tc358764.c b/drivers/gpu/drm/bridge/tc358764.c index 53259c12d777..f85654f1b104 100644 --- a/drivers/gpu/drm/bridge/tc358764.c +++ b/drivers/gpu/drm/bridge/tc358764.c @@ -369,6 +369,7 @@ static int tc358764_probe(struct mipi_dsi_device *dsi) ctx->bridge.funcs = &tc358764_bridge_funcs; ctx->bridge.of_node = dev->of_node; + ctx->bridge.pre_enable_prev_first = true; drm_bridge_add(&ctx->bridge); From patchwork Fri Dec 9 15:23:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13069854 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9BDAC04FDE for ; Fri, 9 Dec 2022 15:25:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4E50610E541; Fri, 9 Dec 2022 15:25:28 +0000 (UTC) Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8A62510E541 for ; Fri, 9 Dec 2022 15:25:21 +0000 (UTC) Received: by mail-pj1-x102f.google.com with SMTP id q17-20020a17090aa01100b002194cba32e9so8474136pjp.1 for ; Fri, 09 Dec 2022 07:25:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PD94MxZvqnUHdTxMPOsMMefL4P5i3Lz9kxEOBEFMSCo=; b=fgweV2Uq8N0wlYzgaQf47mr3LjVRC1L35wZBye2l2ywZp+X8ADFusTUNhQw0f6lk9P 27uxEklHfJHgkztkRzT1ebKwWhf2Udt8AhGxxpIPfi97mUiVEHs+clm3w73iqJ7r9QNu FXBQ4h7VvNyx0yT2X5+zkU0QluR+oe92T2T3o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PD94MxZvqnUHdTxMPOsMMefL4P5i3Lz9kxEOBEFMSCo=; b=qU2hN/Sf/rurFGFE8hdxtU648BeLVd6Lptmy6EZR/+PnIVYlSEijJaxZ+7UpzveKWa PODLKiHa718wHbBVwONwvGEA/ndxMX1GND7iUb2d0vgPGAXZovvJODc2aOsV5kr9G1Bj +IjPfn7k1MKDJapNp/zPEJXga4YPclQmNndmX72WuidLW+j9940QDHZ49lL6TbxuGK7O mr6sgpBEb8gmyHZDMVkCABPwxLGxfYLIfWIOBxoGqcCdR4RVETSCExrMP6eoYYcFF/kO v2viC3MO09Yv98P5zGdeazCKC0GsVGGBgXNHa9n+xhXVqbYJtN+Aq5+/E28ZUbvOCx8O MSHQ== X-Gm-Message-State: ANoB5pnfO+l2M8q9JA6NG+TNYyi7BmH6O0abMQb+/2xIHlsxx8S8jKzB kzN0KTKN7BcM6RiK4acCsgstdw== X-Google-Smtp-Source: AA0mqf55QoYZLG6Nui2W9ugkOWOA5s1EfgG0BbVEJCTMmNiChg7PB7qm/TxsNC8i1BTTAMeUFXU6Ww== X-Received: by 2002:a17:902:e845:b0:189:f8d0:7b8f with SMTP id t5-20020a170902e84500b00189f8d07b8fmr6620275plg.63.1670599521074; Fri, 09 Dec 2022 07:25:21 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a809:6ba1:bbda:c542:ba0b]) by smtp.gmail.com with ESMTPSA id x14-20020a170902ec8e00b00188c5f0f9e9sm1477587plg.199.2022.12.09.07.25.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Dec 2022 07:25:20 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Subject: [PATCH v9 03/18] drm: exynos: dsi: Restore proper bridge chain order Date: Fri, 9 Dec 2022 20:53:28 +0530 Message-Id: <20221209152343.180139-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221209152343.180139-1-jagan@amarulasolutions.com> References: <20221209152343.180139-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Marek Szyprowski Restore the proper bridge chain by finding the previous bridge in the chain instead of passing NULL. This establishes a proper bridge chain while attaching downstream bridges. v9, v4: * none v3: * new patch Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki Reviewed-by: Marek Vasut --- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index ec673223d6b7..e5b1540c4ae4 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1428,7 +1428,8 @@ static int exynos_dsi_attach(struct drm_bridge *bridge, { struct exynos_dsi *dsi = bridge_to_dsi(bridge); - return drm_bridge_attach(bridge->encoder, dsi->out_bridge, NULL, flags); + return drm_bridge_attach(bridge->encoder, dsi->out_bridge, bridge, + flags); } static const struct drm_bridge_funcs exynos_dsi_bridge_funcs = { @@ -1474,7 +1475,10 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, drm_bridge_add(&dsi->bridge); - drm_bridge_attach(encoder, &dsi->bridge, NULL, 0); + drm_bridge_attach(encoder, &dsi->bridge, + list_first_entry_or_null(&encoder->bridge_chain, + struct drm_bridge, + chain_node), 0); /* * This is a temporary solution and should be made by more generic way. From patchwork Fri Dec 9 15:23:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13069855 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72BE0C4708D for ; Fri, 9 Dec 2022 15:25:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B55AC10E542; Fri, 9 Dec 2022 15:25:40 +0000 (UTC) Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by gabe.freedesktop.org (Postfix) with ESMTPS id B671410E542 for ; Fri, 9 Dec 2022 15:25:38 +0000 (UTC) Received: by mail-pl1-x62e.google.com with SMTP id t2so2222127ply.2 for ; Fri, 09 Dec 2022 07:25:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6CUJYu0PBu1wfIOC7kGOkRHJr7T1+ycl/j32CgnvDxw=; b=BNqDuX9tCXUwEPPEht+0AtSFgnlyXtEfwk5mlTDou/QjBGbxg9H0RiKTcLx1xGgD9j +PD333SYes27F95zWb5J9dfT6mlpPftq+QRAoPUzZe7i/+/UEWt4Ov4wFOsG6GYubiSe SBSSVq3qOVziT57z4MuOHJh21bupHIvwL6QCc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6CUJYu0PBu1wfIOC7kGOkRHJr7T1+ycl/j32CgnvDxw=; b=r+0GVooeCoYcQeACka5HpWVyv8zIrSU6xGEv0uFQ8MENpUglwk3/vgEgV+9+9N95s9 VHylVCPO4aG/WErVTKt+nxSIUQYUeK3R/g2CMC44SyemVOdB3c/QpvOqPgVaOqd25qlV B0gGDjC4pNaGVruzKzBuPP189Td6WVxTGCURy+d98L4wo9JoJqwGRmgBwf2UhrXw5sNA sqoIJqOy0r87JIlPKlawpDn95AxlGgOjJG2T9Mu/iVWMXPsimMzy/NiqRus6LBfKa9Cl J6XrGpmvydiH1N5/Wp0JEkqdyKrJ/kGbT8DCrHEIwHRyGg/A0JDN7x3Uzu2mXK8P6pKf AJdg== X-Gm-Message-State: ANoB5plfWbxFUWBdYXgOZV3KQBXXw7x3o1HF9HFVo9AuV0SkNgHtDVKt 6TaLT0P9Z+QNIuEyqAvAdefyAA== X-Google-Smtp-Source: AA0mqf465vsLSnLp/ogCPrLxZJp71LtF3FRDfQ+QQy3YrIC+dGWepCwsDCXMx3VH4Fq/lJnFoIGrqQ== X-Received: by 2002:a17:902:c745:b0:189:9519:87b6 with SMTP id q5-20020a170902c74500b00189951987b6mr5017053plq.5.1670599538323; Fri, 09 Dec 2022 07:25:38 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a809:6ba1:bbda:c542:ba0b]) by smtp.gmail.com with ESMTPSA id x14-20020a170902ec8e00b00188c5f0f9e9sm1477587plg.199.2022.12.09.07.25.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Dec 2022 07:25:37 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Subject: [PATCH v9 04/18] drm: exynos: dsi: Fix MIPI_DSI*_NO_* mode flags Date: Fri, 9 Dec 2022 20:53:29 +0530 Message-Id: <20221209152343.180139-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221209152343.180139-1-jagan@amarulasolutions.com> References: <20221209152343.180139-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, Nicolas Boichat , NXP Linux Team , =?utf-8?q?S=C3=A9bastien_Szymanski?= , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" HFP/HBP/HSA/EOT_PACKET modes in Exynos DSI host specifies 0 = Enable and 1 = Disable. The logic for checking these mode flags was correct before the MIPI_DSI*_NO_* mode flag conversion. Fix the MIPI_DSI*_NO_* mode flags handling. Fixes: <0f3b68b66a6d> ("drm/dsi: Add _NO_ to MIPI_DSI_* flags disabling features") Reviewed-by: Nicolas Boichat Reported-by: Sébastien Szymanski Signed-off-by: Jagan Teki Reviewed-by: Marek Vasut --- Changes for v9: - none drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index e5b1540c4ae4..50a2a9ca88a9 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -805,15 +805,15 @@ static int exynos_dsi_init_link(struct exynos_dsi *dsi) reg |= DSIM_AUTO_MODE; if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSE) reg |= DSIM_HSE_MODE; - if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HFP)) + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HFP) reg |= DSIM_HFP_MODE; - if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HBP)) + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HBP) reg |= DSIM_HBP_MODE; - if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HSA)) + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HSA) reg |= DSIM_HSA_MODE; } - if (!(dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)) + if (dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET) reg |= DSIM_EOT_DISABLE; switch (dsi->format) { From patchwork Fri Dec 9 15:23:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13069856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E78FBC4332F for ; Fri, 9 Dec 2022 15:26:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AE48F10E543; Fri, 9 Dec 2022 15:26:00 +0000 (UTC) Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by gabe.freedesktop.org (Postfix) with ESMTPS id E6E4610E551 for ; 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Fri, 09 Dec 2022 07:25:52 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a809:6ba1:bbda:c542:ba0b]) by smtp.gmail.com with ESMTPSA id x14-20020a170902ec8e00b00188c5f0f9e9sm1477587plg.199.2022.12.09.07.25.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Dec 2022 07:25:51 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Subject: [PATCH v9 05/18] drm: exynos: dsi: Properly name HSA/HBP/HFP/HSE bits Date: Fri, 9 Dec 2022 20:53:30 +0530 Message-Id: <20221209152343.180139-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221209152343.180139-1-jagan@amarulasolutions.com> References: <20221209152343.180139-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, Nicolas Boichat , NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" HSA/HBP/HFP/HSE mode bits in Processor Reference Manuals specify a naming conversion as 'disable mode bit' due to its bit definition, 0 = Enable and 1 = Disable. For HSE bit, the i.MX 8M Mini/Nano/Plus Applications Processor Reference Manual named this bit as 'HseDisableMode' but the bit definition is quite opposite like 0 = Disables transfer 1 = Enables transfer which clearly states that HSE is not a disable bit. HSE is named as per the manual even though it is not a disable bit however the driver logic for handling HSE is based on the MIPI_DSI_MODE_VIDEO_HSE flag itself. Cc: Nicolas Boichat Signed-off-by: Jagan Teki Reviewed-by: Marek Vasut --- Changes for v9: - new patch drivers/gpu/drm/exynos/exynos_drm_dsi.c | 33 +++++++++++++++++++------ 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 50a2a9ca88a9..b64bb6006b7d 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -75,10 +75,27 @@ #define DSIM_MAIN_PIX_FORMAT_RGB565 (0x4 << 12) #define DSIM_SUB_VC (((x) & 0x3) << 16) #define DSIM_MAIN_VC (((x) & 0x3) << 18) -#define DSIM_HSA_MODE (1 << 20) -#define DSIM_HBP_MODE (1 << 21) -#define DSIM_HFP_MODE (1 << 22) -#define DSIM_HSE_MODE (1 << 23) +#define DSIM_HSA_DISABLE_MODE (1 << 20) +#define DSIM_HBP_DISABLE_MODE (1 << 21) +#define DSIM_HFP_DISABLE_MODE (1 << 22) +/* + * The i.MX 8M Mini Applications Processor Reference Manual, + * Rev. 3, 11/2020 Page 4091 + * The i.MX 8M Nano Applications Processor Reference Manual, + * Rev. 2, 07/2022 Page 3058 + * The i.MX 8M Plus Applications Processor Reference Manual, + * Rev. 1, 06/2021 Page 5436 + * named this bit as 'HseDisableMode' but the bit definition + * is quite opposite like + * 0 = Disables transfer + * 1 = Enables transfer + * which clearly states that HSE is not a disable bit. + * + * This bit is named as per the manual even though it is not + * a disable bit however the driver logic for handling HSE + * is based on the MIPI_DSI_MODE_VIDEO_HSE flag itself. + */ +#define DSIM_HSE_DISABLE_MODE (1 << 23) #define DSIM_AUTO_MODE (1 << 24) #define DSIM_VIDEO_MODE (1 << 25) #define DSIM_BURST_MODE (1 << 26) @@ -804,13 +821,13 @@ static int exynos_dsi_init_link(struct exynos_dsi *dsi) if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_AUTO_VERT) reg |= DSIM_AUTO_MODE; if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSE) - reg |= DSIM_HSE_MODE; + reg |= DSIM_HSE_DISABLE_MODE; if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HFP) - reg |= DSIM_HFP_MODE; + reg |= DSIM_HFP_DISABLE_MODE; if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HBP) - reg |= DSIM_HBP_MODE; + reg |= DSIM_HBP_DISABLE_MODE; if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HSA) - reg |= DSIM_HSA_MODE; + reg |= DSIM_HSA_DISABLE_MODE; } if (dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET) From patchwork Fri Dec 9 15:23:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13069857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B327BC4332F for ; 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Fri, 09 Dec 2022 07:26:02 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Subject: [PATCH v9 06/18] drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge Date: Fri, 9 Dec 2022 20:53:31 +0530 Message-Id: <20221209152343.180139-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221209152343.180139-1-jagan@amarulasolutions.com> References: <20221209152343.180139-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Samsung MIPI DSIM controller is common DSI IP that can be used in various SoCs like Exynos, i.MX8M Mini/Nano. In order to access this DSI controller between various platform SoCs, the ideal way to incorporate this in the drm stack is via the drm bridge driver. This patch is trying to differentiate platform-specific and bridge driver code by maintaining exynos platform glue code in exynos_drm_dsi.c driver and common bridge driver code in samsung-dsim.c providing that the new platform-specific glue should be supported in the bridge driver, unlike exynos platform drm drivers. - Add samsung_dsim_plat_data for keeping platform-specific attributes like host_ops, irq_ops, and hw_type. - Initialize the plat_data hooks for exynos platform in exynos_drm_dsi.c. - samsung_dsim_probe is the common probe call across exynos_drm_dsi.c and samsung-dsim.c. - plat_data hooks like host_ops and irq_ops are invoked during the respective bridge call chains. v9: * drop the bridge attach fix for Exynos v8: * update the commit message head v7: * fix the drm bridge attach chain for exynos drm dsi driver * fix the hw_type checking logic v6: * handle previous bridge pointer for exynos dsi v5: * [mszyprow] reworked driver initialization using the same approach as in drivers/gpu/drm/{exynos/exynos_dp.c, bridge/analogix/analogix_dp_core.c}, removed weak functions, moved exynos_dsi_driver back to exynos_drm_dsi.c and restored integration with exynos_drm custom initialization. * updated the commit message [Jagan] v4: * include Inki Dae in MAINTAINERS * remove dsi_driver probe in exynos_drm_drv to support multi-arch build v3: * restore gpio related fixes * restore proper bridge chain * rework initialization issue * fix header includes in proper way v2: * fixed exynos dsi driver conversion (Marek Szyprowski) * updated commit message * updated MAINTAINERS file v1: * don't maintain component_ops in bridge driver * don't maintain platform glue code in bridge driver * add platform-specific glue code and make a common bridge Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- MAINTAINERS | 9 + drivers/gpu/drm/bridge/Kconfig | 12 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/samsung-dsim.c | 1703 ++++++++++++++++++++++ drivers/gpu/drm/exynos/Kconfig | 1 + drivers/gpu/drm/exynos/exynos_drm_dsi.c | 1784 ++--------------------- include/drm/bridge/samsung-dsim.h | 113 ++ 7 files changed, 1952 insertions(+), 1671 deletions(-) create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.c create mode 100644 include/drm/bridge/samsung-dsim.h diff --git a/MAINTAINERS b/MAINTAINERS index f3edff6b1cad..9a37cce05062 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6675,6 +6675,15 @@ T: git git://anongit.freedesktop.org/drm/drm-misc F: Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml F: drivers/gpu/drm/panel/panel-samsung-db7430.c +DRM DRIVER FOR SAMSUNG MIPI DSIM BRIDGE +M: Jagan Teki +M: Marek Szyprowski +M: Inki Dae S: Maintained diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 57946d80b02d..8e85dac9f53e 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -231,6 +231,18 @@ config DRM_PARADE_PS8640 The PS8640 is a high-performance and low-power MIPI DSI to eDP converter +config DRM_SAMSUNG_DSIM + tristate "Samsung MIPI DSIM bridge driver" + depends on COMMON_CLK + depends on OF && HAS_IOMEM + select DRM_KMS_HELPER + select DRM_MIPI_DSI + select DRM_PANEL_BRIDGE + help + The Samsung MIPI DSIM bridge controller driver. + This MIPI DSIM bridge can be found it on Exynos SoCs and + NXP's i.MX8M Mini/Nano. + config DRM_SIL_SII8620 tristate "Silicon Image SII8620 HDMI/MHL bridge" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 1884803c6860..dae843723991 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o +obj-$(CONFIG_DRM_SAMSUNG_DSIM) += samsung-dsim.o obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o obj-$(CONFIG_DRM_SII902X) += sii902x.o obj-$(CONFIG_DRM_SII9234) += sii9234.o diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c new file mode 100644 index 000000000000..baad09b2daeb --- /dev/null +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -0,0 +1,1703 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Samsung MIPI DSIM bridge driver. + * + * Copyright (C) 2021 Amarula Solutions(India) + * Copyright (c) 2014 Samsung Electronics Co., Ltd + * Author: Jagan Teki + * + * Based on exynos_drm_dsi from + * Tomasz Figa + */ + +#include + +#include +#include +#include +#include +#include + +#include