From patchwork Sat Dec 10 03:01:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Umesh Nerlige Ramappa X-Patchwork-Id: 13070193 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86093C04FDE for ; Sat, 10 Dec 2022 03:01:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B21B810E08A; Sat, 10 Dec 2022 03:01:41 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5382810E094 for ; Sat, 10 Dec 2022 03:01:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670641282; x=1702177282; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=KGUW+Dp1b5ioNJsmBSZ+dW+GT7AdvbyCKGXI4Goytyw=; b=Gp5r5c/2dwOLDdYXc7CyD6j4uT6iblEz8NChPto2v39iLpaqAG7jfFgD CJ//a9RT3ni27k5GGXLPTdZvgGhckpXv4lY5UHvHlP/UYjt+aLlZfyKwQ aHD/DURIKWgfRlIWXhLUP3K+uqEwpkV+tBU17wAeDrlhqsjOluB0LU4cp MpX79JNA5xqP/TmJIcgu290mHJp8vzKUtRE9w+d2SCDkA/rxIib2oVbLU 8ZeAS6NMSKakLN/Xc9o+ipKKyQq6I0Fp+Q0yGJmuBVZ+ahDACffMUgD0d +mmGZVOSyXnVoK0HbrAhvFp5IQtpTdhA0fROCnX9Y+i96sRlqH0DiQqTy Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="379800533" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="379800533" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="597914723" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="597914723" Received: from unerlige-desk.jf.intel.com ([10.165.21.199]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 From: Umesh Nerlige Ramappa To: intel-gfx@lists.freedesktop.org Date: Fri, 9 Dec 2022 19:01:13 -0800 Message-Id: <20221210030116.1777214-2-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> References: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 1/4] drm/i915/mtl: Resize noa_wait BO size to save restore GPR regs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On MTL, gt->scratch was using stolen lmem. An MI_SRM to stolen lmem caused a hang that was attributed to saving and restoring the GPR registers used for noa_wait. Add an additional page in noa_wait BO to save/restore GPR registers for the noa_wait logic. Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/gt/intel_gt_types.h | 6 ------ drivers/gpu/drm/i915/i915_perf.c | 25 ++++++++++++++++-------- 2 files changed, 17 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h index 0b6da2aa9718..f08c2556aa25 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h @@ -304,12 +304,6 @@ enum intel_gt_scratch_field { /* 8 bytes */ INTEL_GT_SCRATCH_FIELD_COHERENTL3_WA = 256, - - /* 6 * 8 bytes */ - INTEL_GT_SCRATCH_FIELD_PERF_CS_GPR = 2048, - - /* 4 bytes */ - INTEL_GT_SCRATCH_FIELD_PERF_PREDICATE_RESULT_1 = 2096, }; #endif /* __INTEL_GT_TYPES_H__ */ diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index d22f30dd4fba..a8b34460d36f 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1846,8 +1846,7 @@ static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs, for (d = 0; d < dword_count; d++) { *cs++ = cmd; *cs++ = i915_mmio_reg_offset(reg) + 4 * d; - *cs++ = intel_gt_scratch_offset(stream->engine->gt, - offset) + 4 * d; + *cs++ = i915_ggtt_offset(stream->noa_wait) + offset + 4 * d; *cs++ = 0; } @@ -1880,7 +1879,13 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) MI_PREDICATE_RESULT_2_ENGINE(base) : MI_PREDICATE_RESULT_1(RENDER_RING_BASE); - bo = i915_gem_object_create_internal(i915, 4096); + /* + * gt->scratch was being used to save/restore the GPR registers, but on + * MTL the scratch uses stolen lmem. An MI_SRM to this memory region + * causes an engine hang. Instead allocate an additional page here to + * save/restore GPR registers + */ + bo = i915_gem_object_create_internal(i915, 8192); if (IS_ERR(bo)) { drm_err(&i915->drm, "Failed to allocate NOA wait batchbuffer\n"); @@ -1914,14 +1919,19 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) goto err_unpin; } + stream->noa_wait = vma; + +#define GPR_SAVE_OFFSET 4096 +#define PREDICATE_SAVE_OFFSET 4160 + /* Save registers. */ for (i = 0; i < N_CS_GPR; i++) cs = save_restore_register( stream, cs, true /* save */, CS_GPR(i), - INTEL_GT_SCRATCH_FIELD_PERF_CS_GPR + 8 * i, 2); + GPR_SAVE_OFFSET + 8 * i, 2); cs = save_restore_register( stream, cs, true /* save */, mi_predicate_result, - INTEL_GT_SCRATCH_FIELD_PERF_PREDICATE_RESULT_1, 1); + PREDICATE_SAVE_OFFSET, 1); /* First timestamp snapshot location. */ ts0 = cs; @@ -2037,10 +2047,10 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) for (i = 0; i < N_CS_GPR; i++) cs = save_restore_register( stream, cs, false /* restore */, CS_GPR(i), - INTEL_GT_SCRATCH_FIELD_PERF_CS_GPR + 8 * i, 2); + GPR_SAVE_OFFSET + 8 * i, 2); cs = save_restore_register( stream, cs, false /* restore */, mi_predicate_result, - INTEL_GT_SCRATCH_FIELD_PERF_PREDICATE_RESULT_1, 1); + PREDICATE_SAVE_OFFSET, 1); /* And return to the ring. */ *cs++ = MI_BATCH_BUFFER_END; @@ -2050,7 +2060,6 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) i915_gem_object_flush_map(bo); __i915_gem_object_release_map(bo); - stream->noa_wait = vma; goto out_ww; err_unpin: From patchwork Sat Dec 10 03:01:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Umesh Nerlige Ramappa X-Patchwork-Id: 13070191 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1B185C4332F for ; Sat, 10 Dec 2022 03:01:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4808010E094; Sat, 10 Dec 2022 03:01:26 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0466210E08A for ; Sat, 10 Dec 2022 03:01:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670641282; x=1702177282; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=+yAuMLoj75qiuZMhj7Q6QxeQgAEwM45eXYYDHzpUgjg=; b=VbZ1Wvay3tzrxCkvQwBIRfinjGZVUzbU0dnO+zJaee+dN+UhfDt33pt3 8plIg9qvkZOS21gdIfekgFppnkrm2iX1RFYAmZ5KHWBQZvk/FeTIhCMrm sL5Mf07pFlOC4UAu4Jd1IiI8HDZu60GMzqYdRnfJnvp7xhK9YQcixslti XBtK738IWwLEQPRNTmPHUmoAY7Hz/wS/eIWs1v6gVh00wj/Fkj/5Gy0KW fZWNdD1hxGJR99RxcvqQrsjSxpuY/vFXtMR3j+MDs0yFsFoctYl6Ewle3 /O//wWMXxUIckuQGpuFO9L0eJzHTBaPbyMui+c3FEE4OwXb229Iaiv+/D A==; X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="379800534" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="379800534" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="597914724" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="597914724" Received: from unerlige-desk.jf.intel.com ([10.165.21.199]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 From: Umesh Nerlige Ramappa To: intel-gfx@lists.freedesktop.org Date: Fri, 9 Dec 2022 19:01:14 -0800 Message-Id: <20221210030116.1777214-3-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> References: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 2/4] drm/i915/mtl: Add Wa_14015846243 to fix OA vs CS timestamp mismatch X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Similar to ACM, OA timestamp that is part of the OA report is shifted when compared to the CS timestamp. Add MTL to the WA. Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_perf.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index a8b34460d36f..1a8618a787d6 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -3140,8 +3140,11 @@ get_sseu_config(struct intel_sseu *out_sseu, */ u32 i915_perf_oa_timestamp_frequency(struct drm_i915_private *i915) { - /* Wa_18013179988:dg2 */ - if (IS_DG2(i915)) { + /* + * Wa_18013179988:dg2 + * Wa_14015846243:mtl + */ + if (IS_DG2(i915) || IS_METEORLAKE(i915)) { intel_wakeref_t wakeref; u32 reg, shift; From patchwork Sat Dec 10 03:01:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Umesh Nerlige Ramappa X-Patchwork-Id: 13070192 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E42DEC4332F for ; Sat, 10 Dec 2022 03:01:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 84E8010E095; Sat, 10 Dec 2022 03:01:26 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id D035110E063 for ; Sat, 10 Dec 2022 03:01:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670641281; x=1702177281; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=twCOOzvTl9h4scH3pgXQhg635DAnZfTrii418m6SRpc=; b=L/o4DcWCqi27720imOn+r2UtX0HdhvNHL8635wfbJWbbDqyC1LwdPCav eQM4Xcn5kc77pIDQQ6/fZI/vZKvMWcGYM0QP2g8hzPnw2riCHlVFYAkx0 z1tIcY6FM0kc1ri0Ydav7jCOJRW/cO9WhyAV+HYBxepDBVL/5ZdfOt6Lf ZPJru+0ToaDGBn1Cjm2VrWq/XP5GJB58p8E7S4SXo+5DLjhsb4GeXUoK8 lKVbzFLs7q1/Uoe6FAa3Oz7Qi/XGNBY5GGzi5nXhQr8XAlyS272cf8ZTe +e2nv7KoOy5qlE6heanKKAx+7J5Qc0zLPZBHSxa+bATXxt8oGZXYs97Lr g==; X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="379800536" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="379800536" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="597914726" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="597914726" Received: from unerlige-desk.jf.intel.com ([10.165.21.199]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 From: Umesh Nerlige Ramappa To: intel-gfx@lists.freedesktop.org Date: Fri, 9 Dec 2022 19:01:15 -0800 Message-Id: <20221210030116.1777214-4-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> References: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 3/4] drm/i915/mtl: Update OA mux whitelist for MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" 0x20cc (WAIT_FOR_RC6_EXIT on other platforms) is repurposed on MTL. Use a separate mux table to verify oa configs passed by user. Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_perf.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 1a8618a787d6..41f6c0923ba5 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -4322,6 +4322,17 @@ static const struct i915_range gen12_oa_mux_regs[] = { {} }; +/* + * Ref: 14010536224: + * 0x20cc is repurposed on MTL, so use a separate array for MTL. + */ +static const struct i915_range mtl_oa_mux_regs[] = { + { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */ + { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */ + { .start = 0x9840, .end = 0x9840 }, /* GDT_CHICKEN_BITS */ + { .start = 0x9884, .end = 0x9888 }, /* NOA_WRITE */ +}; + static bool gen7_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) { return reg_in_range_table(addr, gen7_oa_b_counters); @@ -4365,7 +4376,10 @@ static bool xehp_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) static bool gen12_is_valid_mux_addr(struct i915_perf *perf, u32 addr) { - return reg_in_range_table(addr, gen12_oa_mux_regs); + if (IS_METEORLAKE(perf->i915)) + return reg_in_range_table(addr, mtl_oa_mux_regs); + else + return reg_in_range_table(addr, gen12_oa_mux_regs); } static u32 mask_reg_value(u32 reg, u32 val) From patchwork Sat Dec 10 03:01:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Umesh Nerlige Ramappa X-Patchwork-Id: 13070190 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBE94C4332F for ; Sat, 10 Dec 2022 03:01:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EB7F210E093; Sat, 10 Dec 2022 03:01:25 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7A83010E095 for ; Sat, 10 Dec 2022 03:01:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670641282; x=1702177282; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=psLQMBN9RJ6I6tkztN4fJna7e73DXB/nrcPlYsWXBSU=; b=XoKrCkEWqA7ZSjPNtxMRyQd3q1kIyGUKpeyN+h5yzhF9x7sHtKvK0BEV kYmZBVBnugQcffH0OM2/Wdnh0ssUdSSHVApaqwtdehqBQmBuV10O8SnXK ZX4/MEkmR5sNYvNJCzLebUrIssIJbDSCrLe8ZsbHmk+flRHGrZvXR+buv aD4O+Dt5rk2p83N8CJwnRZImkIASXw8hVHvmjljDeRvE5dJfCfWhiqoG6 UwGYuHmHjYoViFPEHZVTR19qGlqnfrL2H0R6vOR+C706vTiScIdGBe9ZJ VAOeSe/QLms9Vja15bdaXuLWuMGMokPTxYdLD46RETt9NFcIdlK9Cbm2I A==; X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="379800537" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="379800537" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="597914727" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="597914727" Received: from unerlige-desk.jf.intel.com ([10.165.21.199]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 From: Umesh Nerlige Ramappa To: intel-gfx@lists.freedesktop.org Date: Fri, 9 Dec 2022 19:01:16 -0800 Message-Id: <20221210030116.1777214-5-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> References: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 4/4] drm/i915/mtl: Add OA support by enabling 32 bit OAG formats for MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Without an entry in oa_init_supported_formats, OA will not be functional in MTL. Enable OA support by enabling 32 bit OAG formats for MTL. Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20228 Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit Acked-by: Tejas Upadhyay --- drivers/gpu/drm/i915/i915_perf.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 41f6c0923ba5..824a34ec0b83 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -4776,6 +4776,7 @@ static void oa_init_supported_formats(struct i915_perf *perf) break; case INTEL_DG2: + case INTEL_METEORLAKE: oa_format_add(perf, I915_OAR_FORMAT_A32u40_A4u32_B8_C8); oa_format_add(perf, I915_OA_FORMAT_A24u40_A14u32_B8_C8); break;