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Map it as a whole (reserving more space in the fixmap). Make fixmap slot conditional on CONFIG_XHCI. Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Jan Beulich --- xen/arch/x86/include/asm/fixmap.h | 4 +++- xen/drivers/char/xhci-dbc.c | 6 ++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/include/asm/fixmap.h b/xen/arch/x86/include/asm/fixmap.h index bc39ffe896b1..516ec3fa6c95 100644 --- a/xen/arch/x86/include/asm/fixmap.h +++ b/xen/arch/x86/include/asm/fixmap.h @@ -25,7 +25,7 @@ #include #include -#define MAX_XHCI_PAGES 16 +#define MAX_XHCI_PAGES 256 /* * Here we define all the compile-time 'special' virtual @@ -45,8 +45,10 @@ enum fixed_addresses { FIX_COM_BEGIN, FIX_COM_END, FIX_EHCI_DBGP, +#ifdef CONFIG_XHCI FIX_XHCI_BEGIN, FIX_XHCI_END = FIX_XHCI_BEGIN + MAX_XHCI_PAGES - 1, +#endif #ifdef CONFIG_XEN_GUEST FIX_PV_CONSOLE, FIX_XEN_SHARED_INFO, diff --git a/xen/drivers/char/xhci-dbc.c b/xen/drivers/char/xhci-dbc.c index 86f6df6bef67..60b781f87202 100644 --- a/xen/drivers/char/xhci-dbc.c +++ b/xen/drivers/char/xhci-dbc.c @@ -268,10 +268,12 @@ static void *dbc_sys_map_xhc(uint64_t phys, size_t size) { size_t i; - if ( size != MAX_XHCI_PAGES * PAGE_SIZE ) + if ( size > MAX_XHCI_PAGES * PAGE_SIZE ) return NULL; - for ( i = FIX_XHCI_END; i >= FIX_XHCI_BEGIN; i-- ) + size >>= PAGE_SHIFT; + + for ( i = FIX_XHCI_END; i > FIX_XHCI_END - size; i-- ) { set_fixmap_nocache(i, phys); phys += PAGE_SIZE; From patchwork Sun Dec 11 02:10:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Marczykowski-G=C3=B3recki?= X-Patchwork-Id: 13070469 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50EF7C10F1B for ; Sun, 11 Dec 2022 02:10:51 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.458709.716528 (Exim 4.92) (envelope-from ) id 1p4BnU-0002wH-SJ; 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Search all of them. Signed-off-by: Marek Marczykowski-Górecki --- xen/drivers/char/xhci-dbc.c | 84 +++++++++++++++++++++++++++++--------- 1 file changed, 66 insertions(+), 18 deletions(-) diff --git a/xen/drivers/char/xhci-dbc.c b/xen/drivers/char/xhci-dbc.c index 60b781f87202..62b0ce88b6bf 100644 --- a/xen/drivers/char/xhci-dbc.c +++ b/xen/drivers/char/xhci-dbc.c @@ -286,39 +286,87 @@ static void *dbc_sys_map_xhc(uint64_t phys, size_t size) return fix_to_virt(FIX_XHCI_END); } +static void xhci_bios_handoff(struct dbc *dbc) +{ + const uint32_t __iomem *xcap; + uint32_t xcap_val; + uint32_t next; + uint32_t id = 0; + const void __iomem *mmio = dbc->xhc_mmio; + const uint32_t __iomem *hccp1 = mmio + 0x10; + const uint32_t LEGACY_ID = 0x1; + int ttl = 48; + int timeout = 10000; + + xcap = mmio; + /* + * This is initially an offset to the first capability. All the offsets + * (both in HCCP1 and then next capability pointer) are dword-based. + */ + next = (readl(hccp1) & 0xFFFF0000) >> 16; + + while ( id != LEGACY_ID && next && ttl-- ) + { + xcap += next; + xcap_val = readl(xcap); + id = xcap_val & 0xFF; + next = (xcap_val & 0xFF00) >> 8; + } + + if ( id != LEGACY_ID ) + return; + + xcap_val = readl(xcap); +#define XHCI_HC_BIOS_OWNED (1U << 16) +#define XHCI_HC_OS_OWNED (1U << 24) + if (xcap_val & XHCI_HC_BIOS_OWNED) { + dbc_error("bios owned\n"); + writeb(1, (uint8_t*)xcap + 3); + while ((readl(xcap) & (XHCI_HC_BIOS_OWNED | XHCI_HC_OS_OWNED)) != XHCI_HC_OS_OWNED) + { + cpu_relax(); + if (!--timeout) + break; + } + if (!timeout) + dbc_error("handoff timeout\n"); + xcap_val = readl(xcap + 1); + xcap_val &= ((0x7 << 1) + (0xff << 5) + (0x7 << 17)); // XHCI_LEGACY_DISABLE_SMI + xcap_val |= (0x7 << 29); // XHCI_LEGACY_SMI_EVENTS + writel(xcap_val, xcap + 1); + } +} + static bool __init dbc_init_xhc(struct dbc *dbc) { uint32_t bar0; uint64_t bar1; uint64_t bar_val; uint64_t bar_size; - uint64_t devfn; + unsigned int bus, devfn; uint16_t cmd; size_t xhc_mmio_size; if ( dbc->sbdf.sbdf == 0 ) { - /* - * Search PCI bus 0 for the xHC. All the host controllers supported so - * far are part of the chipset and are on bus 0. - */ - for ( devfn = 0; devfn < 256; devfn++ ) - { - pci_sbdf_t sbdf = PCI_SBDF(0, 0, devfn); - uint8_t hdr = pci_conf_read8(sbdf, PCI_HEADER_TYPE); - - if ( hdr == 0 || hdr == 0x80 ) + for ( bus = 0; bus < 0x100; bus++ ) + for ( devfn = 0; devfn < 256; devfn++ ) { - if ( (pci_conf_read32(sbdf, PCI_CLASS_REVISION) >> 8) == - DBC_XHC_CLASSC ) + pci_sbdf_t sbdf = PCI_SBDF(0, bus, devfn); + uint8_t hdr = pci_conf_read8(sbdf, PCI_HEADER_TYPE); + + if ( hdr == 0 || hdr == 0x80 ) { - if ( dbc->xhc_num-- ) - continue; - dbc->sbdf = sbdf; - break; + if ( (pci_conf_read32(sbdf, PCI_CLASS_REVISION) >> 8) == + DBC_XHC_CLASSC ) + { + if ( dbc->xhc_num-- ) + continue; + dbc->sbdf = sbdf; + break; + } } } - } } else { From patchwork Sun Dec 11 02:10:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Marczykowski-G=C3=B3recki?= X-Patchwork-Id: 13070471 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 09F34C4167B for ; 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DO NOT MERGE. The timeout doesn't actually prevent registering the console. Signed-off-by: Marek Marczykowski-Górecki --- xen/drivers/char/xhci-dbc.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/xen/drivers/char/xhci-dbc.c b/xen/drivers/char/xhci-dbc.c index 62b0ce88b6bf..cb209332a4be 100644 --- a/xen/drivers/char/xhci-dbc.c +++ b/xen/drivers/char/xhci-dbc.c @@ -33,7 +33,7 @@ #include /* uncomment to have dbc_uart_dump() debug function */ -/* #define DBC_DEBUG 1 */ +#define DBC_DEBUG 1 #define DBC_POLL_INTERVAL 100 /* us */ @@ -264,6 +264,10 @@ struct dbc { uint16_t pci_cr; }; +#ifdef DBC_DEBUG +static void dbc_uart_dump(void); +#endif + static void *dbc_sys_map_xhc(uint64_t phys, size_t size) { size_t i; @@ -900,13 +904,23 @@ static void dbc_reset_debug_port(struct dbc *dbc) static void dbc_enable_dbc(struct dbc *dbc) { struct dbc_reg *reg = dbc->dbc_reg; + unsigned long timeout = 10000000; wmb(); writel(readl(®->ctrl) | (1U << DBC_CTRL_DCE), ®->ctrl); wmb(); while ( (readl(®->ctrl) & (1U << DBC_CTRL_DCE)) == 0 ) + { cpu_relax(); + if (!--timeout) + break; + } + if (!timeout) + { + dbc_error("timeout 1\n"); + dbc_uart_dump(); + } /* reset ports on initial open, to force re-enumerating by the host */ if ( !dbc->open ) @@ -916,8 +930,18 @@ static void dbc_enable_dbc(struct dbc *dbc) writel(readl(®->portsc) | (1U << DBC_PSC_PED), ®->portsc); wmb(); + timeout = 1000000; while ( (readl(®->ctrl) & (1U << DBC_CTRL_DCR)) == 0 ) + { cpu_relax(); + if (!--timeout) + break; + } + if (!timeout) + { + dbc_error("timeout 2\n"); + dbc_uart_dump(); + } } static void dbc_disable_dbc(struct dbc *dbc)