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Sat, 31 Dec 2022 11:46:31 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski Cc: Samuel Holland , Albert Ou , Conor Dooley , Greg Kroah-Hartman , Maxime Ripard , Palmer Dabbelt , Paul Walmsley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-riscv@lists.infradead.org, linux-staging@lists.linux.dev, linux-sunxi@lists.linux.dev Subject: [PATCH 1/4] media: dt-bindings: cedrus: Allow power domain references Date: Sat, 31 Dec 2022 10:46:24 -0600 Message-Id: <20221231164628.19688-2-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231164628.19688-1-samuel@sholland.org> References: <20221231164628.19688-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_084633_261693_D10CF02C X-CRM114-Status: UNSURE ( 8.97 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The Allwinner D1 SoC contains a separate power domain for its video engine, controlled via the "PPU" power controller. Allow the power-domains property so this can be represented in the devicetree. Signed-off-by: Samuel Holland Acked-by: Krzysztof Kozlowski --- .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml index 541325f900a1..d5be7f604e8c 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml @@ -63,6 +63,9 @@ properties: CMA pool to use for buffers allocation instead of the default CMA pool. + power-domains: + maxItems: 1 + required: - compatible - reg From patchwork Sat Dec 31 16:46:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 13086148 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0732BC3DA7A for ; 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Sat, 31 Dec 2022 11:46:32 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski Cc: Samuel Holland , Albert Ou , Conor Dooley , Greg Kroah-Hartman , Maxime Ripard , Palmer Dabbelt , Paul Walmsley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-riscv@lists.infradead.org, linux-staging@lists.linux.dev, linux-sunxi@lists.linux.dev Subject: [PATCH 2/4] media: dt-bindings: cedrus: Make allwinner,sram optional Date: Sat, 31 Dec 2022 10:46:25 -0600 Message-Id: <20221231164628.19688-3-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231164628.19688-1-samuel@sholland.org> References: <20221231164628.19688-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_084634_744238_B46E6365 X-CRM114-Status: GOOD ( 10.48 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Allwinner SoCs can remap some bits of peripheral SRAM to a contiguous range of addresses for use by early boot software. Usually the video engine's SRAM is used for this purpose, so its mapping must be switched back before the hardware can be used. However, the D1 and related SoCs use the DSP SRAM for this purpose. As a result, the video engine SRAM is not switchable, and there is no need for an allwinner,sram reference in the devicetree. Signed-off-by: Samuel Holland Acked-by: Krzysztof Kozlowski Reviewed-by: Paul Kocialkowski --- .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml index d5be7f604e8c..74363b242fff 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml @@ -73,7 +73,6 @@ required: - clocks - clock-names - resets - - allwinner,sram additionalProperties: false From patchwork Sat Dec 31 16:46:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 13086149 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8D65BC4332F for ; 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Sat, 31 Dec 2022 11:46:34 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski Cc: Samuel Holland , Albert Ou , Conor Dooley , Greg Kroah-Hartman , Maxime Ripard , Palmer Dabbelt , Paul Walmsley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-riscv@lists.infradead.org, linux-staging@lists.linux.dev, linux-sunxi@lists.linux.dev Subject: [PATCH 3/4] media: cedrus: Make SRAM section claiming optional Date: Sat, 31 Dec 2022 10:46:26 -0600 Message-Id: <20221231164628.19688-4-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231164628.19688-1-samuel@sholland.org> References: <20221231164628.19688-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_084636_308668_8742A223 X-CRM114-Status: GOOD ( 11.05 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The video engine in the D1 family of SoCs does not have a switchable SRAM section. Allow the driver to probe even when the SRAM section reference is missing. Signed-off-by: Samuel Holland Reviewed-by: Paul Kocialkowski --- drivers/staging/media/sunxi/cedrus/cedrus_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c index fa86a658fdc6..11e859617932 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c @@ -257,7 +257,7 @@ int cedrus_hw_probe(struct cedrus_dev *dev) } ret = sunxi_sram_claim(dev->dev); - if (ret) { + if (ret && ret != -ENOENT) { dev_err(dev->dev, "Failed to claim SRAM\n"); goto err_mem; From patchwork Sat Dec 31 16:46:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 13086150 X-Patchwork-Delegate: mail@conchuod.ie Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3DDC0C4332F for ; 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Sat, 31 Dec 2022 11:46:35 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski Cc: Samuel Holland , Albert Ou , Conor Dooley , Greg Kroah-Hartman , Maxime Ripard , Palmer Dabbelt , Paul Walmsley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-riscv@lists.infradead.org, linux-staging@lists.linux.dev, linux-sunxi@lists.linux.dev Subject: [PATCH 4/4] riscv: dts: allwinner: d1: Add video engine node Date: Sat, 31 Dec 2022 10:46:27 -0600 Message-Id: <20221231164628.19688-5-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231164628.19688-1-samuel@sholland.org> References: <20221231164628.19688-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221231_084637_900346_9F723EFD X-CRM114-Status: UNSURE ( 8.62 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org D1 contains a video engine which is supported by the Cedrus driver. Signed-off-by: Samuel Holland Acked-by: Palmer Dabbelt --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index dff363a3c934..4bd374279155 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -34,6 +34,17 @@ soc { #address-cells = <1>; #size-cells = <1>; + ve: video-codec@1c0e000 { + compatible = "allwinner,sun20i-d1-video-engine"; + reg = <0x1c0e000 0x2000>; + interrupts = ; + clocks = <&ccu CLK_BUS_VE>, + <&ccu CLK_VE>, + <&ccu CLK_MBUS_VE>; + clock-names = "ahb", "mod", "ram"; + resets = <&ccu RST_BUS_VE>; + }; + pio: pinctrl@2000000 { compatible = "allwinner,sun20i-d1-pinctrl"; reg = <0x2000000 0x800>;