From patchwork Wed Jan 11 10:44:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Shyti X-Patchwork-Id: 13096394 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7B60C678D5 for ; Wed, 11 Jan 2023 10:45:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AC77310E6FF; Wed, 11 Jan 2023 10:45:14 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 091D210E6FE; Wed, 11 Jan 2023 10:45:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1673433911; x=1704969911; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=exL/2C0X7BsFVMhU6qIdFRUxqlkL7NLXD/xjEpkD/NE=; b=HDGEcgyaf2AkV/bWQVbe2X7o6bAjVRHYuStOAEqaeEUlxjEvq3Wt7K1s FTKMGNTfl7n6o54TYFlIMelHKsl4/j48o3clA6IR6EaTkdXdHq/XiV6HY IZvesMCCdSWdZsSnARkbvc+y2enBXAxoQHz7Oab08Q1ByIau0oKY3IguO E5oXPPZ2Ml1wbOJ0XURE+7MIwP1R2aDfS/JYnFYrYwAU60By2duq1Hxct wqZiDafSd2AE+rbzCtFGhzwp73uGGF/k/lYdKBcrQ6iHNpJwOAWYG2zlX fLEKTZvhqhJazGB4SIzEC0jsWVXKe7pHOQq8NKkAwApaSamP8IRXeXPxD A==; X-IronPort-AV: E=McAfee;i="6500,9779,10586"; a="409624761" X-IronPort-AV: E=Sophos;i="5.96,315,1665471600"; d="scan'208";a="409624761" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2023 02:45:10 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10586"; a="607305151" X-IronPort-AV: E=Sophos;i="5.96,315,1665471600"; d="scan'208";a="607305151" Received: from silin-mobl2.ger.corp.intel.com (HELO intel.com) ([10.252.53.16]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2023 02:45:06 -0800 From: Andi Shyti To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Wed, 11 Jan 2023 11:44:47 +0100 Message-Id: <20230111104447.338136-1-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915/pcode: Wait 10 seconds for pcode to settle X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Wilson , Rodrigo Vivi , Chris Wilson Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Aravind Iddamsetty During module load not all the punit transaction have completed and we might end up timing out, as shown by the following warning: i915 0000:4d:00.0: drm_WARN_ON_ONCE(timeout_base_ms > 3) Wait 10 seconds for the punit to settle and complete any outstanding transactions upon module load. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7814 Signed-off-by: Aravind Iddamsetty Co-developed-by: Chris Wilson Cc: Rodrigo Vivi Signed-off-by: Andi Shyti --- drivers/gpu/drm/i915/intel_pcode.c | 35 ++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pcode.c b/drivers/gpu/drm/i915/intel_pcode.c index a234d9b4ed14..3db2ba439bb5 100644 --- a/drivers/gpu/drm/i915/intel_pcode.c +++ b/drivers/gpu/drm/i915/intel_pcode.c @@ -204,15 +204,42 @@ int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request, #undef COND } +static int pcode_init_wait(struct intel_uncore *uncore, int timeout_ms) +{ + if (__intel_wait_for_register_fw(uncore, + GEN6_PCODE_MAILBOX, + GEN6_PCODE_READY, 0, + 500, timeout_ms, + NULL)) + return -EPROBE_DEFER; + + return skl_pcode_request(uncore, + DG1_PCODE_STATUS, + DG1_UNCORE_GET_INIT_STATUS, + DG1_UNCORE_INIT_STATUS_COMPLETE, + DG1_UNCORE_INIT_STATUS_COMPLETE, timeout_ms); +} + int intel_pcode_init(struct intel_uncore *uncore) { + int err; + if (!IS_DGFX(uncore->i915)) return 0; - return skl_pcode_request(uncore, DG1_PCODE_STATUS, - DG1_UNCORE_GET_INIT_STATUS, - DG1_UNCORE_INIT_STATUS_COMPLETE, - DG1_UNCORE_INIT_STATUS_COMPLETE, 180000); + /* + * Wait 10 seconds so that the punit to settle and complete + * any outstanding transactions upon module load + */ + err = pcode_init_wait(uncore, 10000); + + if (err) { + drm_notice(&uncore->i915->drm, + "Waiting for HW initialisation...\n"); + err = pcode_init_wait(uncore, 180000); + } + + return err; } int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val)