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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mxIzGrzRphB46fE9vbEMk+V9ITmbXP3dOJ9vqGRvwZvsPVUmCzVsuG+72Vax2yJlw/F65nIGw8e8Ndg5FAcS+ltYQO313+F8gVmbteeafeLloZKRyfmFqJOAyBO+ni6W4x5pvLMyYJN4blFSzYifEmNF1mRH/MHL1IaDlCaiHo36JMhb1jZWQqHASILirgZhFGmQKoaZfZw0nEuaCeYQnMfTUh5nXx+nnzYq8/mcVoEOgXtp8lPqRabfSOkZ0xv0GVOlqF8n9eji7uELDP1olIiRWU5MT7ELmJbdVCZdf2Ewmqiw5jVoSVkhi1Zg/nvU732tuc+L+H4DASmWZAF2Rvy+vR1SHl4xg4hM0JVDCStbY6JRHucWiXFFDJMAdWZqsDP0oQqfI+njl9Djby3dzZQjxmvWwfJyPV2LukgQTL2BZjxu9BDCeMbWyfMe+c6fKyUDTca2rfFL6YFV4sgb42HvA/lPnxFm9CJlDYS4dwffTtItOkd7DTXbqjwAPE/xVHx1XMyObFWidlYZR8hLkwO7dONUgTg8xcugYzJaox+ZqB7KnWL/gm9Fj9nL6V8NBZnzb261QKK11tmbO81t0w0Tu25232XFqzPP8EGTkE8OB6Ee7ft8VWgXOc+ze1BKBHY27BOkEu75SruJS0AhLYEeCPqVdsyg0g0mpn/TPUnN3vyop/0TohQR3YCUk4GHxA8Y2K/KZqYwhZ/02bOR5p7bcFTtLOlY8PB3aT3lDxhPTKzSLthy4I28f2KTvKzlT7Vz0jgHbft//NBvpXHXyI8iyVZYF/EiaXoYXxgWV1LpUkZ04V8DOOeNOr6SVmq9juIcPVo8dvKXOJRd/EneNGdnm4PKtt1CjrZimuMtMvMG14VlQKBQ29Mt5dZcAxIBfVd5sE72TugM20DN7hWTdSQjEQt1Rzqvw+UvBSlvKwQcX0j8AB8TtLtKdZWWEnky7ggKf/4NPmp4xZ5M2nIB0tG81F9etDyxasmQKDxKrnSD+ygX36hJZoHDsqOsg7ZTsg6fADo7HelP8Wti7ENJStbzq4CPX9eUHME2nz7+VOL53MUviKs3MYt43sOYX+lsuSC/ShCkbLx6o59ZVAQoiEzVoj7Zpzu1CdSCIOAujwQTx09WFprCub4d19obo2GjtxEJVReeNFuZ/xoJx8KGe1vgOQ0C5ytHEtvEXyPcZeKwE8KMwocmNbQqv0A+i8iEyxf0IVEmOEULuKsqT5sWEwhUxE81UorF+oQwC2u+CoZlZk8CR4F2R0QV9kZlWhBjiiI8xSLBSG8MHmGtfNqQW2MVUOBT3DDcRg3QzUJIrndiXHVRcvu355XfSy7om/8VeK/8acOfdiaEXsIS7m83dRWveI9rkk7X7qEGGjpyms4QTFJCjO1Wl+RLTRK4gJfJwcb1ocQcZ8OndofkgiyxaUwyA9rDwcTxwRe+/2mSlMhLTLjmdt8cxjftVKZ6jUrTfHT8hTbhP2OUL5y0nYM/8+sMdkKBq6r9R9ZNT9fY1y/rgTeLEOsF/3x60u2ODfSPuOSslOoy4+r9l8VOBole4IiCmHgZe3SgYrj12Z6ZtsnLO54EXj1KRMo5vmGYl3Gf X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a0823b29-c3be-4f28-c09e-08daf51c855a X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB6341.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 04:13:27.3740 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Z65g5OtYK8A5U7W3pyWRURs7CnxMWN8PFnAq8eIRYoKr6r+azU34fVAz8npgvNEVDWEHy2+9KAwhqQkJdQBZFg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB7441 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230112_201331_257988_1FFA203B X-CRM114-Status: GOOD ( 12.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RealVideo, or also spelled as Real Video, is a suite of proprietary video compression formats developed by RealNetworks - the specific format changes with the version. RealVideo codecs are identified by four-character codes. RV30 and RV40 are RealNetworks' proprietary H.264-based codecs. Signed-off-by: Ming Qian Reviewed-by: Nicolas Dufresne --- .../media/v4l/pixfmt-compressed.rst | 21 +++++++++++++++++++ drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++ include/uapi/linux/videodev2.h | 2 ++ 3 files changed, 25 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst index a0230f357680..50ac095c1f16 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst @@ -237,6 +237,27 @@ Compressed Formats Metadata associated with the frame to decode is required to be passed through the ``V4L2_CID_STATELESS_FWHT_PARAMS`` control. See the :ref:`associated Codec Control ID `. + * .. _V4L2-PIX-FMT-RV30: + + - ``V4L2_PIX_FMT_RV30`` + - 'RV30' + - RealVideo, or also spelled as Real Video, is a suite of proprietary + video compression formats developed by RealNetworks - + the specific format changes with the version. + RealVideo codecs are identified by four-character codes. + RV30 corresponds to RealVideo 8, suspected to based largely on an early draft of H.264 + * .. _V4L2-PIX-FMT-RV40: + + - ``V4L2_PIX_FMT_RV40`` + - 'RV40' + - RV40 represents RealVideo 9 and RealVideo 10. + RealVideo 9, suspected to be based on H.264, + RealVideo 10, aka RV9 EHQ, This refers to + an improved encoder for the RV9 format + that is fully backwards compatible with RV9 players - + the format and decoder did not change, + only the encoder did. + As a result, it uses the same FourCC. .. raw:: latex diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index 9b5b04b8aa69..0546b00d3fc9 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1473,6 +1473,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_FWHT: descr = "FWHT"; break; /* used in vicodec */ case V4L2_PIX_FMT_FWHT_STATELESS: descr = "FWHT Stateless"; break; /* used in vicodec */ case V4L2_PIX_FMT_SPK: descr = "Sorenson Spark"; break; + case V4L2_PIX_FMT_RV30: descr = "RealVideo 8"; break; + case V4L2_PIX_FMT_RV40: descr = "RealVideo 9 & 10"; break; case V4L2_PIX_FMT_CPIA1: descr = "GSPCA CPiA YUV"; break; case V4L2_PIX_FMT_WNVA: descr = "WNVA"; break; case V4L2_PIX_FMT_SN9C10X: descr = "GSPCA SN9C10X"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index 262ef10cfa02..b121154a6e24 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -740,6 +740,8 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */ #define V4L2_PIX_FMT_HEVC_SLICE v4l2_fourcc('S', '2', '6', '5') /* HEVC parsed slices */ #define V4L2_PIX_FMT_SPK v4l2_fourcc('S', 'P', 'K', '0') /* Sorenson Spark */ +#define V4L2_PIX_FMT_RV30 v4l2_fourcc('R', 'V', '3', '0') /* RealVideo 8 */ +#define V4L2_PIX_FMT_RV40 v4l2_fourcc('R', 'V', '4', '0') /* RealVideo 9 & 10 */ /* Vendor-specific formats */ #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */ From patchwork Fri Jan 13 04:13:07 2023 Content-Type: text/plain; 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b=hjYIqeJYhS+vKWZrATua80RlQZ87Jd1akujQWYoQMF11d2iUKjL4jCPdLMnvLE2Togm9IuoECIOcQ/tHFtoP9ePeWLW7U6jGTyshcLu98ZhplYbx7yvhFiY2iFzGVbarJEPKvL57JWlchflQy0Yc57ZOQf5ujL1OfIWm11f7Qa8= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB6341.eurprd04.prod.outlook.com (2603:10a6:20b:d8::14) by AM8PR04MB7441.eurprd04.prod.outlook.com (2603:10a6:20b:1c4::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.12; Fri, 13 Jan 2023 04:13:31 +0000 Received: from AM6PR04MB6341.eurprd04.prod.outlook.com ([fe80::3a82:42b3:f1ed:5c3d]) by AM6PR04MB6341.eurprd04.prod.outlook.com ([fe80::3a82:42b3:f1ed:5c3d%7]) with mapi id 15.20.6002.013; Fri, 13 Jan 2023 04:13:31 +0000 From: Ming Qian To: mchehab@kernel.org, hverkuil-cisco@xs4all.nl Cc: shawnguo@kernel.org, robh+dt@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, xiahong.bao@nxp.com, eagle.zhou@nxp.com, tao.jiang_2@nxp.com, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/2] media: amphion: support to decode RealVideo video Date: Fri, 13 Jan 2023 12:13:07 +0800 Message-Id: <7e51bb1653eac32bcedffdff740fd0ebe8a96720.1673582851.git.ming.qian@nxp.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: X-ClientProxiedBy: SG2PR06CA0230.apcprd06.prod.outlook.com (2603:1096:4:ac::14) To AM6PR04MB6341.eurprd04.prod.outlook.com (2603:10a6:20b:d8::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB6341:EE_|AM8PR04MB7441:EE_ X-MS-Office365-Filtering-Correlation-Id: 695219ae-962b-457f-d4fd-08daf51c87e0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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RV30 and RV40 are support by amphion decoder. Signed-off-by: Ming Qian --- drivers/media/platform/amphion/vdec.c | 14 +++++++++++++ drivers/media/platform/amphion/vpu_malone.c | 23 +++++++++++++++++++++ drivers/media/platform/amphion/vpu_malone.h | 1 + 3 files changed, 38 insertions(+) diff --git a/drivers/media/platform/amphion/vdec.c b/drivers/media/platform/amphion/vdec.c index 09304b96f40d..03477998b9eb 100644 --- a/drivers/media/platform/amphion/vdec.c +++ b/drivers/media/platform/amphion/vdec.c @@ -172,6 +172,20 @@ static const struct vpu_format vdec_formats[] = { .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED }, + { + .pixfmt = V4L2_PIX_FMT_RV30, + .mem_planes = 1, + .comp_planes = 1, + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, + .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED + }, + { + .pixfmt = V4L2_PIX_FMT_RV40, + .mem_planes = 1, + .comp_planes = 1, + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, + .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED + }, {0, 0, 0, 0}, }; diff --git a/drivers/media/platform/amphion/vpu_malone.c b/drivers/media/platform/amphion/vpu_malone.c index 67ba637c4c7f..26039741166a 100644 --- a/drivers/media/platform/amphion/vpu_malone.c +++ b/drivers/media/platform/amphion/vpu_malone.c @@ -68,6 +68,8 @@ #define STREAM_CONFIG_NUM_DBE_SET(x, y) CONFIG_SET(x, y, 30, 0x40000000) #define STREAM_CONFIG_FS_CTRL_MODE_SET(x, y) CONFIG_SET(x, y, 31, 0x80000000) +#define MALONE_DEC_FMT_RV_MASK BIT(21) + enum vpu_malone_stream_input_mode { INVALID_MODE = 0, FRAME_LVL, @@ -478,6 +480,9 @@ u32 vpu_malone_get_version(struct vpu_shared_addr *shared) { struct malone_iface *iface = shared->iface; + vpu_malone_enable_format(V4L2_PIX_FMT_RV30, iface->fw_version & MALONE_DEC_FMT_RV_MASK); + vpu_malone_enable_format(V4L2_PIX_FMT_RV40, iface->fw_version & MALONE_DEC_FMT_RV_MASK); + return iface->fw_version; } @@ -563,8 +568,22 @@ static struct malone_fmt_mapping fmt_mappings[] = { {V4L2_PIX_FMT_JPEG, MALONE_FMT_JPG}, {V4L2_PIX_FMT_VP8, MALONE_FMT_VP8}, {V4L2_PIX_FMT_SPK, MALONE_FMT_SPK}, + {V4L2_PIX_FMT_RV30, MALONE_FMT_RV}, + {V4L2_PIX_FMT_RV40, MALONE_FMT_RV}, }; +void vpu_malone_enable_format(u32 pixelformat, int enable) +{ + u32 i; + + for (i = 0; i < ARRAY_SIZE(fmt_mappings); i++) { + if (pixelformat == fmt_mappings[i].pixelformat) { + fmt_mappings[i].is_disabled = enable ? 0 : 1; + return; + } + } +} + static enum vpu_malone_format vpu_malone_format_remap(u32 pixelformat) { u32 i; @@ -989,6 +1008,8 @@ static const struct malone_padding_scode padding_scodes[] = { {SCODE_PADDING_EOS, V4L2_PIX_FMT_H263, {0xb1010000, 0x0}}, {SCODE_PADDING_EOS, V4L2_PIX_FMT_VP8, {0x34010000, 0x0}}, {SCODE_PADDING_EOS, V4L2_PIX_FMT_SPK, {0x34010000, 0x0}}, + {SCODE_PADDING_EOS, V4L2_PIX_FMT_RV30, {0x34010000, 0x0}}, + {SCODE_PADDING_EOS, V4L2_PIX_FMT_RV40, {0x34010000, 0x0}}, {SCODE_PADDING_EOS, V4L2_PIX_FMT_JPEG, {0xefff0000, 0x0}}, {SCODE_PADDING_ABORT, V4L2_PIX_FMT_H264, {0x0B010000, 0}}, {SCODE_PADDING_ABORT, V4L2_PIX_FMT_H264_MVC, {0x0B010000, 0}}, @@ -1001,6 +1022,8 @@ static const struct malone_padding_scode padding_scodes[] = { {SCODE_PADDING_ABORT, V4L2_PIX_FMT_H263, {0xb1010000, 0x0}}, {SCODE_PADDING_ABORT, V4L2_PIX_FMT_VP8, {0x34010000, 0x0}}, {SCODE_PADDING_ABORT, V4L2_PIX_FMT_SPK, {0x34010000, 0x0}}, + {SCODE_PADDING_ABORT, V4L2_PIX_FMT_RV30, {0x34010000, 0x0}}, + {SCODE_PADDING_ABORT, V4L2_PIX_FMT_RV40, {0x34010000, 0x0}}, {SCODE_PADDING_EOS, V4L2_PIX_FMT_JPEG, {0x0, 0x0}}, {SCODE_PADDING_BUFFLUSH, V4L2_PIX_FMT_H264, {0x15010000, 0x0}}, {SCODE_PADDING_BUFFLUSH, V4L2_PIX_FMT_H264_MVC, {0x15010000, 0x0}}, diff --git a/drivers/media/platform/amphion/vpu_malone.h b/drivers/media/platform/amphion/vpu_malone.h index 02a9d9530970..c95b53629199 100644 --- a/drivers/media/platform/amphion/vpu_malone.h +++ b/drivers/media/platform/amphion/vpu_malone.h @@ -41,5 +41,6 @@ int vpu_malone_post_cmd(struct vpu_shared_addr *shared, u32 instance); int vpu_malone_init_instance(struct vpu_shared_addr *shared, u32 instance); u32 vpu_malone_get_max_instance_count(struct vpu_shared_addr *shared); bool vpu_malone_check_fmt(enum vpu_core_type type, u32 pixelfmt); +void vpu_malone_enable_format(u32 pixelformat, int enable); #endif