From patchwork Fri Jan 13 09:22:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jing Zhang X-Patchwork-Id: 13100361 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2CCFC54EBE for ; Fri, 13 Jan 2023 09:24:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=o6TEeUGucf1BGIa9kzdFDEBiNrGIgUVMK/qE8N/Oefg=; b=rVVJc9nWosgjHV WmOg9c9kqQT5meVpnIgDWiHEACfKgxEIAtQdzKNi7rFHR/rylJIEQZ96F02BKMTXdI7kfq6aDqEgJ fjWaVB7Ma++K1kvxgzIlQ/v7ixfDGhs9VUndakp7Z46lmVhXVcVsWsu2vsvARt06JFZ+FTugMUnYL L4R06uobg7WaoVhziqwJ7xpnw1A/GrjFCfnU8mmK1h6Rl2eoU8T3/EvZ7msDe0NaCcrb+MAimTfcd DsB5Bbte5ZfbPoOSqKrr6gFqWR7+lDIKdFjnb312hgLdrirBocbFf12H/CsM1YyyCcfjytIoR73ue VLuxU7K4P4JPvbfp8sFg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGGH4-001RAQ-3v; Fri, 13 Jan 2023 09:22:58 +0000 Received: from out30-133.freemail.mail.aliyun.com ([115.124.30.133]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGGGq-001R4C-BY for linux-arm-kernel@lists.infradead.org; Fri, 13 Jan 2023 09:22:47 +0000 X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R601e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018045168;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZUDRTA_1673601753; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZUDRTA_1673601753) by smtp.aliyun-inc.com; Fri, 13 Jan 2023 17:22:34 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v7 1/9] perf pmu: Add #slots literal support for arm64 Date: Fri, 13 Jan 2023 17:22:12 +0800 Message-Id: <1673601740-122788-2-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230113_012244_669058_2F64A958 X-CRM114-Status: GOOD ( 19.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The slots in each architecture may be different, so add #slots literal to obtain the slots of different architectures, and the #slots can be applied in the metric. Currently, The #slots just support for arm64, and other architectures will return NAN. On arm64, the value of slots is from the register PMMIR_EL1.SLOT, which I can read in /sys/bus/event_source/device/armv8_pmuv3_*/caps/slots. PMMIR_EL1.SLOT might read as zero if the PMU version is lower than ID_AA64DFR0_EL1_PMUVer_V3P4 or the STALL_SLOT event is not implemented. Signed-off-by: Jing Zhang --- tools/perf/arch/arm64/util/pmu.c | 34 ++++++++++++++++++++++++++++++++-- tools/perf/util/expr.c | 5 +++++ tools/perf/util/pmu.c | 6 ++++++ tools/perf/util/pmu.h | 1 + 4 files changed, 44 insertions(+), 2 deletions(-) diff --git a/tools/perf/arch/arm64/util/pmu.c b/tools/perf/arch/arm64/util/pmu.c index 477e513..5f8667b 100644 --- a/tools/perf/arch/arm64/util/pmu.c +++ b/tools/perf/arch/arm64/util/pmu.c @@ -3,8 +3,9 @@ #include #include "../../../util/cpumap.h" #include "../../../util/pmu.h" +#include -const struct pmu_events_table *pmu_events_table__find(void) +static struct perf_pmu *pmu_core__find_same(void) { struct perf_pmu *pmu = NULL; @@ -19,8 +20,37 @@ const struct pmu_events_table *pmu_events_table__find(void) if (pmu->cpus->nr != cpu__max_cpu().cpu) return NULL; - return perf_pmu__find_table(pmu); + return pmu; } return NULL; } + +const struct pmu_events_table *pmu_events_table__find(void) +{ + struct perf_pmu *pmu = pmu_core__find_same(); + + if (pmu) + return perf_pmu__find_table(pmu); + + return NULL; +} + +double perf_pmu__cpu_slots_per_cycle(void) +{ + char path[PATH_MAX]; + unsigned long long slots = 0; + struct perf_pmu *pmu = pmu_core__find_same(); + + if (pmu) { + scnprintf(path, PATH_MAX, + EVENT_SOURCE_DEVICE_PATH "%s/caps/slots", pmu->name); + /* + * The value of slots is not greater than 32 bits, but sysfs__read_int + * can't read value with 0x prefix, so use sysfs__read_ull instead. + */ + sysfs__read_ull(path, &slots); + } + + return (double)slots; +} diff --git a/tools/perf/util/expr.c b/tools/perf/util/expr.c index 00dcde3..9d3076a 100644 --- a/tools/perf/util/expr.c +++ b/tools/perf/util/expr.c @@ -19,6 +19,7 @@ #include #include #include +#include "pmu.h" #ifdef PARSER_DEBUG extern int expr_debug; @@ -448,6 +449,10 @@ double expr__get_literal(const char *literal, const struct expr_scanner_ctx *ctx result = topology->core_cpus_lists; goto out; } + if (!strcmp("#slots", literal)) { + result = perf_pmu__cpu_slots_per_cycle() ?: NAN; + goto out; + } pr_err("Unrecognized literal '%s'", literal); out: diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 2bdeb89..cbb4fbf 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "debug.h" #include "evsel.h" #include "pmu.h" @@ -1993,3 +1994,8 @@ int perf_pmu__cpus_match(struct perf_pmu *pmu, struct perf_cpu_map *cpus, *ucpus_ptr = unmatched_cpus; return 0; } + +double __weak perf_pmu__cpu_slots_per_cycle(void) +{ + return NAN; +} diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h index 69ca000..fd414ba 100644 --- a/tools/perf/util/pmu.h +++ b/tools/perf/util/pmu.h @@ -259,4 +259,5 @@ int perf_pmu__cpus_match(struct perf_pmu *pmu, struct perf_cpu_map *cpus, char *pmu_find_real_name(const char *name); char *pmu_find_alias_name(const char *name); +double perf_pmu__cpu_slots_per_cycle(void); #endif /* __PMU_H */ From patchwork Fri Jan 13 09:22:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jing Zhang X-Patchwork-Id: 13100359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92148C54EBD for ; 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Fri, 13 Jan 2023 09:22:49 +0000 Received: from out30-110.freemail.mail.aliyun.com ([115.124.30.110]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGGGq-001R4M-9L for linux-arm-kernel@lists.infradead.org; Fri, 13 Jan 2023 09:22:47 +0000 X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R101e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018046056;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZUDRTP_1673601754; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZUDRTP_1673601754) by smtp.aliyun-inc.com; Fri, 13 Jan 2023 17:22:35 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v7 2/9] perf jevent: Add general metrics support Date: Fri, 13 Jan 2023 17:22:13 +0800 Message-Id: <1673601740-122788-3-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230113_012244_593938_591BFD15 X-CRM114-Status: UNSURE ( 9.04 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add general metrics support, so that some general metrics applicable to multiple architectures can be defined in the public json file like general events, and then add general metrics through "arch_std_event" in json file of different architecture. Signed-off-by: Jing Zhang Acked-by: Ian Rogers --- tools/perf/pmu-events/jevents.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py index 4c398e0..0416b74 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -358,6 +358,8 @@ def preprocess_arch_std_files(archpath: str) -> None: for event in read_json_events(item.path, topic=''): if event.name: _arch_std_events[event.name.lower()] = event + if event.metric_name: + _arch_std_events[event.metric_name.lower()] = event def print_events_table_prefix(tblname: str) -> None: From patchwork Fri Jan 13 09:22:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jing Zhang X-Patchwork-Id: 13100363 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E0B5AC54EBD for ; Fri, 13 Jan 2023 09:24:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yv9PVOyeWLS/Z13hMM8FyiTA2bxTY7yBA9hF7NmyvPA=; b=gojYmz+v7epwuA xi+LD05rd67xFUv50/gzIAqeDzz8BcSz5inPFy+vLulLStqD2K9Z454nbYtKNQJQz6DpbPx/LPhhp Z8aBoz4J4n1fmbXJGrzpAvidpsOGH31AB2IYXJbWm3JMepW/qFlhntXhgEubhrah8Uo2raeZH5N5b 3YuXImCCbdMO0I9suPKnPjySalEFCwLJHzCA0oKJAPq4olYPi/TJWYxwNAdAoUfxbRVdQ2+CaihN2 AAwTvwMeqP/rTLwA5MDxR/3vwv3DuYrUa7kRnQJ3S9HpROdu4r+bXD+2vrSc9IHJ05ofktMUdxE8L T6BIzLykuyotQrGW4h0A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGGHU-001RGJ-El; Fri, 13 Jan 2023 09:23:26 +0000 Received: from out30-8.freemail.mail.aliyun.com ([115.124.30.8]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGGGr-001R4F-Es for linux-arm-kernel@lists.infradead.org; Fri, 13 Jan 2023 09:22:50 +0000 X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R101e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018045170;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZUDRTd_1673601755; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZUDRTd_1673601755) by smtp.aliyun-inc.com; Fri, 13 Jan 2023 17:22:36 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v7 3/9] perf vendor events arm64: Add common topdown L1 metrics Date: Fri, 13 Jan 2023 17:22:14 +0800 Message-Id: <1673601740-122788-4-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230113_012246_574114_099F8CD1 X-CRM114-Status: GOOD ( 10.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The metrics of topdown L1 are from ARM sbsa7.0 platform design doc[0], D37-38, which are standard. So put them in the common file sbsa.json of arm64, so that other cores besides n2/v2 can also be reused. [0] https://documentation-service.arm.com/static/60250c7395978b529036da86?token= Signed-off-by: Jing Zhang --- tools/perf/pmu-events/arch/arm64/sbsa.json | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/sbsa.json diff --git a/tools/perf/pmu-events/arch/arm64/sbsa.json b/tools/perf/pmu-events/arch/arm64/sbsa.json new file mode 100644 index 0000000..f678c37e --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/sbsa.json @@ -0,0 +1,30 @@ +[ + { + "MetricExpr": "stall_slot_frontend / (#slots * cpu_cycles)", + "BriefDescription": "Frontend bound L1 topdown metric", + "MetricGroup": "TopdownL1", + "MetricName": "frontend_bound", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "(1 - op_retired / op_spec) * (1 - stall_slot / (#slots * cpu_cycles))", + "BriefDescription": "Bad speculation L1 topdown metric", + "MetricGroup": "TopdownL1", + "MetricName": "bad_speculation", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "(op_retired / op_spec) * (1 - stall_slot / (#slots * cpu_cycles))", + "BriefDescription": "Retiring L1 topdown metric", + "MetricGroup": "TopdownL1", + "MetricName": "retiring", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "stall_slot_backend / (#slots * cpu_cycles)", + "BriefDescription": "Backend Bound L1 topdown metric", + "MetricGroup": "TopdownL1", + "MetricName": "backend_bound", + "ScaleUnit": "100%" + } +] From patchwork Fri Jan 13 09:22:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jing Zhang X-Patchwork-Id: 13100362 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 46FD1C54EBD for ; Fri, 13 Jan 2023 09:24:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dig5Th2ZBNeeuKoUMQmuu75ro2T9shXrHw8a0C9902g=; b=RpmXxSoyHHdpKo zFetP4/+CiDGuFbhnW5UPPpvXy+VLHv5UkCmwFCjGwhfXnNzpXG6sgwGRPoNCuMw85QPil7inwSL5 li1C5TwNSU6ftPsx6gyU+B9p66HuHXHVRLCOpxC2ImkKAbOGlimWZW5OWE1/S8spa0q87hB+wVHHO Klr5kd4l3EjZZttz6IDgQOJ2/qcP2gHQfM1WZZOgshLGLZLxVgVwC9lpcFTBtcAsHwuFaoj8LOfsP Ys17hpCpyb6U8cGvyQLHoIZaWSgesSbUR3cqEL5TMw7S+70zaytnfSV7TfMCOst9VlE4lPyUQZtRG 6/6POnOFKbHPYat+4teA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGGHK-001RDf-Ny; Fri, 13 Jan 2023 09:23:14 +0000 Received: from out30-131.freemail.mail.aliyun.com ([115.124.30.131]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pGGGq-001R4K-Ep for linux-arm-kernel@lists.infradead.org; Fri, 13 Jan 2023 09:22:49 +0000 X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R151e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018046059;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZUDRU7_1673601756; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZUDRU7_1673601756) by smtp.aliyun-inc.com; Fri, 13 Jan 2023 17:22:37 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v7 4/9] perf vendor events arm64: Add topdown L1 metrics for neoverse-n2-v2 Date: Fri, 13 Jan 2023 17:22:15 +0800 Message-Id: <1673601740-122788-5-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230113_012244_760102_5A339E26 X-CRM114-Status: GOOD ( 11.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add general topdown L1 metrics for neoverse-n2-v2. Due to the wrong count of stall_slot and stall_slot_frontend on neoverse-n2, the real stall_slot and real stall_slot_frontend need to subtract cpu_cycles, so overwrite the "MetricExpr" for neoverse-n2 which slots are 5. Reference from ARM neoverse-n2 errata notice [0], D117. Since neoverse-n2/neoverse-v2 does not yet support topdown L2, metric groups such as Cache, TLB, Branch, InstructionsMix and PEutilization will be added to further analysis of performance bottlenecks in the following patches. Reference from ARM PMU guide [1][2]. [0] https://documentation-service.arm.com/static/636a66a64e6cf12278ad89cb?token= [1] https://documentation-service.arm.com/static/628f8fa3dfaf015c2b76eae8?token= [2] https://documentation-service.arm.com/static/62cfe21e31ea212bb6627393?token= Signed-off-by: Jing Zhang --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json new file mode 100644 index 0000000..4e7417f --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -0,0 +1,17 @@ +[ + { + "ArchStdEvent": "FRONTEND_BOUND", + "MetricExpr": "((stall_slot_frontend) if (#slots - 5) else (stall_slot_frontend - cpu_cycles)) / (#slots * cpu_cycles)" + }, + { + "ArchStdEvent": "BAD_SPECULATION", + "MetricExpr": "(1 - op_retired / op_spec) * (1 - (stall_slot if (#slots - 5) else (stall_slot - cpu_cycles)) / (#slots * cpu_cycles))" + }, + { + "ArchStdEvent": "RETIRING", + "MetricExpr": "(op_retired / op_spec) * (1 - (stall_slot if (#slots - 5) else (stall_slot - cpu_cycles)) / (#slots * cpu_cycles))" + }, + { + "ArchStdEvent": "BACKEND_BOUND" + } +] From patchwork Fri Jan 13 09:22:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jing Zhang X-Patchwork-Id: 13100368 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B493BC54EBE for ; Fri, 13 Jan 2023 09:25:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=X68Oe3g1XpFOE97oZefPGiBe2OGCjcAAnPDYm+9KovQ=; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add TLB related metrics. Signed-off-by: Jing Zhang --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index 4e7417f..60bbd8f 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -13,5 +13,54 @@ }, { "ArchStdEvent": "BACKEND_BOUND" + }, + { + "MetricExpr": "L1D_TLB_REFILL / L1D_TLB", + "BriefDescription": "The rate of L1D TLB refill to the overall L1D TLB lookups", + "MetricGroup": "TLB", + "MetricName": "l1d_tlb_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L1I_TLB_REFILL / L1I_TLB", + "BriefDescription": "The rate of L1I TLB refill to the overall L1I TLB lookups", + "MetricGroup": "TLB", + "MetricName": "l1i_tlb_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L2D_TLB_REFILL / L2D_TLB", + "BriefDescription": "The rate of L2D TLB refill to the overall L2D TLB lookups", + "MetricGroup": "TLB", + "MetricName": "l2_tlb_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "DTLB_WALK / INST_RETIRED * 1000", + "BriefDescription": "The rate of TLB Walks per kilo instructions for data accesses", + "MetricGroup": "TLB", + "MetricName": "dtlb_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "DTLB_WALK / L1D_TLB", + "BriefDescription": "The rate of DTLB Walks to the overall L1D TLB lookups", + "MetricGroup": "TLB", + "MetricName": "dtlb_walk_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "ITLB_WALK / INST_RETIRED * 1000", + "BriefDescription": "The rate of TLB Walks per kilo instructions for instruction accesses", + "MetricGroup": "TLB", + "MetricName": "itlb_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "ITLB_WALK / L1I_TLB", + "BriefDescription": "The rate of ITLB Walks to the overall L1I TLB lookups", + "MetricGroup": "TLB", + "MetricName": "itlb_walk_rate", + "ScaleUnit": "100%" } ] From patchwork Fri Jan 13 09:22:17 2023 Content-Type: text/plain; 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Fri, 13 Jan 2023 17:22:39 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v7 6/9] perf vendor events arm64: Add cache metrics for neoverse-n2-v2 Date: Fri, 13 Jan 2023 17:22:17 +0800 Message-Id: <1673601740-122788-7-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230113_012247_415863_88759CFA X-CRM114-Status: UNSURE ( 7.73 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cache related metrics. Signed-off-by: Jing Zhang --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index 60bbd8f..08c6aaa 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -62,5 +62,82 @@ "MetricGroup": "TLB", "MetricName": "itlb_walk_rate", "ScaleUnit": "100%" + }, + { + "MetricExpr": "L1I_CACHE_REFILL / INST_RETIRED * 1000", + "BriefDescription": "The rate of L1 I-Cache misses per kilo instructions", + "MetricGroup": "Cache", + "MetricName": "l1i_cache_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "L1I_CACHE_REFILL / L1I_CACHE", + "BriefDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache", + "MetricGroup": "Cache", + "MetricName": "l1i_cache_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L1D_CACHE_REFILL / INST_RETIRED * 1000", + "BriefDescription": "The rate of L1 D-Cache misses per kilo instructions", + "MetricGroup": "Cache", + "MetricName": "l1d_cache_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "L1D_CACHE_REFILL / L1D_CACHE", + "BriefDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache", + "MetricGroup": "Cache", + "MetricName": "l1d_cache_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L2D_CACHE_REFILL / INST_RETIRED * 1000", + "BriefDescription": "The rate of L2 D-Cache misses per kilo instructions", + "MetricGroup": "Cache", + "MetricName": "l2d_cache_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "L2D_CACHE_REFILL / L2D_CACHE", + "BriefDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache", + "MetricGroup": "Cache", + "MetricName": "l2d_cache_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L3D_CACHE_REFILL / INST_RETIRED * 1000", + "BriefDescription": "The rate of L3 D-Cache misses per kilo instructions", + "MetricGroup": "Cache", + "MetricName": "l3d_cache_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "L3D_CACHE_REFILL / L3D_CACHE", + "BriefDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache", + "MetricGroup": "Cache", + "MetricName": "l3d_cache_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "LL_CACHE_MISS_RD / INST_RETIRED * 1000", + "BriefDescription": "The rate of LL Cache read misses per kilo instructions", + "MetricGroup": "Cache", + "MetricName": "ll_cache_read_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "LL_CACHE_MISS_RD / LL_CACHE_RD", + "BriefDescription": "The rate of LL Cache read misses to the overall LL Cache read", + "MetricGroup": "Cache", + "MetricName": "ll_cache_read_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "(LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD", + "BriefDescription": "The rate of LL Cache read hit to the overall LL Cache read", + "MetricGroup": "Cache", + "MetricName": "ll_cache_read_hit_rate", + "ScaleUnit": "100%" } ] From patchwork Fri Jan 13 09:22:18 2023 Content-Type: text/plain; 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Fri, 13 Jan 2023 17:22:40 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v7 7/9] perf vendor events arm64: Add branch metrics for neoverse-n2-v2 Date: Fri, 13 Jan 2023 17:22:18 +0800 Message-Id: <1673601740-122788-8-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673601740-122788-1-git-send-email-renyu.zj@linux.alibaba.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230113_012245_188945_7F0B61B8 X-CRM114-Status: UNSURE ( 7.83 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add branch related metrics. Signed-off-by: Jing Zhang --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index 08c6aaa..afcdb17 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -139,5 +139,26 @@ "MetricGroup": "Cache", "MetricName": "ll_cache_read_hit_rate", "ScaleUnit": "100%" + }, + { + "MetricExpr": "BR_MIS_PRED_RETIRED / INST_RETIRED * 1000", + "BriefDescription": "The rate of branches mis-predicted per kilo instructions", + "MetricGroup": "Branch", + "MetricName": "branch_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "BR_RETIRED / INST_RETIRED * 1000", + "BriefDescription": "The rate of branches retired per kilo instructions", + "MetricGroup": "Branch", + "MetricName": "branch_pki", + "ScaleUnit": "1PKI" + }, + { + "MetricExpr": "BR_MIS_PRED_RETIRED / BR_RETIRED", + "BriefDescription": "The rate of branches mis-predited to the overall branches", + "MetricGroup": "Branch", + "MetricName": "branch_miss_pred_rate", + "ScaleUnit": "100%" } ] From patchwork Fri Jan 13 09:22:19 2023 Content-Type: text/plain; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add PE utilization related metrics. In cpu_utilization metric, if it is neoverse-n2 which slots are 5, the real stall_slot need to subtract the cpu_cycles according to the neoverse-n2 errata [0]. [0] https://documentation-service.arm.com/static/636a66a64e6cf12278ad89cb?token= Signed-off-by: Jing Zhang --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index afcdb17..3d6ac0c 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -160,5 +160,51 @@ "MetricGroup": "Branch", "MetricName": "branch_miss_pred_rate", "ScaleUnit": "100%" + }, + { + "MetricExpr": "instructions / CPU_CYCLES", + "BriefDescription": "The average number of instructions executed for each cycle.", + "MetricGroup": "PEutilization", + "MetricName": "ipc" + }, + { + "MetricExpr": "ipc / 5", + "BriefDescription": "IPC percentage of peak. The peak of IPC is 5.", + "MetricGroup": "PEutilization", + "MetricName": "ipc_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "INST_RETIRED / CPU_CYCLES", + "BriefDescription": "Architecturally executed Instructions Per Cycle (IPC)", + "MetricGroup": "PEutilization", + "MetricName": "retired_ipc" + }, + { + "MetricExpr": "INST_SPEC / CPU_CYCLES", + "BriefDescription": "Speculatively executed Instructions Per Cycle (IPC)", + "MetricGroup": "PEutilization", + "MetricName": "spec_ipc" + }, + { + "MetricExpr": "OP_RETIRED / OP_SPEC", + "BriefDescription": "Of all the micro-operations issued, what percentage are retired(committed)", + "MetricGroup": "PEutilization", + "MetricName": "retired_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "1 - OP_RETIRED / OP_SPEC", + "BriefDescription": "Of all the micro-operations issued, what percentage are not retired(committed)", + "MetricGroup": "PEutilization", + "MetricName": "wasted_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "OP_RETIRED / OP_SPEC * (1 - (STALL_SLOT if (#slots - 5) else (STALL_SLOT - CPU_CYCLES)) / (#slots * CPU_CYCLES))", + "BriefDescription": "The truly effective ratio of micro-operations executed by the CPU, which means that misprediction and stall are not included", + "MetricGroup": "PEutilization", + "MetricName": "cpu_utilization", + "ScaleUnit": "100%" } ] From patchwork Fri Jan 13 09:22:20 2023 Content-Type: text/plain; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add instruction mix related metrics. Signed-off-by: Jing Zhang --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 63 ++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index 3d6ac0c..8ad15b7 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -206,5 +206,68 @@ "MetricGroup": "PEutilization", "MetricName": "cpu_utilization", "ScaleUnit": "100%" + }, + { + "MetricExpr": "LD_SPEC / INST_SPEC", + "BriefDescription": "The rate of load instructions speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "load_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "ST_SPEC / INST_SPEC", + "BriefDescription": "The rate of store instructions speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "store_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "DP_SPEC / INST_SPEC", + "BriefDescription": "The rate of integer data-processing instructions speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "data_process_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "ASE_SPEC / INST_SPEC", + "BriefDescription": "The rate of advanced SIMD instructions speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "advanced_simd_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "VFP_SPEC / INST_SPEC", + "BriefDescription": "The rate of floating point instructions speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "float_point_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "CRYPTO_SPEC / INST_SPEC", + "BriefDescription": "The rate of crypto instructions speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "crypto_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "BR_IMMED_SPEC / INST_SPEC", + "BriefDescription": "The rate of branch immediate instructions speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "branch_immed_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "BR_RETURN_SPEC / INST_SPEC", + "BriefDescription": "The rate of procedure return instructions speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "branch_return_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "BR_INDIRECT_SPEC / INST_SPEC", + "BriefDescription": "The rate of indirect branch instructions speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "branch_indirect_spec_rate", + "ScaleUnit": "100%" } ]