From patchwork Wed Jan 18 09:18:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 13105925 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73CF6C32793 for ; Wed, 18 Jan 2023 09:19:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3H00j2meD0H3kd9WrEUtL41VfL2badY7f4jsfXZDLVw=; b=AmDxV8oLZ4wuPr DFYl4iRJOok7kFdspX87E1i60ToNPCD2PNmJylLwDix1t/aJGgg8hzadbP3R0PcuqDn66Edk4lEZZ JkZYMHxkcZcptF/djuXsMkNfsUUyGm7w3qQOL62K9eL18ewWNKmofnjJzMuFHh4gfp+Jk5iZ407Da PFr4wgupa/i3tumv76T1V8DSXk/f7yV7AE2ikdYYz5JyYuitacss7eLyEWZP9mZKwIukutFyQOoCM /xeJqE5LObGFT3IypYp479Kp2gIyfpNwMnPgeMzQLB4jL1DsgbHBxfykSfHaT7jCw7K3Tw7waCZZW /Q4vKh+m9w+eAGp4/evQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pI4ai-00036I-4P; Wed, 18 Jan 2023 09:18:44 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pI4ae-000344-Iq; Wed, 18 Jan 2023 09:18:42 +0000 X-UUID: 14e47ae0971111eda08d4d6090ec5a5c-20230118 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=6UfPCtl41bcfH9eSwKhVX1fjAFc/UHUKxbvv3r6mvds=; b=SvC//2bRggVvktgzV1FhI3auixHAwCnKv0wUE+ymUOEo8VrUI65Pzz/tQjwR6WSjhiQ6hZwv0OHTy+Bl1QD6a4wupn+rQBPEv6DifxjilNST2APGwCoyNh+AwbECi2P7KRQKwmh1/9eRFimqwlReQZ41+KvqUbFnQ9nnuvpouiQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.18,REQID:ec2d6fcf-a8ff-4ba6-9299-3acad5d0dc19,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:3ca2d6b,CLOUDID:1b4b0055-dd49-462e-a4be-2143a3ddc739,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0 X-CID-BVR: 0,NGT X-UUID: 14e47ae0971111eda08d4d6090ec5a5c-20230118 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 643738186; Wed, 18 Jan 2023 02:18:33 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Wed, 18 Jan 2023 17:18:31 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 18 Jan 2023 17:18:31 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Stephen Boyd , AngeloGioacchino Del Regno , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 1/9] arm64: dts: mediatek: mt8186: Add MTU3 nodes Date: Wed, 18 Jan 2023 17:18:21 +0800 Message-ID: <20230118091829.755-2-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230118091829.755-1-allen-kh.cheng@mediatek.com> References: <20230118091829.755-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230118_011840_654441_04A2E3BC X-CRM114-Status: GOOD ( 11.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add MTU3 nodes for MT8186 SoC. Signed-off-by: Allen-KH Cheng Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 75 ++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index c0a3afd55eaf..3d88480913eb 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -908,6 +908,43 @@ status = "disabled"; }; + ssusb0: usb@11201000 { + compatible = "mediatek,mt8186-mtu3", + "mediatek,mtu3"; + reg = <0 0x11201000 0 0x2dff>, + <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + clocks = <&topckgen CLK_TOP_USB_TOP>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>, + <&infracfg_ao CLK_INFRA_AO_ICUSB>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; + interrupts = ; + phys = <&u2port0 PHY_TYPE_USB2>; + power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + usb_host0: usb@11200000 { + compatible = "mediatek,mt8186-xhci", + "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x1000>; + reg-names = "mac"; + clocks = <&topckgen CLK_TOP_USB_TOP>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>, + <&infracfg_ao CLK_INFRA_AO_ICUSB>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; + interrupts = ; + mediatek,syscon-wakeup = <&pericfg 0x420 2>; + wakeup-source; + status = "disabled"; + }; + }; + mmc0: mmc@11230000 { compatible = "mediatek,mt8186-mmc", "mediatek,mt8183-mmc"; @@ -939,6 +976,44 @@ status = "disabled"; }; + ssusb1: usb@11281000 { + compatible = "mediatek,mt8186-mtu3", + "mediatek,mtu3"; + reg = <0 0x11281000 0 0x2dff>, + <0 0x11283e00 0 0x0100>; + reg-names = "mac", "ippc"; + clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>, + <&clk26m>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; + interrupts = ; + phys = <&u2port1 PHY_TYPE_USB2>, + <&u3port1 PHY_TYPE_USB3>; + power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + usb_host1: usb@11280000 { + compatible = "mediatek,mt8186-xhci", + "mediatek,mtk-xhci"; + reg = <0 0x11280000 0 0x1000>; + reg-names = "mac"; + clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>, + <&clk26m>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_XHCI>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck","xhci_ck"; + interrupts = ; + mediatek,syscon-wakeup = <&pericfg 0x424 2>; + wakeup-source; + status = "disabled"; + }; + }; + u3phy0: t-phy@11c80000 { compatible = "mediatek,mt8186-tphy", "mediatek,generic-tphy-v2"; From patchwork Wed Jan 18 09:18:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 13105928 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E02C6C32793 for ; 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Wed, 18 Jan 2023 02:19:05 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Wed, 18 Jan 2023 17:18:31 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 18 Jan 2023 17:18:31 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Stephen Boyd , AngeloGioacchino Del Regno , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 2/9] dt-bindings: spmi: spmi-mtk-pmif: Document mediatek,mt8195-spmi as fallback of mediatek,mt8186-spmi Date: Wed, 18 Jan 2023 17:18:22 +0800 Message-ID: <20230118091829.755-3-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230118091829.755-1-allen-kh.cheng@mediatek.com> References: <20230118091829.755-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230118_091902_126540_748DF8F6 X-CRM114-Status: GOOD ( 11.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The mt8186-spmi is used as compatible with mt8195-spmi on the MT8186, document this situation. Signed-off-by: Allen-KH Cheng Reviewed-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger --- .../devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml index abcbbe13723f..e4f465abcfe9 100644 --- a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -18,9 +18,14 @@ allOf: properties: compatible: - enum: - - mediatek,mt6873-spmi - - mediatek,mt8195-spmi + oneOf: + - enum: + - mediatek,mt6873-spmi + - mediatek,mt8195-spmi + - items: + - enum: + - mediatek,mt8186-spmi + - const: mediatek,mt8195-spmi reg: maxItems: 2 From patchwork Wed Jan 18 09:18:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 13105960 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D680BC32793 for ; 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Wed, 18 Jan 2023 02:29:09 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Wed, 18 Jan 2023 17:18:32 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 18 Jan 2023 17:18:32 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Stephen Boyd , AngeloGioacchino Del Regno , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 3/9] arm64: dts: mediatek: mt8186: Add SPMI node Date: Wed, 18 Jan 2023 17:18:23 +0800 Message-ID: <20230118091829.755-4-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230118091829.755-1-allen-kh.cheng@mediatek.com> References: <20230118091829.755-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230118_012913_079100_7A2CB209 X-CRM114-Status: GOOD ( 11.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add SPMI node for MT8186 SoC. Signed-off-by: Allen-KH Cheng --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 3d88480913eb..a8ff984f1192 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -605,6 +605,25 @@ clock-names = "spi", "wrap"; }; + spmi: spmi@10015000 { + compatible = "mediatek,mt8186-spmi", + "mediatek,mt8195-spmi"; + reg = <0 0x10015000 0 0x000e00>, + <0 0x1001B000 0 0x000100>; + reg-names = "pmif", "spmimst"; + clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>, + <&infracfg_ao CLK_INFRA_AO_PMIC_TMR>, + <&topckgen CLK_TOP_SPMI_MST>; + clock-names = "pmif_sys_ck", + "pmif_tmr_ck", + "spmimst_clk_mux"; + assigned-clocks = <&topckgen CLK_TOP_SPMI_MST>; + assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>; + interrupts = , + ; + status = "disabled"; + }; + systimer: timer@10017000 { compatible = "mediatek,mt8186-timer", "mediatek,mt6765-timer"; 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Wed, 18 Jan 2023 17:18:33 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Stephen Boyd , AngeloGioacchino Del Regno , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 4/9] arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes Date: Wed, 18 Jan 2023 17:18:24 +0800 Message-ID: <20230118091829.755-5-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230118091829.755-1-allen-kh.cheng@mediatek.com> References: <20230118091829.755-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230118_091901_454883_093960E7 X-CRM114-Status: GOOD ( 10.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add ADSP mailbox node for MT8186 SoC. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index a8ff984f1192..a0b7dacc10cd 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -640,6 +640,20 @@ interrupts = ; }; + adsp_mailbox0: mailbox@10686000 { + compatible = "mediatek,mt8186-adsp-mbox"; + #mbox-cells = <0>; + reg = <0 0x10686100 0 0x1000>; + interrupts = ; + }; + + adsp_mailbox1: mailbox@10687000 { + compatible = "mediatek,mt8186-adsp-mbox"; + #mbox-cells = <0>; + reg = <0 0x10687100 0 0x1000>; + interrupts = ; + }; + nor_flash: spi@11000000 { compatible = "mediatek,mt8186-nor"; reg = <0 0x11000000 0 0x1000>; From patchwork Wed Jan 18 09:18:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 13105926 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 55F12C004D4 for ; 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Wed, 18 Jan 2023 02:18:36 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Wed, 18 Jan 2023 17:18:33 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 18 Jan 2023 17:18:33 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Stephen Boyd , AngeloGioacchino Del Regno , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 5/9] arm64: dts: mediatek: mt8186: Add ADSP node Date: Wed, 18 Jan 2023 17:18:25 +0800 Message-ID: <20230118091829.755-6-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230118091829.755-1-allen-kh.cheng@mediatek.com> References: <20230118091829.755-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230118_091843_265856_65E9D8DF X-CRM114-Status: GOOD ( 11.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add ADSP node for MT8186 SoC. Signed-off-by: Allen-KH Cheng --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index a0b7dacc10cd..2700c830316f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -640,6 +640,26 @@ interrupts = ; }; + adsp: adsp@10680000 { + compatible = "mediatek,mt8186-dsp"; + reg = <0 0x10680000 0 0x2000>, + <0 0x10800000 0 0x100000>, + <0 0x1068b000 0 0x100>, + <0 0x1068f000 0 0x1000>; + reg-names = "cfg", "sram", "sec", "bus"; + clocks = <&topckgen CLK_TOP_AUDIODSP>, + <&topckgen CLK_TOP_ADSP_BUS>; + clock-names = "audiodsp", + "adsp_bus"; + assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>, + <&topckgen CLK_TOP_ADSP_BUS>; + assigned-clock-parents = <&clk26m>, <&topckgen CLK_TOP_MAINPLL_D2_D2>; + mbox-names = "rx", "tx"; + mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>; + power-domains = <&spm MT8186_POWER_DOMAIN_ADSP_TOP>; + status = "disabled"; + }; + adsp_mailbox0: mailbox@10686000 { compatible = "mediatek,mt8186-adsp-mbox"; #mbox-cells = <0>; From patchwork Wed Jan 18 09:18:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 13105929 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D692C32793 for ; Wed, 18 Jan 2023 09:21:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Wed, 18 Jan 2023 17:18:34 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 18 Jan 2023 17:18:34 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Stephen Boyd , AngeloGioacchino Del Regno , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 6/9] arm64: dts: mediatek: mt8186: Add audio controller node Date: Wed, 18 Jan 2023 17:18:26 +0800 Message-ID: <20230118091829.755-7-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230118091829.755-1-allen-kh.cheng@mediatek.com> References: <20230118091829.755-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230118_011914_926587_5FCFC109 X-CRM114-Status: GOOD ( 11.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add audio controller node for MT8186 SoC. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 62 ++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 2700c830316f..c52f9be1e750 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -998,6 +998,68 @@ }; }; + afe: audio-controller@11210000 { + compatible = "mediatek,mt8186-sound"; + reg = <0 0x11210000 0 0x2000>; + clocks = <&infracfg_ao CLK_INFRA_AO_AUDIO>, + <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_BCLK>, + <&topckgen CLK_TOP_AUDIO>, + <&topckgen CLK_TOP_AUD_INTBUS>, + <&topckgen CLK_TOP_MAINPLL_D2_D4>, + <&topckgen CLK_TOP_AUD_1>, + <&apmixedsys CLK_APMIXED_APLL1>, + <&topckgen CLK_TOP_AUD_2>, + <&apmixedsys CLK_APMIXED_APLL2>, + <&topckgen CLK_TOP_AUD_ENGEN1>, + <&topckgen CLK_TOP_APLL1_D8>, + <&topckgen CLK_TOP_AUD_ENGEN2>, + <&topckgen CLK_TOP_APLL2_D8>, + <&topckgen CLK_TOP_APLL_I2S0_MCK_SEL>, + <&topckgen CLK_TOP_APLL_I2S1_MCK_SEL>, + <&topckgen CLK_TOP_APLL_I2S2_MCK_SEL>, + <&topckgen CLK_TOP_APLL_I2S4_MCK_SEL>, + <&topckgen CLK_TOP_APLL_TDMOUT_MCK_SEL>, + <&topckgen CLK_TOP_APLL12_CK_DIV0>, + <&topckgen CLK_TOP_APLL12_CK_DIV1>, + <&topckgen CLK_TOP_APLL12_CK_DIV2>, + <&topckgen CLK_TOP_APLL12_CK_DIV4>, + <&topckgen CLK_TOP_APLL12_CK_DIV_TDMOUT_M>, + <&topckgen CLK_TOP_AUDIO_H>, + <&clk26m>; + clock-names = "aud_infra_clk", + "mtkaif_26m_clk", + "top_mux_audio", + "top_mux_audio_int", + "top_mainpll_d2_d4", + "top_mux_aud_1", + "top_apll1_ck", + "top_mux_aud_2", + "top_apll2_ck", + "top_mux_aud_eng1", + "top_apll1_d8", + "top_mux_aud_eng2", + "top_apll2_d8", + "top_i2s0_m_sel", + "top_i2s1_m_sel", + "top_i2s2_m_sel", + "top_i2s4_m_sel", + "top_tdm_m_sel", + "top_apll12_div0", + "top_apll12_div1", + "top_apll12_div2", + "top_apll12_div4", + "top_apll12_div_tdm", + "top_mux_audio_h", + "top_clk26m_clk"; + interrupts = ; + mediatek,apmixedsys = <&apmixedsys>; + mediatek,infracfg = <&infracfg_ao>; + mediatek,topckgen = <&topckgen>; + resets = <&watchdog MT8186_TOPRGU_AUDIO_SW_RST>; + reset-names = "audiosys"; + status = "disabled"; + }; + mmc0: mmc@11230000 { compatible = "mediatek,mt8186-mmc", "mediatek,mt8183-mmc"; From patchwork Wed Jan 18 09:18:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 13105930 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18C4CC004D4 for ; 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Wed, 18 Jan 2023 02:19:06 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Wed, 18 Jan 2023 17:18:35 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 18 Jan 2023 17:18:35 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Stephen Boyd , AngeloGioacchino Del Regno , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 8/9] dt-bindings: display: mediatek: Fix the fallback for mediatek,mt8186-disp-ccorr Date: Wed, 18 Jan 2023 17:18:28 +0800 Message-ID: <20230118091829.755-9-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230118091829.755-1-allen-kh.cheng@mediatek.com> References: <20230118091829.755-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230118_091903_008717_137D48DE X-CRM114-Status: GOOD ( 13.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The mt8186-disp-ccorr is not fully compatible with the mt8183-disp-ccorr implementation. It causes a crash when system resumes if it binds to the device. We should use mt8192-disp-ccorr as fallback of mt8186-disp-ccorr. Fixes: 8a26ea19d4dc ("dt-bindings: display: mediatek: add MT8186 SoC binding") Signed-off-by: Allen-KH Cheng Reviewed-by: Rob Herring Reviewed-by: Matthias Brugger --- .../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml index 63fb02014a56..117e3db43f84 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml @@ -32,7 +32,7 @@ properties: - items: - enum: - mediatek,mt8186-disp-ccorr - - const: mediatek,mt8183-disp-ccorr + - const: mediatek,mt8192-disp-ccorr reg: maxItems: 1 From patchwork Wed Jan 18 09:18:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 13105982 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25181C004D4 for ; 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Wed, 18 Jan 2023 02:29:39 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Wed, 18 Jan 2023 17:18:36 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 18 Jan 2023 17:18:36 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Stephen Boyd , AngeloGioacchino Del Regno , CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2 9/9] arm64: dts: mediatek: mt8186: Add display nodes Date: Wed, 18 Jan 2023 17:18:29 +0800 Message-ID: <20230118091829.755-10-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230118091829.755-1-allen-kh.cheng@mediatek.com> References: <20230118091829.755-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230118_094527_546508_F8B21BB6 X-CRM114-Status: GOOD ( 12.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add display nodes and GCE info for MT8186 SoC. Also, add GCE (Global Command Engine) properties to the display nodes in order to enable the usage of the CMDQ (Command Queue), which is required for operating the display. Signed-off-by: Allen-KH Cheng --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 135 +++++++++++++++++++++++ 1 file changed, 135 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 45b9d6777929..90d1b631bc8f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -5,6 +5,7 @@ */ /dts-v1/; #include +#include #include #include #include @@ -19,6 +20,13 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + ovl = &ovl; + ovl_2l= &ovl_2l; + rdma0 = &rdma0; + rdma1 = &rdma1; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -632,6 +640,15 @@ clocks = <&clk13m>; }; + gce: mailbox@1022c000 { + compatible = "mediatek,mt8186-gce"; + reg = <0 0X1022c000 0 0x4000>; + clocks = <&infracfg_ao CLK_INFRA_AO_GCE>; + clock-names = "gce"; + interrupts = ; + #mbox-cells = <2>; + }; + scp: scp@10500000 { compatible = "mediatek,mt8186-scp"; reg = <0 0x10500000 0 0x40000>, @@ -1197,6 +1214,20 @@ reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; #reset-cells = <1>; + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, + <&gce 1 CMDQ_THR_PRIO_HIGHEST>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; + }; + + mutex: mutex@14001000 { + compatible = "mediatek,mt8186-disp-mutex"; + reg = <0 0x14001000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_MUTEX0>; + interrupts = ; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; + mediatek,gce-events = , + ; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; }; smi_common: smi@14002000 { @@ -1230,6 +1261,49 @@ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; }; + ovl: ovl@14005000 { + compatible = "mediatek,mt8186-disp-ovl", + "mediatek,mt8192-disp-ovl"; + reg = <0 0x14005000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_OVL0>; + interrupts = ; + iommus = <&iommu_mm IOMMU_PORT_L0_OVL_RDMA0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + + ovl_2l: ovl@14006000 { + compatible = "mediatek,mt8186-disp-ovl-2l", + "mediatek,mt8192-disp-ovl-2l"; + reg = <0 0x14006000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_OVL0_2L>; + interrupts = ; + iommus = <&iommu_mm IOMMU_PORT_L1_OVL_2L_RDMA0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + + rdma0: rdma@14007000 { + compatible = "mediatek,mt8186-disp-rdma", + "mediatek,mt8183-disp-rdma"; + reg = <0 0x14007000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_RDMA0>; + interrupts = ; + iommus = <&iommu_mm IOMMU_PORT_L1_DISP_RDMA0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x7000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + + color: color@14009000 { + compatible = "mediatek,mt8186-disp-color", + "mediatek,mt8173-disp-color"; + reg = <0 0x14009000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_COLOR0>; + interrupts = ; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x8000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + dpi: dpi@1400a000 { compatible = "mediatek,mt8186-dpi"; reg = <0 0x1400a000 0 0x1000>; @@ -1247,6 +1321,56 @@ }; }; + ccorr: ccorr@1400b000 { + compatible = "mediatek,mt8186-disp-ccorr", + "mediatek,mt8192-disp-ccorr"; + reg = <0 0x1400b000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_CCORR0>; + interrupts = ; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + + aal: aal@1400c000 { + compatible = "mediatek,mt8186-disp-aal", + "mediatek,mt8183-disp-aal"; + reg = <0 0x1400c000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_AAL0>; + interrupts = ; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + + gamma: gamma@1400d000 { + compatible = "mediatek,mt8186-disp-gamma", + "mediatek,mt8183-disp-gamma"; + reg = <0 0x1400d000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_GAMMA0>; + interrupts = ; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + + postmask: postmask@1400e000 { + compatible = "mediatek,mt8186-disp-postmask", + "mediatek,mt8192-disp-postmask"; + reg = <0 0x1400e000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_POSTMASK0>; + interrupts = ; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + + dither: dither@1400f000 { + compatible = "mediatek,mt8186-disp-dither", + "mediatek,mt8183-disp-dither"; + reg = <0 0x1400f000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_DITHER0>; + interrupts = ; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + dsi0: dsi@14013000 { compatible = "mediatek,mt8186-dsi"; reg = <0 0x14013000 0 0x1000>; @@ -1280,6 +1404,17 @@ #iommu-cells = <1>; }; + rdma1: rdma@1401f000 { + compatible = "mediatek,mt8186-disp-rdma", + "mediatek,mt8183-disp-rdma"; + reg = <0 0x1401f000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_RDMA1>; + interrupts = ; + iommus = <&iommu_mm IOMMU_PORT_L1_DISP_RDMA1>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xf000 0x1000>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; + }; + wpesys: clock-controller@14020000 { compatible = "mediatek,mt8186-wpesys"; reg = <0 0x14020000 0 0x1000>;