From patchwork Wed Jan 18 19:30:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 13106971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65627C32793 for ; Wed, 18 Jan 2023 19:31:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229630AbjARTbq (ORCPT ); Wed, 18 Jan 2023 14:31:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230204AbjARTbL (ORCPT ); Wed, 18 Jan 2023 14:31:11 -0500 Received: from mail-oa1-f47.google.com (mail-oa1-f47.google.com [209.85.160.47]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E90EE5529B; Wed, 18 Jan 2023 11:31:02 -0800 (PST) Received: by mail-oa1-f47.google.com with SMTP id 586e51a60fabf-15eec491b40so14379fac.12; Wed, 18 Jan 2023 11:31:02 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=L0sk6WSE6h2ySUyFVnUkIwye39tqP2uFGs/tVLLc9YM=; b=GbUUEGHKYs7yUxTUj2T6CBo45/8GXSZiZEwaS2E8y3Otjfyap5m91qemhsyKvmKd/9 oGV9GVmm5S/k62QuR63NOkL7Tu5+XU7/I+bTfKwyJaU9d0eNIiB0SUdxAtZBPLbH3zbY nyZKiEZlpQshAkJGD3LtUtqnhvFS7JA+epWquLd+U3WcZhVkuGJS7bjXZSIhDW37jZgA 6wKGyL75NaD2rFVr8DqdVnv0ZhI8NoB63Lkch7fJNScmwadATAA2uU/g0E9tl9V4rJML gqBTnE5UA75Ym3ZCIrru9toaTYH8wt3C1NWMf4oqAEcGlILc9JDj8h0U3ghgg0Lppp57 l6mQ== X-Gm-Message-State: AFqh2krhcHgVxOQ9vulo7NvNqAOQzL6TqswcbnVaBPfuk3JNqkdKv8hv IVRj/0OVDzGfQkRWG1JJDw== X-Google-Smtp-Source: AMrXdXsAOEkXzjlCDtKORZICvzXTbloceRTTyJ1tdkrIkJ1m0D2pIsRTPrNjsQbT6tvOlUoaFZrhPw== X-Received: by 2002:a05:6870:bf0d:b0:148:3440:cfde with SMTP id qh13-20020a056870bf0d00b001483440cfdemr4472842oab.28.1674070262146; Wed, 18 Jan 2023 11:31:02 -0800 (PST) Received: from robh_at_kernel.org ([4.31.143.193]) by smtp.gmail.com with ESMTPSA id f18-20020a056871071200b0014f81d27ce3sm18948186oap.55.2023.01.18.11.31.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Jan 2023 11:31:01 -0800 (PST) Received: (nullmailer pid 673650 invoked by uid 1000); Wed, 18 Jan 2023 19:31:01 -0000 From: Rob Herring To: Greg Kroah-Hartman , Krzysztof Kozlowski , Felipe Balbi Cc: Johan Jonker , linux-rockchip@lists.infradead.org, Heiko Stuebner , Thinh Nguyen , linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: usb: snps,dwc3: Allow power-domains property Date: Wed, 18 Jan 2023 13:30:55 -0600 Message-Id: <20230118193056.673514-1-robh@kernel.org> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The Rockchip RK3399 DWC3 node has 'power-domains' property which isn't allowed by the schema: usb@fe900000: Unevaluated properties are not allowed ('power-domains' was unexpected) Allow DWC3 nodes to have a power-domains entry. We could instead move the power-domains property to the parent wrapper node, but the could be an ABI break (Linux shouldn't care). Also, we don't want to encourage the pattern of wrapper nodes just to define resources such as clocks, resets, power-domains, etc. when not necessary. Signed-off-by: Rob Herring Reviewed-by: Thinh Nguyen --- v2: - Allow 2 power domains and explain what they are --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index 6d78048c4613..be36956af53b 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -91,6 +91,16 @@ properties: - usb2-phy - usb3-phy + power-domains: + description: + The DWC3 has 2 power-domains. The power management unit (PMU) and + everything else. The PMU is typically always powered and may not have an + entry. + minItems: 1 + items: + - description: Core + - description: Power management unit + resets: minItems: 1 From patchwork Wed Jan 18 19:30:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 13106970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23424C38159 for ; Wed, 18 Jan 2023 19:31:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229813AbjARTbl (ORCPT ); Wed, 18 Jan 2023 14:31:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229570AbjARTbM (ORCPT ); Wed, 18 Jan 2023 14:31:12 -0500 Received: from mail-oa1-f45.google.com (mail-oa1-f45.google.com [209.85.160.45]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 282CA5528C; Wed, 18 Jan 2023 11:31:04 -0800 (PST) Received: by mail-oa1-f45.google.com with SMTP id 586e51a60fabf-1322d768ba7so70983fac.5; Wed, 18 Jan 2023 11:31:04 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=my6ZdLv862wYg9TxuhtKrEA+XZxlWplWgg57C2nOybM=; b=3W0gbLgGOTLrnd0diGGd4nnZbcVSDE2Vnc0SOo24K1mXzqblWJ5bK+2oe/11tqBpVB 1ymHvmcQa8CniU9veO//4JcEBragnBJSUPZxPaGXIHXgRXFnjzPeU7SC/7aQAt/DFuKU /TyBwEU1XL8MUWi3dQpsKckz5mJVqLCsCGkEnZTN7J+SSNYdQX0rjRjcfR2qDOW3My97 PHJhm/1Uq/uTrAydC3g5S1ZfN5QWpSmUDtU/vdnBOym5cCcRkjU3q5Znn0IisueSK9Yj LGpKPL9A5AUsOoZ/XUERyeCzISfbHhunsoWfyW2UM3w0LrbqYjVSxtltwGQnewzWXdvf 3KZQ== X-Gm-Message-State: AFqh2krkaVw3+jixIgDHesBHqsv8ety3nEq4M+XjMMnXpQoPhGLNCU+K 3HzyyIRvCUDoV1ujZ1B6gA== X-Google-Smtp-Source: AMrXdXuTYP5x9FCt8KmW/4bqFsCXQmRSADl5rnPcURlrjiznG1eL4rfMkjqN8aHngMRnog6MAtQkNA== X-Received: by 2002:a05:6870:7997:b0:15b:9fb0:864c with SMTP id he23-20020a056870799700b0015b9fb0864cmr4818573oab.19.1674070263292; Wed, 18 Jan 2023 11:31:03 -0800 (PST) Received: from robh_at_kernel.org ([4.31.143.193]) by smtp.gmail.com with ESMTPSA id eq2-20020a056870a90200b0014fb4bdc746sm18709458oab.8.2023.01.18.11.31.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Jan 2023 11:31:02 -0800 (PST) Received: (nullmailer pid 673667 invoked by uid 1000); Wed, 18 Jan 2023 19:31:01 -0000 From: Rob Herring To: Greg Kroah-Hartman , Krzysztof Kozlowski , Felipe Balbi , Heiko Stuebner Cc: Johan Jonker , linux-rockchip@lists.infradead.org, Thinh Nguyen , linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] dt-bindings: usb: rockchip,dwc3: Move RK3399 to its own schema Date: Wed, 18 Jan 2023 13:30:56 -0600 Message-Id: <20230118193056.673514-2-robh@kernel.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230118193056.673514-1-robh@kernel.org> References: <20230118193056.673514-1-robh@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The rockchip,dwc3.yaml schema defines a single DWC3 node, but the RK3399 uses the discouraged parent wrapper node and child 'generic' DWC3 node. The intent was to modify the RK3399 DTs to use a single node, but the DT changes were rejected for ABI reasons. However, the schema was accepted as-is. To fix this, we need to move the RK3399 binding to its own schema file. The RK3328 and RK3568 bindings are correct and use a single node. Cc: Johan Jonker Signed-off-by: Rob Herring --- .../bindings/usb/rockchip,dwc3.yaml | 10 +- .../bindings/usb/rockchip,rk3399-dwc3.yaml | 115 ++++++++++++++++++ 2 files changed, 119 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml index b3798d94d2fd..edb130c780e4 100644 --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml @@ -29,7 +29,6 @@ select: contains: enum: - rockchip,rk3328-dwc3 - - rockchip,rk3399-dwc3 - rockchip,rk3568-dwc3 required: - compatible @@ -39,7 +38,6 @@ properties: items: - enum: - rockchip,rk3328-dwc3 - - rockchip,rk3399-dwc3 - rockchip,rk3568-dwc3 - const: snps,dwc3 @@ -90,7 +88,7 @@ required: examples: - | - #include + #include #include bus { @@ -98,11 +96,11 @@ examples: #size-cells = <2>; usbdrd3_0: usb@fe800000 { - compatible = "rockchip,rk3399-dwc3", "snps,dwc3"; + compatible = "rockchip,rk3328-dwc3", "snps,dwc3"; reg = <0x0 0xfe800000 0x0 0x100000>; interrupts = ; - clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>, - <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>; + clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, + <&cru ACLK_USB3OTG>; clock-names = "ref_clk", "suspend_clk", "bus_clk", "grf_clk"; dr_mode = "otg"; diff --git a/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml new file mode 100644 index 000000000000..e39a8a3a7ab3 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/rockchip,rk3399-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3399 SuperSpeed DWC3 USB SoC controller + +maintainers: + - Heiko Stuebner + +properties: + compatible: + const: rockchip,rk3399-dwc3 + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + + ranges: true + + clocks: + items: + - description: + Controller reference clock, must to be 24 MHz + - description: + Controller suspend clock, must to be 24 MHz or 32 KHz + - description: + Master/Core clock, must to be >= 62.5 MHz for SS + operation and >= 30MHz for HS operation + - description: + USB3 aclk peri + - description: + USB3 aclk + - description: + Controller grf clock + + clock-names: + items: + - const: ref_clk + - const: suspend_clk + - const: bus_clk + - const: aclk_usb3_rksoc_axi_perf + - const: aclk_usb3 + - const: grf_clk + + resets: + maxItems: 1 + + reset-names: + const: usb3-otg + +patternProperties: + '^usb@': + $ref: snps,dwc3.yaml# + +additionalProperties: false + +required: + - compatible + - '#address-cells' + - '#size-cells' + - ranges + - clocks + - clock-names + - resets + - reset-names + +examples: + - | + #include + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + usb { + compatible = "rockchip,rk3399-dwc3"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>, + <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, + <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; + clock-names = "ref_clk", "suspend_clk", + "bus_clk", "aclk_usb3_rksoc_axi_perf", + "aclk_usb3", "grf_clk"; + resets = <&cru SRST_A_USB3_OTG0>; + reset-names = "usb3-otg"; + + usb@fe800000 { + compatible = "snps,dwc3"; + reg = <0x0 0xfe800000 0x0 0x100000>; + interrupts = ; + clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>, + <&cru SCLK_USB3OTG0_SUSPEND>; + clock-names = "ref", "bus_early", "suspend"; + dr_mode = "otg"; + phys = <&u2phy0_otg>, <&tcphy0_usb3>; + phy-names = "usb2-phy", "usb3-phy"; + phy_type = "utmi_wide"; + snps,dis_enblslpm_quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis_u2_susphy_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + power-domains = <&power RK3399_PD_USB3>; + }; + }; + }; +...