From patchwork Fri Jan 25 10:13:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinath Mannam X-Patchwork-Id: 10780967 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0F45E746 for ; Fri, 25 Jan 2019 10:14:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F1F6629A40 for ; Fri, 25 Jan 2019 10:14:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E655D29BBC; Fri, 25 Jan 2019 10:14:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AC90729A40 for ; Fri, 25 Jan 2019 10:14:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729238AbfAYKOO (ORCPT ); Fri, 25 Jan 2019 05:14:14 -0500 Received: from mail-yb1-f194.google.com ([209.85.219.194]:36110 "EHLO mail-yb1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728310AbfAYKOK (ORCPT ); Fri, 25 Jan 2019 05:14:10 -0500 Received: by mail-yb1-f194.google.com with SMTP id c65so2001660ybc.3 for ; Fri, 25 Jan 2019 02:14:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FyX1ArXOVKvRPOp9yrfUP0CSUTYZC9LeUmgndjP+YYQ=; b=Gom59CLttiaYZxslOybT9vf3fqbH7AFri5n3BxXtJ7RNSLMgi0cCWDVthrbS+GZRR2 6B3qCmBp+yQI7dvQ3hWw/X1/tJvOzj3z4ETB+L5eKi3cuSp8NMp/eru2OUFayEmRH2ge DSor2h+FVtKHhp7AJzc1cWNsGhVRmN03vL6Kw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FyX1ArXOVKvRPOp9yrfUP0CSUTYZC9LeUmgndjP+YYQ=; b=Khc6HDXlyEb15Yc5D75NqBZ1aFfYmb7/J33rPnXZfyOfxt3YiUb6+E3GtgvxhhQcqs 39ut6TM1X5RjK7QTSZWlUmVQ/v/R9BEocS7HSozijvNrpbB/oplfXxrwxQnmDML236NW cF2PNAxiPPnShzbb4Kw4wDx1aERIItSfYU+Jt5aENU59hYuya8ox6V5CvPVp28p6kmyk C/WRrj6o+3cREZGUETdAR5O+IgR6d6D4wogmp3OF6sgBWmJxXX0+2vDaFXKradS/xZBx Iw0k9oVP7AvCcB0gItiMM4LMf2iBUuNmz9sPbz8NebtAg5OkjtlNujB32lqr3eN+RkUe +PlQ== X-Gm-Message-State: AJcUukcbuHDLQE1NlFLl0+7jIuar8nY6zHnmDtKjDs5q8IDFXK9kJoU1 OwN2VSSD/YBgBA7AVydx8zASSg== X-Google-Smtp-Source: ALg8bN5NFieCYJeEbFL/ROggRLmjqQxOd+qKsHtnO3lkw1dFFvjboxm5G4RNl+us6HXapOEmhDB1Cg== X-Received: by 2002:a25:6a44:: with SMTP id f65mr9656151ybc.25.1548411249438; Fri, 25 Jan 2019 02:14:09 -0800 (PST) Received: from mannams-OptiPlex-7010.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id x203sm11868695ywd.41.2019.01.25.02.14.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 25 Jan 2019 02:14:08 -0800 (PST) From: Srinath Mannam To: Bjorn Helgaas , Robin Murphy , Joerg Roedel , Lorenzo Pieralisi , poza@codeaurora.org, Ray Jui Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Srinath Mannam Subject: [PATCH v3 1/3] PCI: Add dma-resv window list Date: Fri, 25 Jan 2019 15:43:49 +0530 Message-Id: <1548411231-27549-2-git-send-email-srinath.mannam@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548411231-27549-1-git-send-email-srinath.mannam@broadcom.com> References: <1548411231-27549-1-git-send-email-srinath.mannam@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a dma_resv parameter in PCI host bridge structure to hold resource entries list of memory regions for which IOVAs have to reserve. PCIe host driver will add resource entries to this list based on its requirements. Few inbound address ranges can't be allowed by few PCIe host, so those address ranges will be add to this list to avoid IOMMU mapping. While initializing IOMMU domain of PCI EPs connected to that host bridge IOVAs for this given list of address ranges will be reserved. Signed-off-by: Srinath Mannam Based-on-patch-by: Oza Pawandeep Reviewed-by: Oza Pawandeep --- drivers/pci/probe.c | 3 +++ include/linux/pci.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 257b9f6..fd4b143 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -544,6 +544,7 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t priv) return NULL; INIT_LIST_HEAD(&bridge->windows); + INIT_LIST_HEAD(&bridge->dma_resv); bridge->dev.release = pci_release_host_bridge_dev; /* @@ -572,6 +573,7 @@ struct pci_host_bridge *devm_pci_alloc_host_bridge(struct device *dev, return NULL; INIT_LIST_HEAD(&bridge->windows); + INIT_LIST_HEAD(&bridge->dma_resv); bridge->dev.release = devm_pci_release_host_bridge_dev; return bridge; @@ -581,6 +583,7 @@ EXPORT_SYMBOL(devm_pci_alloc_host_bridge); void pci_free_host_bridge(struct pci_host_bridge *bridge) { pci_free_resource_list(&bridge->windows); + pci_free_resource_list(&bridge->dma_resv); kfree(bridge); } diff --git a/include/linux/pci.h b/include/linux/pci.h index 65f1d8c..aa06105 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -487,6 +487,7 @@ struct pci_host_bridge { void *sysdata; int busnr; struct list_head windows; /* resource_entry */ + struct list_head dma_resv; /* reserv dma ranges */ u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* Platform IRQ swizzler */ int (*map_irq)(const struct pci_dev *, u8, u8); void (*release_fn)(struct pci_host_bridge *); From patchwork Fri Jan 25 10:13:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinath Mannam X-Patchwork-Id: 10780969 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B15A9746 for ; Fri, 25 Jan 2019 10:14:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A062F2E518 for ; Fri, 25 Jan 2019 10:14:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 943962E525; Fri, 25 Jan 2019 10:14:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3F5D12E518 for ; Fri, 25 Jan 2019 10:14:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729253AbfAYKOP (ORCPT ); Fri, 25 Jan 2019 05:14:15 -0500 Received: from mail-yb1-f194.google.com ([209.85.219.194]:40506 "EHLO mail-yb1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729212AbfAYKOO (ORCPT ); Fri, 25 Jan 2019 05:14:14 -0500 Received: by mail-yb1-f194.google.com with SMTP id i6so3611560ybo.7 for ; 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Fri, 25 Jan 2019 02:14:13 -0800 (PST) Received: from mannams-OptiPlex-7010.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id x203sm11868695ywd.41.2019.01.25.02.14.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 25 Jan 2019 02:14:13 -0800 (PST) From: Srinath Mannam To: Bjorn Helgaas , Robin Murphy , Joerg Roedel , Lorenzo Pieralisi , poza@codeaurora.org, Ray Jui Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Srinath Mannam Subject: [PATCH v3 2/3] iommu/dma: Reserve IOVA for PCI host reserve address list Date: Fri, 25 Jan 2019 15:43:50 +0530 Message-Id: <1548411231-27549-3-git-send-email-srinath.mannam@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548411231-27549-1-git-send-email-srinath.mannam@broadcom.com> References: <1548411231-27549-1-git-send-email-srinath.mannam@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PCI host bridge has list of resource entries contain address ranges for which IOVA address mapping has to be reserve. These address ranges are the address holes in dma-ranges DT property. It is similar to PCI IO resources address ranges reserving in IOMMU for each EP connected to host bridge. Signed-off-by: Srinath Mannam Based-on-patch-by: Oza Pawandeep Reviewed-by: Oza Pawandeep --- drivers/iommu/dma-iommu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index d19f3d6..81b591b 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -221,6 +221,14 @@ static void iova_reserve_pci_windows(struct pci_dev *dev, hi = iova_pfn(iovad, window->res->end - window->offset); reserve_iova(iovad, lo, hi); } + + /* Get reserved DMA windows from host bridge */ + resource_list_for_each_entry(window, &bridge->dma_resv) { + + lo = iova_pfn(iovad, window->res->start - window->offset); + hi = iova_pfn(iovad, window->res->end - window->offset); + reserve_iova(iovad, lo, hi); + } } static int iova_reserve_iommu_regions(struct device *dev, From patchwork Fri Jan 25 10:13:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinath Mannam X-Patchwork-Id: 10780971 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1EFAD746 for ; Fri, 25 Jan 2019 10:14:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0D9F92E509 for ; Fri, 25 Jan 2019 10:14:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 01F032E51F; Fri, 25 Jan 2019 10:14:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 752632E509 for ; Fri, 25 Jan 2019 10:14:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729293AbfAYKOU (ORCPT ); Fri, 25 Jan 2019 05:14:20 -0500 Received: from mail-yb1-f194.google.com ([209.85.219.194]:35559 "EHLO mail-yb1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728007AbfAYKOT (ORCPT ); Fri, 25 Jan 2019 05:14:19 -0500 Received: by mail-yb1-f194.google.com with SMTP id h81so3626317ybg.2 for ; Fri, 25 Jan 2019 02:14:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aQQQit55QHmXJGswuIk2GPbriFh4OnO1XEAJH5iCl+Q=; b=Walw7LEmrY78/PaXGY6jSqrM8c54p67KPHDtUSooLKJuYtwU7JMxagTyaq7ukxU+/2 MrRHR1Ypi+ofX4HJSEuvNLO0+KdgPVktntpdPyW8nNPoTLc2QwZ1fh/h9gjefDYKgmto 6z9Clk39QInS9bM9kjuCJuEnidP5cOjsNPkIc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aQQQit55QHmXJGswuIk2GPbriFh4OnO1XEAJH5iCl+Q=; b=a9Ej+XrM5N0jAteLnzZvEqYm+dM9pcWB52C0VAfDsr/igjp3EwjGndDsAylwMxmFkB Uqb/j70+ePswyceQjx32OVa2Fz0xK0C3cxMKYpO0C6lDzO1S0416HBMZCGbZa4bBsQyA bFfUXhk6AqLYAepKgefZyTbJw/Qbf3Wj/+8z/fRKkpVyhbZPkjWeEe+PZNU0IRnlNEDs EC1ECwUGaULL5Ax/z/j23deR7GnnVruDqB9ZNvTtN8QR3jRueZ576W8rEOdc9RZE1SMu iJ3eKKlJTb4nJAKwqO4zMkiEaRmYcsBwImhZDqg+27JU7c2fbML/uDTnJG+KfD5ECCkK i8/w== X-Gm-Message-State: AJcUukf5MTETbirbSpZBK5/dI+FEQCWNryiaqGskapYp2RA2/AqR19aZ hIUJVLM+3R1BXb/+P04qkKV9VA== X-Google-Smtp-Source: ALg8bN7zTpps7URaNCzKFj6K+J+PaB7zIuQ4bZaCs6mwJHsupOTkj7BfYrXE6cwu7eKmKwhgQJbWpQ== X-Received: by 2002:a25:3852:: with SMTP id f79mr9926521yba.139.1548411258338; Fri, 25 Jan 2019 02:14:18 -0800 (PST) Received: from mannams-OptiPlex-7010.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id x203sm11868695ywd.41.2019.01.25.02.14.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 25 Jan 2019 02:14:17 -0800 (PST) From: Srinath Mannam To: Bjorn Helgaas , Robin Murphy , Joerg Roedel , Lorenzo Pieralisi , poza@codeaurora.org, Ray Jui Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Srinath Mannam Subject: [PATCH v3 3/3] PCI: iproc: Add dma reserve resources to host Date: Fri, 25 Jan 2019 15:43:51 +0530 Message-Id: <1548411231-27549-4-git-send-email-srinath.mannam@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548411231-27549-1-git-send-email-srinath.mannam@broadcom.com> References: <1548411231-27549-1-git-send-email-srinath.mannam@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP IPROC host has the limitation that it can use only those address ranges given by dma-ranges property as inbound address. So that the memory address holes in dma-ranges should be reserved to allocate as DMA address. Inbound address of host accessed by PCIe devices will not be translated before it comes to IOMMU or directly to PE. But the limitation of this host is, access to few address ranges are ignored. So that IOVA ranges for these address ranges have to be reserved. All such addresses ranges are created as resource entries by parsing dma-ranges DT parameter and add to dma_resv list of PCI host bridge. Ex: dma-ranges = < \ 0x43000000 0x00 0x80000000 0x00 0x80000000 0x00 0x80000000 \ 0x43000000 0x08 0x00000000 0x08 0x00000000 0x08 0x00000000 \ 0x43000000 0x80 0x00000000 0x80 0x00000000 0x40 0x00000000> In the above example of dma-ranges, memory address from 0x0 - 0x80000000, 0x100000000 - 0x800000000, 0x1000000000 - 0x8000000000 and 0x10000000000 - 0xffffffffffffffff. are not allowed to use as inbound addresses. So that we need to add these address ranges to dma_resv list to reserve corresponding IOVA address ranges. Signed-off-by: Srinath Mannam Based-on-patch-by: Oza Pawandeep Reviewed-by: Oza Pawandeep --- drivers/pci/controller/pcie-iproc.c | 51 ++++++++++++++++++++++++++++++++++++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-iproc.c b/drivers/pci/controller/pcie-iproc.c index c20fd6b..b7bef1c 100644 --- a/drivers/pci/controller/pcie-iproc.c +++ b/drivers/pci/controller/pcie-iproc.c @@ -1146,25 +1146,74 @@ static int iproc_pcie_setup_ib(struct iproc_pcie *pcie, return ret; } +static int +iproc_pcie_add_dma_resv_range(struct device *dev, struct list_head *resources, + uint64_t start, uint64_t end) +{ + struct resource *res; + + res = devm_kzalloc(dev, sizeof(struct resource), GFP_KERNEL); + if (!res) + return -ENOMEM; + + res->start = (resource_size_t)start; + res->end = (resource_size_t)end; + pci_add_resource_offset(resources, res, 0); + + return 0; +} + static int iproc_pcie_map_dma_ranges(struct iproc_pcie *pcie) { + struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); struct of_pci_range range; struct of_pci_range_parser parser; int ret; + uint64_t start, end; + LIST_HEAD(resources); /* Get the dma-ranges from DT */ ret = of_pci_dma_range_parser_init(&parser, pcie->dev->of_node); if (ret) return ret; + start = 0; for_each_of_pci_range(&parser, &range) { + end = range.pci_addr; + /* dma-ranges list expected in sorted order */ + if (end < start) { + ret = -EINVAL; + goto out; + } /* Each range entry corresponds to an inbound mapping region */ ret = iproc_pcie_setup_ib(pcie, &range, IPROC_PCIE_IB_MAP_MEM); if (ret) - return ret; + goto out; + + if (end - start) { + ret = iproc_pcie_add_dma_resv_range(pcie->dev, + &resources, + start, end); + if (ret) + goto out; + } + start = range.pci_addr + range.size; } + end = DMA_BIT_MASK(sizeof(dma_addr_t) * BITS_PER_BYTE); + if (end - start) { + ret = iproc_pcie_add_dma_resv_range(pcie->dev, &resources, + start, end); + if (ret) + goto out; + } + + list_splice_init(&resources, &host->dma_resv); + return 0; +out: + pci_free_resource_list(&resources); + return ret; } static int iproce_pcie_get_msi(struct iproc_pcie *pcie,