From patchwork Mon Jan 23 22:50:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 13113126 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46635C25B50 for ; Mon, 23 Jan 2023 22:50:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233356AbjAWWuW (ORCPT ); Mon, 23 Jan 2023 17:50:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233366AbjAWWuV (ORCPT ); Mon, 23 Jan 2023 17:50:21 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E98132ED4B for ; Mon, 23 Jan 2023 14:50:18 -0800 (PST) Received: from pendragon.ideasonboard.com (213-243-189-158.bb.dnainternet.fi [213.243.189.158]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 1A4192D9; Mon, 23 Jan 2023 23:50:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1674514217; bh=iLnTqa8o8JUF2ADJgz2DwEoAGOoKy5OWZwjTdqT5Tkg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=o9iDMzVBcYh84iQ+F9eNeiwvAws4akMy/jgUFlSOFyKZ+7s2zRWeOo6bDT1LWo6Oy xDgf7Oxny1tj9a7ZhmCjIgdhx8cm22KceMIRm9nkyS2tpfahnZowz8vBOOnsf3jcOM GSY0J3cG71/Vh7Sl3YTYZBVHZ6z2keZenXs1PuoU= From: Laurent Pinchart To: dri-devel@lists.freedesktop.org Cc: linux-renesas-soc@vger.kernel.org, Tomi Valkeinen , Kieran Bingham , Geert Uytterhoeven , Koji Matsuoka Subject: [PATCH v3.1 4/7] drm: rcar-du: lvds: Fix stop sequence Date: Tue, 24 Jan 2023 00:50:13 +0200 Message-Id: <20230123225013.10476-1-laurent.pinchart+renesas@ideasonboard.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230123104742.227460-5-tomi.valkeinen+renesas@ideasonboard.com> References: <20230123104742.227460-5-tomi.valkeinen+renesas@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Koji Matsuoka According to hardware manual, LVDCR0 register must be cleared bit by bit when disabling LVDS. Signed-off-by: Koji Matsuoka Signed-off-by: LUU HOAI [tomi.valkeinen: simplified the code a bit] Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Signed-off-by: Laurent Pinchart --- Changes since v3: - Add comment explaining the register clear sequence --- drivers/gpu/drm/rcar-du/rcar_lvds.c | 31 +++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/rcar-du/rcar_lvds.c b/drivers/gpu/drm/rcar-du/rcar_lvds.c index a11201e4d31b..260ea5d8624e 100644 --- a/drivers/gpu/drm/rcar-du/rcar_lvds.c +++ b/drivers/gpu/drm/rcar-du/rcar_lvds.c @@ -83,6 +83,11 @@ struct rcar_lvds { #define bridge_to_rcar_lvds(b) \ container_of(b, struct rcar_lvds, bridge) +static u32 rcar_lvds_read(struct rcar_lvds *lvds, u32 reg) +{ + return ioread32(lvds->mmio + reg); +} + static void rcar_lvds_write(struct rcar_lvds *lvds, u32 reg, u32 data) { iowrite32(data, lvds->mmio + reg); @@ -544,6 +549,32 @@ static void rcar_lvds_atomic_disable(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state) { struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); + u32 lvdcr0; + + /* + * Clear the LVDCR0 bits in the order specified by the hardware + * documentation, ending with a write of 0 to the full register to + * clear all remaining bits. + */ + lvdcr0 = rcar_lvds_read(lvds, LVDCR0); + + lvdcr0 &= ~LVDCR0_LVRES; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + + if (lvds->info->quirks & RCAR_LVDS_QUIRK_GEN3_LVEN) { + lvdcr0 &= ~LVDCR0_LVEN; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + } + + if (lvds->info->quirks & RCAR_LVDS_QUIRK_PWD) { + lvdcr0 &= ~LVDCR0_PWD; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + } + + if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_EXT_PLL)) { + lvdcr0 &= ~LVDCR0_PLLON; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + } rcar_lvds_write(lvds, LVDCR0, 0); rcar_lvds_write(lvds, LVDCR1, 0);