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Fri, 27 Jan 2023 12:04:55 -0800 From: Nicolin Chen To: , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 1/4] iommu: Add a broken_unmanaged_domain flag in iommu_ops Date: Fri, 27 Jan 2023 12:04:17 -0800 Message-ID: <0875479d24a53670e17db8a11945664a6bb4a25b.1674849118.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT059:EE_|IA0PR12MB7531:EE_ X-MS-Office365-Filtering-Correlation-Id: f42cbbc0-a718-4abb-ac8f-08db00a1c9df X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zuSgDPdKH+iQ/mM5iESN3ezTXb4PN5DA1Pmljx8A5erhH+BQk9CMrzf7ua+i5qoO9AWsrBbuXbvXkCZnWyiabqE9jm4MZrWOOIAhS9bgaQjoKXucGAbYnmQH3I9FGqxbYh/m7ZXafmTy50V8X6mHCWfGbAaQIDDIDaz77TIVkWY/AEozp09B2WzaUNCCTolmgEHX2ys6bdBFqZF2HXObkuHk599P1P1o2OSIDaHT35K7DIQ9vYu5ufC8R6vfYfMsTQGFVEnAYxhMUNuwI93e+cg2wScERTFTydM1WG1IURk66gk7FzcRi7XVWngHtNJ7Loi35r2WO6yEQmLH8hOI3sT5R9Snd/63ItdUrjJT5QdDg7JnkLjtTW6c7tVf6JUbYXyMTHYucxv+88DejD5xlamXG9hgm1Jjm3ij0cBCvLOHla6MQYbwpV4gGuXDPSgz6uJ39sfJ4i/r8uytM//Ol0WW1HS9JYIkcp7O9/Zmu9ODgBdH8w34gC1wRqRJdRg1QIAkIv4yCk8+PJJkGjMw9cJETA66VHJvx74mV/pNCMY190SqfoTEkl2kjI2FfgqmwKX+6KyCMls0lPq8v2e9ApV5R4pukcpH29nU7Vg7Ae/gVuTTKCShXFWEt/LtaT4X2w8b5TJjTiBkrnJ8wyUWnkbYxmguCsSW90tGg+7FtiuslNfxXLHp31HbDjlBRCm7 X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(396003)(136003)(346002)(376002)(39860400002)(451199018)(46966006)(36840700001)(7696005)(186003)(26005)(478600001)(47076005)(2616005)(336012)(82310400005)(426003)(83380400001)(6666004)(316002)(54906003)(41300700001)(7636003)(8676002)(356005)(70206006)(82740400003)(110136005)(921005)(8936002)(4326008)(86362001)(5660300002)(70586007)(7416002)(36756003)(40480700001)(36860700001)(2906002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2023 20:05:07.7639 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f42cbbc0-a718-4abb-ac8f-08db00a1c9df X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7531 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230127_120512_451156_4EA86123 X-CRM114-Status: GOOD ( 19.53 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Both IOMMU_DOMAIN_UNMANAGED and IOMMU_DOMAIN_DMA require the support of __IOMMU_DOMAIN_PAGING capability, i.e. iommu_map/unmap. However, some older iommu drivers do not fully support that, and these drivers also do not advertise support for dma-iommu.c via IOMMU_DOMAIN_DMA, or use arm_iommu_create_mapping(), so largely their implementations of IOMMU_DOMAIN_UNMANAGED are untested. This means that a user like vfio/iommufd does not likely work with them. Several of them have obvious problems: * fsl_pamu_domain.c Without map/unmap ops in the default_domain_ops, it isn't an unmanaged domain at all. * mtk_iommu_v1.c With a fixed 4M "pagetable", it can only map exactly 4G of memory, but doesn't set the aperture. * tegra-gart.c Its notion of attach/detach and groups has to be a complete lie to get around all the other API expectations. Some others might work but have never been tested with vfio/iommufd: * msm_iommu.c * omap-iommu.c * tegra-smmu.c Thus, mark all these drivers as having "broken" UNAMANGED domains and add a new device_iommu_unmanaged_supported() API for vfio/iommufd and dma-iommu to refuse to work with these drivers. Co-developed-by: Jason Gunthorpe Signed-off-by: Jason Gunthorpe Signed-off-by: Nicolin Chen Signed-off-by: Jason Gunthorpe --- drivers/iommu/fsl_pamu_domain.c | 1 + drivers/iommu/iommu.c | 24 ++++++++++++++++++++++++ drivers/iommu/msm_iommu.c | 1 + drivers/iommu/mtk_iommu_v1.c | 1 + drivers/iommu/omap-iommu.c | 1 + drivers/iommu/tegra-gart.c | 1 + drivers/iommu/tegra-smmu.c | 1 + include/linux/iommu.h | 11 +++++++++++ 8 files changed, 41 insertions(+) diff --git a/drivers/iommu/fsl_pamu_domain.c b/drivers/iommu/fsl_pamu_domain.c index 4408ac3c49b6..1f3a4c8c78ad 100644 --- a/drivers/iommu/fsl_pamu_domain.c +++ b/drivers/iommu/fsl_pamu_domain.c @@ -448,6 +448,7 @@ static struct iommu_device *fsl_pamu_probe_device(struct device *dev) } static const struct iommu_ops fsl_pamu_ops = { + .broken_unmanaged_domain = true, .capable = fsl_pamu_capable, .domain_alloc = fsl_pamu_domain_alloc, .probe_device = fsl_pamu_probe_device, diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 5f6a85aea501..648fc04143b8 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1897,6 +1897,30 @@ bool device_iommu_capable(struct device *dev, enum iommu_cap cap) } EXPORT_SYMBOL_GPL(device_iommu_capable); +/** + * device_iommu_unmanaged_supported() - full support of IOMMU_DOMAIN_UNMANAGED + * @dev: device that is behind the iommu + * + * In general, all IOMMU drivers can allocate IOMMU_DOMAIN_UNMANAGED domains. + * However, some of them set the broken_unmanaged_domain, indicating something + * is wrong about its support of IOMMU_DOMAIN_UNMANAGED/__IOMMU_DOMAIN_PAGING. + * This can happen, when a driver lies about the support to get around with the + * IOMMU API, merely for other drivers to use, or when a driver has never been + * tested with vfio/iommufd that need a full support of IOMMU_DOMAIN_UNMANAGED. + * + * Return: true if an IOMMU is present and broken_unmanaged_domain is not set, + * otherwise, false. + */ +bool device_iommu_unmanaged_supported(struct device *dev) +{ + if (dev->iommu && dev->iommu->iommu_dev && + !dev_iommu_ops(dev)->broken_unmanaged_domain) + return true; + + return false; +} +EXPORT_SYMBOL_GPL(device_iommu_unmanaged_supported); + /** * iommu_set_fault_handler() - set a fault handler for an iommu domain * @domain: iommu domain diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index c60624910872..9c0bd5aee10b 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -675,6 +675,7 @@ irqreturn_t msm_iommu_fault_handler(int irq, void *dev_id) } static struct iommu_ops msm_iommu_ops = { + .broken_unmanaged_domain = true, .domain_alloc = msm_iommu_domain_alloc, .probe_device = msm_iommu_probe_device, .device_group = generic_device_group, diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index ca581ff1c769..c2ecbff6592c 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -578,6 +578,7 @@ static int mtk_iommu_v1_hw_init(const struct mtk_iommu_v1_data *data) } static const struct iommu_ops mtk_iommu_v1_ops = { + .broken_unmanaged_domain = true, .domain_alloc = mtk_iommu_v1_domain_alloc, .probe_device = mtk_iommu_v1_probe_device, .probe_finalize = mtk_iommu_v1_probe_finalize, diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c index 2fd7702c6709..17ed392b9f63 100644 --- a/drivers/iommu/omap-iommu.c +++ b/drivers/iommu/omap-iommu.c @@ -1733,6 +1733,7 @@ static struct iommu_group *omap_iommu_device_group(struct device *dev) } static const struct iommu_ops omap_iommu_ops = { + .broken_unmanaged_domain = true, .domain_alloc = omap_iommu_domain_alloc, .probe_device = omap_iommu_probe_device, .release_device = omap_iommu_release_device, diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c index ed53279d1106..9af56d2ec6c1 100644 --- a/drivers/iommu/tegra-gart.c +++ b/drivers/iommu/tegra-gart.c @@ -267,6 +267,7 @@ static void gart_iommu_sync(struct iommu_domain *domain, } static const struct iommu_ops gart_iommu_ops = { + .broken_unmanaged_domain = true, .domain_alloc = gart_iommu_domain_alloc, .probe_device = gart_iommu_probe_device, .device_group = generic_device_group, diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 5b1af40221ec..d1e4c4825d74 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -962,6 +962,7 @@ static int tegra_smmu_of_xlate(struct device *dev, } static const struct iommu_ops tegra_smmu_ops = { + .broken_unmanaged_domain = true, .domain_alloc = tegra_smmu_domain_alloc, .probe_device = tegra_smmu_probe_device, .device_group = tegra_smmu_device_group, diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 46e1347bfa22..919a5dbad75b 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -245,6 +245,10 @@ struct iommu_iotlb_gather { * pasid, so that any DMA transactions with this pasid * will be blocked by the hardware. * @pgsize_bitmap: bitmap of all possible supported page sizes + * @broken_unmanaged_domain: IOMMU_DOMAIN_UNMANAGED is not fully functional; the + * driver does not really support iommu_map/unmap, but + * uses UNMANAGED domains for the IOMMU API, called by + * other SOC drivers. * @owner: Driver module providing these ops */ struct iommu_ops { @@ -277,6 +281,7 @@ struct iommu_ops { const struct iommu_domain_ops *default_domain_ops; unsigned long pgsize_bitmap; + bool broken_unmanaged_domain; struct module *owner; }; @@ -455,6 +460,7 @@ static inline const struct iommu_ops *dev_iommu_ops(struct device *dev) extern int bus_iommu_probe(struct bus_type *bus); extern bool iommu_present(struct bus_type *bus); extern bool device_iommu_capable(struct device *dev, enum iommu_cap cap); +extern bool device_iommu_unmanaged_supported(struct device *dev); extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); extern struct iommu_group *iommu_group_get_by_id(int id); extern void iommu_domain_free(struct iommu_domain *domain); @@ -742,6 +748,11 @@ static inline bool device_iommu_capable(struct device *dev, enum iommu_cap cap) return false; } +static inline bool device_iommu_unmanaged_supported(struct device *dev) +{ + return false; +} + static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) { return NULL; From patchwork Fri Jan 27 20:04:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13119361 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 05AC3C54EAA for ; Fri, 27 Jan 2023 20:16:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Fri, 27 Jan 2023 12:04:56 -0800 From: Nicolin Chen To: , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 2/4] iommu/dma: Do not init domain if broken_unmanaged_domain Date: Fri, 27 Jan 2023 12:04:18 -0800 Message-ID: <451e7beb57ec6de66ee0da5b38886105436f53d7.1674849118.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT112:EE_|DM6PR12MB4417:EE_ X-MS-Office365-Filtering-Correlation-Id: e581f0a5-0c46-48b6-6296-08db00a1ca63 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: UaK1xkoUUrGEuWZFGoqIBoZwuwzxYLdXg3xkYOXTcjv0zILchFA7HtkIiLrHu5xJCWsjekGyoFIC3gEpzutRqdpcbA+F3KO4VHnVSwJ4m7EPTtIJu8wdByaTNY5aDzhy7/SjtHDvno+xqrg4z9mew06TfeQiLGiBHYs4jsflvNJwwaHaMfeSEESdOEChHET9I7WnYasbLrpLNVOY3vRNml8ToWHla8vAveo3Bp9N5NV265hpS+V1ivchGqOGCIzo4Q47zadRoAHMsNfuirw1IK34Sjl5gl5vs0VIqR+7sFvodtgi6V20wSfwmZXPbHIKtyBQCPTsVK4A3Z7QqHG4OeUWGQIXLpjCp9HnUr1XR4Fewxahk7dsVyLylzhoHmYzYWh17dM6rZi3ytaCKCLOFnbqLgDBEKBvPZrkyPP75kaI9QHwNTtgm7tIcwENUtlwfx/sQZ//vH8hssR6jsPFWbwEdsQOGrUe7zbDE89utGqABt7NYO/mALb+Lng4yiOETQ93vSdTGAGb5Cr/Ywgbyoj5aErCDIkgzFza/uSzRyg7UmYqsLhdpWDU4HTrA8vLeyfNXpyQP/gAJW5oih/oxtXIHLHhtswytyWRa7EgFn5Y2tPABz4lY8Po/C7SYI+dNgTzNodUp1p/qfBcnHWUonOuW/i00TXDGXW8agtUdjnqQm8VqEz1O5yb7+Iv29Ko4C6UxH4zlwKOtRZV+JKQpJrLe7/bzh1zhipHjWPSKCY= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(376002)(39860400002)(346002)(396003)(136003)(451199018)(40470700004)(36840700001)(46966006)(2906002)(5660300002)(7416002)(4744005)(41300700001)(36860700001)(426003)(47076005)(6666004)(26005)(8936002)(336012)(186003)(478600001)(2616005)(70206006)(36756003)(356005)(40460700003)(82740400003)(921005)(7636003)(70586007)(86362001)(316002)(4326008)(40480700001)(7696005)(8676002)(82310400005)(54906003)(110136005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2023 20:05:08.6271 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e581f0a5-0c46-48b6-6296-08db00a1ca63 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT112.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4417 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230127_120512_209848_3746536A X-CRM114-Status: GOOD ( 10.46 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add a sanity of the broken_unmanaged_domain flag to reject the use of dma-iommu in the early stage, if the flag is set by the iommu driver. Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/dma-iommu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index f798c44e0903..f1e8d952b17d 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -545,6 +545,9 @@ static int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, if (!cookie || cookie->type != IOMMU_DMA_IOVA_COOKIE) return -EINVAL; + if (WARN_ON(!device_iommu_unmanaged_supported(dev))) + return -EINVAL; + iovad = &cookie->iovad; /* Use the smallest supported page size for IOVA granularity */ From patchwork Fri Jan 27 20:04:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13119373 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51DD9C38142 for ; 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Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/device.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index d81f93a321af..41b55615a693 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -73,6 +73,9 @@ struct iommufd_device *iommufd_device_bind(struct iommufd_ctx *ictx, if (!device_iommu_capable(dev, IOMMU_CAP_CACHE_COHERENCY)) return ERR_PTR(-EINVAL); + if (!device_iommu_unmanaged_supported(dev)) + return ERR_PTR(-EINVAL); + group = iommu_group_get(dev); if (!group) return ERR_PTR(-ENODEV); From patchwork Fri Jan 27 20:04:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13119372 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBA48C54EAA for ; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2023 20:05:11.4190 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 16aa347e-5ccd-4e8c-007b-08db00a1cc0b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT039.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8365 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230127_120516_217432_4585AB1B X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add a sanity of the broken_unmanaged_domain flag to reject the use of vfio_iommu_type1 in the early stage, if the flag is set by the iommu driver. Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/vfio/vfio_iommu_type1.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index 23c24fe98c00..6ec238aefe89 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2170,7 +2170,10 @@ static int vfio_iommu_domain_alloc(struct device *dev, void *data) { struct iommu_domain **domain = data; - *domain = iommu_domain_alloc(dev->bus); + if (device_iommu_unmanaged_supported(dev)) + *domain = iommu_domain_alloc(dev->bus); + else + *domain = NULL; return 1; /* Don't iterate */ }