From patchwork Sun Jan 29 12:04:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 13120087 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1DCCC636CB for ; Sun, 29 Jan 2023 12:05:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229519AbjA2MFB (ORCPT ); Sun, 29 Jan 2023 07:05:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234813AbjA2MFA (ORCPT ); Sun, 29 Jan 2023 07:05:00 -0500 Received: from aposti.net (aposti.net [89.234.176.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC4FF2201D; Sun, 29 Jan 2023 04:04:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1674993890; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KmzCO3n3U4/L50Mpe2KY2BIPAp1YjeA7+C44XKCNUsI=; b=BUv8aLYI4kiwCnIZRxlhkKBg2BeXO+xipryTGl6AW5RoFe2JXGR8qP3aRk9VayGti023BR t1g7UESAy7EHgpxI6hwoDUUepgu7qdTcXA26rjiTZAN2QUY9yAcjgi5Syi39mZC2VLTMZs zWUAsTWYKWa1wdhGjz3se3w0lS/RoNk= From: Paul Cercueil To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, list@opendingux.net, Paul Cercueil Subject: [PATCH v3 1/4] dt-bindings: rtc: Add #clock-cells property Date: Sun, 29 Jan 2023 12:04:39 +0000 Message-Id: <20230129120442.22858-2-paul@crapouillou.net> In-Reply-To: <20230129120442.22858-1-paul@crapouillou.net> References: <20230129120442.22858-1-paul@crapouillou.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The RTC in the JZ4770 is compatible with the JZ4760, but has an extra register that permits to configure the behaviour of the CLK32K pin. The same goes for the RTC in the JZ4780. With this change, the RTC node is now also a clock provider on these SoCs, so a #clock-cells property is added. Signed-off-by: Paul Cercueil Reviewed-by: Rob Herring --- v2: - add constraint on which SoCs can have the #clock-cells property - add JZ4780 example which has a #clock-cells v3: Don't break ABI anymore. --- .../devicetree/bindings/rtc/ingenic,rtc.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml index af78b67b3da4..de9879bdb317 100644 --- a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml @@ -11,6 +11,17 @@ maintainers: allOf: - $ref: rtc.yaml# + - if: + not: + properties: + compatible: + contains: + enum: + - ingenic,jz4770-rtc + - ingenic,jz4780-rtc + then: + properties: + "#clock-cells": false properties: compatible: @@ -39,6 +50,9 @@ properties: clock-names: const: rtc + "#clock-cells": + const: 0 + system-power-controller: description: | Indicates that the RTC is responsible for powering OFF @@ -83,3 +97,18 @@ examples: clocks = <&cgu JZ4740_CLK_RTC>; clock-names = "rtc"; }; + + - | + #include + rtc: rtc@10003000 { + compatible = "ingenic,jz4780-rtc", "ingenic,jz4760-rtc"; + reg = <0x10003000 0x4c>; + + interrupt-parent = <&intc>; + interrupts = <32>; + + clocks = <&cgu JZ4780_CLK_RTCLK>; + clock-names = "rtc"; + + #clock-cells = <0>; + }; From patchwork Sun Jan 29 12:04:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 13120088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EB2EC61D97 for ; Sun, 29 Jan 2023 12:05:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234872AbjA2MFO (ORCPT ); Sun, 29 Jan 2023 07:05:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234878AbjA2MFM (ORCPT ); Sun, 29 Jan 2023 07:05:12 -0500 Received: from aposti.net (aposti.net [89.234.176.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54DA2234FC; Sun, 29 Jan 2023 04:05:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1674993891; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LiDIJ3Rmd36AtqhKNh3sjPZ+wGugz3vIRIvjOepxpSg=; b=jJ1s281Ict/W29rTi8nGIVpF/Vj/+9pxvN7t1X0FnNXwtM2kM90LY9uueI6Lgv7io7c0lk 6WSjSrbaPGLjll1qfUG0uJsP08gyjg5vu/tePGTgyLgW5f9CjhKGJ9IAAFygK4wCf8jen1 aKgrccczdD7zIsYnkbiKXKn74yIrvpU= From: Paul Cercueil To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, list@opendingux.net, Paul Cercueil Subject: [PATCH v3 2/4] rtc: jz4740: Use readl_poll_timeout Date: Sun, 29 Jan 2023 12:04:40 +0000 Message-Id: <20230129120442.22858-3-paul@crapouillou.net> In-Reply-To: <20230129120442.22858-1-paul@crapouillou.net> References: <20230129120442.22858-1-paul@crapouillou.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Use readl_poll_timeout() from instead of using custom poll loops. The timeout settings are different, but that shouldn't be much of a problem. Instead of polling 10000 times in a close loop, it polls for one millisecond. Signed-off-by: Paul Cercueil --- drivers/rtc/rtc-jz4740.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c index c383719292c7..4ee6e5ee09b1 100644 --- a/drivers/rtc/rtc-jz4740.c +++ b/drivers/rtc/rtc-jz4740.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -69,19 +70,15 @@ static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) { uint32_t ctrl; - int timeout = 10000; - do { - ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); - } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); - - return timeout ? 0 : -EIO; + return readl_poll_timeout(rtc->base + JZ_REG_RTC_CTRL, ctrl, + ctrl & JZ_RTC_CTRL_WRDY, 0, 1000); } static inline int jz4780_rtc_enable_write(struct jz4740_rtc *rtc) { uint32_t ctrl; - int ret, timeout = 10000; + int ret; ret = jz4740_rtc_wait_write_ready(rtc); if (ret != 0) @@ -89,11 +86,8 @@ static inline int jz4780_rtc_enable_write(struct jz4740_rtc *rtc) writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR); - do { - ctrl = readl(rtc->base + JZ_REG_RTC_WENR); - } while (!(ctrl & JZ_RTC_WENR_WEN) && --timeout); - - return timeout ? 0 : -EIO; + return readl_poll_timeout(rtc->base + JZ_REG_RTC_WENR, ctrl, + ctrl & JZ_RTC_WENR_WEN, 0, 1000); } static inline int jz4740_rtc_reg_write(struct jz4740_rtc *rtc, size_t reg, From patchwork Sun Jan 29 12:04:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 13120089 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97DEEC636CB for ; Sun, 29 Jan 2023 12:05:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234885AbjA2MFg (ORCPT ); Sun, 29 Jan 2023 07:05:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232009AbjA2MFe (ORCPT ); Sun, 29 Jan 2023 07:05:34 -0500 Received: from aposti.net (aposti.net [89.234.176.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F71B2387A; Sun, 29 Jan 2023 04:05:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1674993892; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=y1IJEsvKeYpQS+dvslB9I/8U3h0z6+5xQ1oLdzzjDbQ=; b=W0tsFp8DSSdHO+HZYZOczWMTpPIP7pMkBmkmO4HCPDaKx6UGLn1X2MyK5lj3Sd4F6bS32f tMnQJShDR9Ed6rW7t83VL6LKJn9aYfwiOmjO8OfSnCOlbVqERIo+TwNnqZNMw4JpFEiUSc wHJMmggog9HXeXAvGzo/AxsUYBGvwC8= From: Paul Cercueil To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, list@opendingux.net, Paul Cercueil Subject: [PATCH v3 3/4] rtc: jz4740: Use dev_err_probe() Date: Sun, 29 Jan 2023 12:04:41 +0000 Message-Id: <20230129120442.22858-4-paul@crapouillou.net> In-Reply-To: <20230129120442.22858-1-paul@crapouillou.net> References: <20230129120442.22858-1-paul@crapouillou.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Use dev_err_probe() where it makes sense to simplify a bit the code. Signed-off-by: Paul Cercueil --- drivers/rtc/rtc-jz4740.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c index 4ee6e5ee09b1..9ffa764aa71e 100644 --- a/drivers/rtc/rtc-jz4740.c +++ b/drivers/rtc/rtc-jz4740.c @@ -329,17 +329,13 @@ static int jz4740_rtc_probe(struct platform_device *pdev) device_init_wakeup(dev, 1); ret = dev_pm_set_wake_irq(dev, irq); - if (ret) { - dev_err(dev, "Failed to set wake irq: %d\n", ret); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "Failed to set wake irq\n"); rtc->rtc = devm_rtc_allocate_device(dev); - if (IS_ERR(rtc->rtc)) { - ret = PTR_ERR(rtc->rtc); - dev_err(dev, "Failed to allocate rtc device: %d\n", ret); - return ret; - } + if (IS_ERR(rtc->rtc)) + return dev_err_probe(dev, PTR_ERR(rtc->rtc), + "Failed to allocate rtc device\n"); rtc->rtc->ops = &jz4740_rtc_ops; rtc->rtc->range_max = U32_MAX; @@ -356,10 +352,8 @@ static int jz4740_rtc_probe(struct platform_device *pdev) ret = devm_request_irq(dev, irq, jz4740_rtc_irq, 0, pdev->name, rtc); - if (ret) { - dev_err(dev, "Failed to request rtc irq: %d\n", ret); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "Failed to request rtc irq\n"); if (of_device_is_system_power_controller(np)) { dev_for_power_off = dev; From patchwork Sun Jan 29 12:04:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 13120090 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A00BC61D97 for ; Sun, 29 Jan 2023 12:05:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234915AbjA2MF6 (ORCPT ); Sun, 29 Jan 2023 07:05:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234913AbjA2MF4 (ORCPT ); Sun, 29 Jan 2023 07:05:56 -0500 Received: from aposti.net (aposti.net [89.234.176.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7DA623647; Sun, 29 Jan 2023 04:05:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1674993893; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yR258zPvf0vX2EOy31knRww44w8mPVrFUXCg6iYmgXQ=; b=bJ2JWZrwbRM6k6sF2xEwFcNaxI+xfs0me9P4SYjPztYSJB13ERuqOAOeQvQAZOkjFid//x gLBzJcp73MpZRJV9/UAlQ1ga7gLsidJ6DOWgbHGfnaZ3VjD0cE7Gh9J7hQoRWMJA5c7+Tl jr4Z5tovxaVH3brO3Hrxx/v2uO2ORAc= From: Paul Cercueil To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, list@opendingux.net, Paul Cercueil Subject: [PATCH v3 4/4] rtc: jz4740: Register clock provider for the CLK32K pin Date: Sun, 29 Jan 2023 12:04:42 +0000 Message-Id: <20230129120442.22858-5-paul@crapouillou.net> In-Reply-To: <20230129120442.22858-1-paul@crapouillou.net> References: <20230129120442.22858-1-paul@crapouillou.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org On JZ4770 and JZ4780, the CLK32K pin is configurable. By default, it is configured as a GPIO in input mode, and its value can be read through GPIO PD14. With this change, clients can now request the 32 kHz clock on the CLK32K pin, through Device Tree. This clock is simply a pass-through of the input oscillator's clock with enable/disable operations. This will permit the WiFi/Bluetooth chip to work on the MIPS CI20 board, which does source one of its clocks from the CLK32K pin. Signed-off-by: Paul Cercueil --- v3: - Use dev_err_probe() - Use __clk_hw_get() to get a pointer to the parent clock, instead of doing it by name. - Add Kconfig dependency on CONFIG_COMMON_CLK - Register CLK32K clock if the #clock-cells device property is present, instead of doing it based on the compatible string --- drivers/rtc/Kconfig | 2 +- drivers/rtc/rtc-jz4740.c | 56 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 57 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 677d2601d305..d2b6d20a6745 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1690,7 +1690,7 @@ config RTC_DRV_MPC5121 config RTC_DRV_JZ4740 tristate "Ingenic JZ4740 SoC" depends on MIPS || COMPILE_TEST - depends on OF + depends on OF && COMMON_CLK help If you say yes here you get support for the Ingenic JZ47xx SoCs RTC controllers. diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c index 9ffa764aa71e..59d279e3e6f5 100644 --- a/drivers/rtc/rtc-jz4740.c +++ b/drivers/rtc/rtc-jz4740.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -13,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -26,6 +28,7 @@ #define JZ_REG_RTC_WAKEUP_FILTER 0x24 #define JZ_REG_RTC_RESET_COUNTER 0x28 #define JZ_REG_RTC_SCRATCHPAD 0x34 +#define JZ_REG_RTC_CKPCR 0x40 /* The following are present on the jz4780 */ #define JZ_REG_RTC_WENR 0x3C @@ -45,6 +48,9 @@ #define JZ_RTC_WAKEUP_FILTER_MASK 0x0000FFE0 #define JZ_RTC_RESET_COUNTER_MASK 0x00000FE0 +#define JZ_RTC_CKPCR_CK32PULL_DIS BIT(4) +#define JZ_RTC_CKPCR_CK32CTL_EN (BIT(2) | BIT(1)) + enum jz4740_rtc_type { ID_JZ4740, ID_JZ4760, @@ -57,6 +63,8 @@ struct jz4740_rtc { struct rtc_device *rtc; + struct clk_hw clk32k; + spinlock_t lock; }; @@ -254,6 +262,7 @@ static void jz4740_rtc_power_off(void) static const struct of_device_id jz4740_rtc_of_match[] = { { .compatible = "ingenic,jz4740-rtc", .data = (void *)ID_JZ4740 }, { .compatible = "ingenic,jz4760-rtc", .data = (void *)ID_JZ4760 }, + { .compatible = "ingenic,jz4770-rtc", .data = (void *)ID_JZ4780 }, { .compatible = "ingenic,jz4780-rtc", .data = (void *)ID_JZ4780 }, {}, }; @@ -295,6 +304,38 @@ static void jz4740_rtc_set_wakeup_params(struct jz4740_rtc *rtc, jz4740_rtc_reg_write(rtc, JZ_REG_RTC_RESET_COUNTER, reset_ticks); } +static int jz4740_rtc_clk32k_enable(struct clk_hw *hw) +{ + struct jz4740_rtc *rtc = container_of(hw, struct jz4740_rtc, clk32k); + + return jz4740_rtc_reg_write(rtc, JZ_REG_RTC_CKPCR, + JZ_RTC_CKPCR_CK32PULL_DIS | + JZ_RTC_CKPCR_CK32CTL_EN); +} + +static void jz4740_rtc_clk32k_disable(struct clk_hw *hw) +{ + struct jz4740_rtc *rtc = container_of(hw, struct jz4740_rtc, clk32k); + + jz4740_rtc_reg_write(rtc, JZ_REG_RTC_CKPCR, 0); +} + +static int jz4740_rtc_clk32k_is_enabled(struct clk_hw *hw) +{ + struct jz4740_rtc *rtc = container_of(hw, struct jz4740_rtc, clk32k); + u32 ckpcr; + + ckpcr = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CKPCR); + + return !!(ckpcr & JZ_RTC_CKPCR_CK32CTL_EN); +} + +static const struct clk_ops jz4740_rtc_clk32k_ops = { + .enable = jz4740_rtc_clk32k_enable, + .disable = jz4740_rtc_clk32k_disable, + .is_enabled = jz4740_rtc_clk32k_is_enabled, +}; + static int jz4740_rtc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -364,6 +405,21 @@ static int jz4740_rtc_probe(struct platform_device *pdev) dev_warn(dev, "Poweroff handler already present!\n"); } + if (device_property_present(dev, "#clock-cells")) { + rtc->clk32k.init = CLK_HW_INIT_HW("clk32k", __clk_get_hw(clk), + &jz4740_rtc_clk32k_ops, 0); + + ret = devm_clk_hw_register(dev, &rtc->clk32k); + if (ret) + return dev_err_probe(dev, ret, + "Unable to register clk32k clock\n"); + + ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &rtc->clk32k); + if (ret) + return dev_err_probe(dev, ret, + "Unable to register clk32k clock provider\n"); + } + return 0; }