From patchwork Thu Feb 2 07:05:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13125426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4CD3C6379F for ; Thu, 2 Feb 2023 07:05:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230508AbjBBHF4 (ORCPT ); Thu, 2 Feb 2023 02:05:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230048AbjBBHFs (ORCPT ); Thu, 2 Feb 2023 02:05:48 -0500 Received: from NAM04-DM6-obe.outbound.protection.outlook.com (mail-dm6nam04on2040.outbound.protection.outlook.com [40.107.102.40]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA72783480; Wed, 1 Feb 2023 23:05:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=PJ+ULhJCnF3+Qlf0XQBE7Mf4y/Iy4qpy6dN5LKIT+I1K2vTmB3LbKPgUuq2cmBYa5QyZc6amo2aZti5bjituxGnOXEjzi02aX8e3Q2120YLOLEpGewkCX58p08Z5IOxL7y/1wkkn93x/Qau1c0kDLpydosdPvNz2IA3MK9mL9QEVwuSwjWbBSrD4sUvegyxXRb1ntWzc9xeLLAMrDwNLSrrrmzUz63t4+OaqBJk+d1jS1yA0JK/HCqX5l/MFUvsrz4uDLH1MNViNVGH7AZzrilQQCm1yylJnFK9BIYTanVQMI53NnxD2AO/kyum5AL2+gGm+/6DxYTtig3AkR8KRGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=m3OmSdtlI9yKY2r3I7FpPQKJ62ROtlnkPC3bvXFSPwI=; b=CxnlFMD+X/fBeUfdu/M5aX7wVWvxzwRqjbWPTgzkbxYj6wIrRVHExZfYSAgL3RuLKVWSFl9xA2TXGs0ecmKRqf9s+wDUJju+ROOwH7NlB9aszDSE0MVSGaVIn4NeRV+OeAieLPTzpKPijuzetlpuugtisQWf4BLBIp2WGeqQGxlvy0xQohQXzwy9kmb+ztXVXpMptS4+dyjITvIz8ynq5HP8cxSaLfkBV2pO+Dk8M65lLtlK3AYGgqTt3jfarvXe/qwxqgCkO4xLG7ASdhOaq2ZxRgLJaIuWWerDabrO4hCUP23MCZi9gwgCH83X0w9ICvW83JStSRlW2rWytmTGuQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=m3OmSdtlI9yKY2r3I7FpPQKJ62ROtlnkPC3bvXFSPwI=; b=SEQnEnuoiPETabCI9dsDlId82KDrUQsG967R/Ag7IZTXITSnHMjuBoH9n6yuWcrwsODMZQCM3PuaM1SBVaiAhrkjIaA6Kg+A8CCXjXlJd8aReSHY+QOfMRkuAUt4PmKhLLV/6/Fa3rlvRHI9FMh8kxswEOub/hP75UYsObgLa2Dh9tdwxi6qbsZuTpz/RdSQG+UyloYjLYYGWGq8Z9VezYmDhDD4TLMKGMMegyKz4+pMgkFbWegJntEKfZsYNqaoNjFLUeuoWCZFCoirRyNFc9btN9xZ/I6zlisVfrVUGrjVKBW7huFR3sRZXvdlSj7zNnY29ghwi8i4wfiUaoIfIQ== Received: from DS7PR03CA0251.namprd03.prod.outlook.com (2603:10b6:5:3b3::16) by DM6PR12MB4073.namprd12.prod.outlook.com (2603:10b6:5:217::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.25; Thu, 2 Feb 2023 07:05:36 +0000 Received: from DS1PEPF0000B079.namprd05.prod.outlook.com (2603:10b6:5:3b3:cafe::4e) by DS7PR03CA0251.outlook.office365.com (2603:10b6:5:3b3::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27 via Frontend Transport; Thu, 2 Feb 2023 07:05:36 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by DS1PEPF0000B079.mail.protection.outlook.com (10.167.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.17 via Frontend Transport; Thu, 2 Feb 2023 07:05:35 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:22 -0800 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:22 -0800 Received: from Asurada-Nvidia.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Wed, 1 Feb 2023 23:05:21 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , Subject: [PATCH v1 1/8] iommu: Move dev_iommu_ops() to private header Date: Wed, 1 Feb 2023 23:05:05 -0800 Message-ID: X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000B079:EE_|DM6PR12MB4073:EE_ X-MS-Office365-Filtering-Correlation-Id: 527cb181-9bb6-480c-8bb8-08db04ebe204 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: YR7PKrcyFktOH3LKL/snifsEJOz2lpYPG9ZH5EY8eDDikf4RnV25daGauywy9M7HmuIQX5GYzX6NR34Co/dim271ryGv4O9yMcHxN1aqFn6WFBcwfpi5I2z6Y1fkjyGvidvVA4ooUqdxTzVVVrnMIeLMNtj642kK6blEulbxGL6Xq+csWoqkMEIlmEho6nwi9qAtBgHoXhE2vmEfDSnV3QgMhc6P4EjJKaPLMGxg4KE9wIneiO6m3WcFIcYg9QCoqP5JEn7f5EJhsIMIFKop7fY8A93dnkbEpaCaXqmFfvbC5JIMCOrt1JDJR9jCsmqcrMfoazDlWILY2ZYdyiwjBHAggY0/ymaM4MjkiFO1Bn1sIRCrRiKZ8NnNPO1haANtP6GLSGD1rp5mvuTzsmvlre682N3wXJollzS3NXPX7IHASdbtemAyCykQ+n/XMKH3Ut5XbdYbh/vMg6LVyaufeHGaC1yVumaMMD3riF+52cQsbQR5hSE+IzVoz6kS7ZQo4LpJsf800t36+b2LuhuiUUWiDUOoTBQKGIfArhIc8Y06M4V1ih7MKQ++U2Fkt64n4I+AIN3BfSeIhc1h+Wp94Vv7C4x8wgFLLIxG0KNgA7/Pd2ZKvfajda6uYlBVUyr7yxHUliqKh0f11TJoqSoBT1W/Cu+QKQIuH+7I69l3ewmn3HGJ2SpxpQXBXfH80cs+mhtAXXth6C2whleSsggHOQ== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(396003)(376002)(346002)(136003)(39860400002)(451199018)(40470700004)(46966006)(36840700001)(47076005)(70586007)(4326008)(83380400001)(426003)(336012)(70206006)(41300700001)(7636003)(8676002)(2616005)(8936002)(82740400003)(82310400005)(186003)(356005)(26005)(36756003)(478600001)(40460700003)(110136005)(316002)(86362001)(36860700001)(7696005)(7416002)(40480700001)(2906002)(6666004)(54906003)(5660300002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 07:05:35.7268 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 527cb181-9bb6-480c-8bb8-08db04ebe204 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000B079.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4073 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Yi Liu dev_iommu_ops() is essentially only used in iommu subsystem, so move to a private header to avoid being abused by other drivers. Suggested-by: Jason Gunthorpe Signed-off-by: Yi Liu Signed-off-by: Nicolin Chen --- drivers/iommu/iommu-priv.h | 18 ++++++++++++++++++ drivers/iommu/iommu.c | 2 ++ include/linux/iommu.h | 11 ----------- 3 files changed, 20 insertions(+), 11 deletions(-) create mode 100644 drivers/iommu/iommu-priv.h diff --git a/drivers/iommu/iommu-priv.h b/drivers/iommu/iommu-priv.h new file mode 100644 index 000000000000..9e1497027cff --- /dev/null +++ b/drivers/iommu/iommu-priv.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __LINUX_IOMMU_PRIV_H +#define __LINUX_IOMMU_PRIV_H + +#include + +static inline const struct iommu_ops *dev_iommu_ops(struct device *dev) +{ + /* + * Assume that valid ops must be installed if iommu_probe_device() + * has succeeded. The device ops are essentially for internal use + * within the IOMMU subsystem itself, so we should be able to trust + * ourselves not to misuse the helper. + */ + return dev->iommu->iommu_dev->ops; +} +#endif /* __LINUX_IOMMU_PRIV_H */ diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 4b5a21ac5e88..a18b7f1a4e6e 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -35,6 +35,8 @@ #include "iommu-sva.h" +#include "iommu-priv.h" + static struct kset *iommu_group_kset; static DEFINE_IDA(iommu_group_ida); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index a8063f26ff69..cb586d054c57 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -445,17 +445,6 @@ static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather) }; } -static inline const struct iommu_ops *dev_iommu_ops(struct device *dev) -{ - /* - * Assume that valid ops must be installed if iommu_probe_device() - * has succeeded. The device ops are essentially for internal use - * within the IOMMU subsystem itself, so we should be able to trust - * ourselves not to misuse the helper. - */ - return dev->iommu->iommu_dev->ops; -} - extern int bus_iommu_probe(struct bus_type *bus); extern bool iommu_present(struct bus_type *bus); extern bool device_iommu_capable(struct device *dev, enum iommu_cap cap); From patchwork Thu Feb 2 07:05:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13125425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A0CCC05027 for ; Thu, 2 Feb 2023 07:05:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231617AbjBBHFw (ORCPT ); Thu, 2 Feb 2023 02:05:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47598 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231473AbjBBHFt (ORCPT ); Thu, 2 Feb 2023 02:05:49 -0500 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2060.outbound.protection.outlook.com [40.107.94.60]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6B7583493; Wed, 1 Feb 2023 23:05:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=mMwMqfmwRSjvgDPHcJ28fNKjuVceBjLrBiUUyxcBKCXO4Dc2Vmniuz6NWVthPwsWaR3FXByZ7ZLflrs6pId44BRrFJXq7bavSyfNpfeJZHoR7showLNf7z9mpCAzugfyOKCgFqQ7XreEl9NhnLCzraEfb4LSyUF1wY4k58pcadQk11LdWH9tTMcySmYW1xo6p9IIy0ZXLu3K230i2vwT9aKrdgnrjvEipSWkS+EncxQUwR96sQ0vBNFgK2sMFi+cH2gQSBq/pY8WXbJfRx8YfQTAvkeZgA1kadgRD1dYRru7Gqwvle7sVNYs0V3aY6ZYJLsJzOWWPby/pIp+ebViJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=aSXopJtgzfG+ksXEKGP9eCOmabLw6Vz9mNSanSl1ntQ=; b=KIrDRodF6DX9TYzo10QD2CasEpLUsT3oSfhko/DmlCySwNkdmplzJUm6/21/FnnR/HwR/nWKDPx5JlInU6M/jcR99aEAoI1gX2/Aae4e4gizd4UnKndW2+FFipd5easzhPoL/EUu59VkIxUxNBBkzslQWSLj3b3ZxaQbz0JhWuSDcwpiBe8hecVmzLN2zX6WVk5g9aMorlZ1LUdtqYBQfI4CD1010FVc+ja1Ijn4gCdoH9sQvo6gLChP3Cz2vlanincbkVp0s9h1y3WmDC/54SNWdI+1E0PIYh9GBNzkxEKmpmL7Q3DyVsDjLO7KiD7NERameURF82h2q3V0+8G69w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=aSXopJtgzfG+ksXEKGP9eCOmabLw6Vz9mNSanSl1ntQ=; b=Asfw5JsLuavfVuN76soQEbG2I4hvnte0UN4Zs++8iA0+hSI1Zj4CRM+6Gi5EC8+nukMSMyzeZh1medRc/6yBJSo8MdjX0QUwQnCnCD7fdoC/nBNSYHHS75bzc1UkvHQsgKUsRay2eki8U0MJs9BSa18RqoUbg64fXUXmyK4/pkFRkMYj+idTNwpOvgHoH9c2t6rtpWPsDg+9S5SLDlUCAbgM4fPHNrpBZ8Q6GDjPwa0XoU1ZeAnX7JXtvnv8J+yQQUfHRjeWokZTC7dXGZ381/kvy6NrVmFrjbgUvGFx+e39yPISuFl1LIQRzTweng1bplwj64if2uEC9tW5o+p4/g== Received: from DS7PR03CA0240.namprd03.prod.outlook.com (2603:10b6:5:3ba::35) by DM4PR12MB5817.namprd12.prod.outlook.com (2603:10b6:8:60::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27; Thu, 2 Feb 2023 07:05:37 +0000 Received: from DS1PEPF0000B077.namprd05.prod.outlook.com (2603:10b6:5:3ba:cafe::38) by DS7PR03CA0240.outlook.office365.com (2603:10b6:5:3ba::35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.24 via Frontend Transport; Thu, 2 Feb 2023 07:05:37 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by DS1PEPF0000B077.mail.protection.outlook.com (10.167.17.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.17 via Frontend Transport; Thu, 2 Feb 2023 07:05:36 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:23 -0800 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:23 -0800 Received: from Asurada-Nvidia.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Wed, 1 Feb 2023 23:05:22 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , Subject: [PATCH v1 2/8] iommu: Introduce a new iommu_group_replace_domain() API Date: Wed, 1 Feb 2023 23:05:06 -0800 Message-ID: X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000B077:EE_|DM4PR12MB5817:EE_ X-MS-Office365-Filtering-Correlation-Id: be078dbb-72de-47e7-224c-08db04ebe2b3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: c7+k6zhoEvSTt8gk0y4EKA93Bhz9WmxO5aYmoksbmPZ8zV2aufVSMvxnppSic37ocuOfQKKuieS3H9l0lmW8Vw3MHnTtj/GQOsp5roEAfpy4+vWW28QYQmZWWkcoDUEhMGZp7wMCwib6XAOUaavYbO/WlZV+uqe3qx6nf0Zq7TC4WI7ggTmwN+geQDpzAXNi9rhL0+XU9lJL83K9M5AkWZKGeJGjtAapEP9P/fMjikETcPpeG8fcH9Vn1hR+N+A4n7EWYhNx8Lm0/UuUX3uce07+dYZL5y4h70wfYTt0/3GiUHFXhUrA227Dxqs8dmVvNcI280bJxm893AJinuNAiDSWnEgtY0Tg+tojMXFzzMX9zNyO8Q6LIJVc0/5ZSQshtf84VXtoCGGfYGPpgb4L5xrfobtviVSRh5KRlndQEezZ8j8kgNxAq+FkZQ0LT21oqk5hxgt7tfDvSnR8PQ2YCQ1ClW4PrVsEzM3JWCFn6yQtzOk70y00RcvBXDtxd8i+GN3EADevT69/cKwAqhJV8FOaS788duAMZMGJeK3dauZKPbQPhFQQ2mUoUEFzuKa2D54t7hRTBlGaSvky+D9EMDY3GaMsaAUoJhREMOk4mbe4OlE93uKpfoXagfAVoIjs+Iem7GUkIdh9dDjAOGSvE1sAS5x0t1mdQsPMNylwI1mgmweNvW0uYk58TrURsprcQRZ2RXutXGMqCJwXnTip8w== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(376002)(346002)(136003)(39860400002)(396003)(451199018)(46966006)(36840700001)(40470700004)(82740400003)(7636003)(40460700003)(26005)(336012)(83380400001)(2616005)(186003)(478600001)(6666004)(70586007)(4326008)(316002)(110136005)(7416002)(54906003)(426003)(2906002)(7696005)(8676002)(41300700001)(86362001)(5660300002)(8936002)(70206006)(40480700001)(36756003)(82310400005)(47076005)(36860700001)(356005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 07:05:36.8710 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: be078dbb-72de-47e7-224c-08db04ebe2b3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000B077.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5817 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org qemu has a need to replace the translations associated with a domain when the guest does large-scale operations like switching between an IDENTITY domain and, say, dma-iommu.c. Currently, it does this by replacing all the mappings in a single domain, but this is very inefficient and means that domains have to be per-device rather than per-translation. Provide a high-level API to allow replacements of one domain with another. This is similar to a detach/attach cycle except it doesn't force the group to go to the blocking domain in-between. By removing this forced blocking domain the iommu driver has the opportunity to implement an atomic replacement of the domains to the greatest extent its hardware allows. Atomic replacement allows the qemu emulation of the viommu to be more complete, as real hardware has this ability. All drivers are already required to support changing between active UNMANAGED domains when using their attach_dev ops. This API is expected to be used by IOMMUFD, so add to the iommu-priv header and mark it as IOMMUFD_INTERNAL. Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/iommu-priv.h | 4 ++++ drivers/iommu/iommu.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/drivers/iommu/iommu-priv.h b/drivers/iommu/iommu-priv.h index 9e1497027cff..b546795a7e49 100644 --- a/drivers/iommu/iommu-priv.h +++ b/drivers/iommu/iommu-priv.h @@ -15,4 +15,8 @@ static inline const struct iommu_ops *dev_iommu_ops(struct device *dev) */ return dev->iommu->iommu_dev->ops; } + +extern int iommu_group_replace_domain(struct iommu_group *group, + struct iommu_domain *new_domain); + #endif /* __LINUX_IOMMU_PRIV_H */ diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index a18b7f1a4e6e..c35da7a5c0d4 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -2151,6 +2151,36 @@ int iommu_attach_group(struct iommu_domain *domain, struct iommu_group *group) } EXPORT_SYMBOL_GPL(iommu_attach_group); +/** + * iommu_group_replace_domain - replace the domain that a group is attached to + * @new_domain: new IOMMU domain to replace with + * @group: IOMMU group that will be attached to the new domain + * + * This API allows the group to switch domains without being forced to go to + * the blocking domain in-between. + * + * If the attached domain is a core domain (e.g. a default_domain), it will act + * just like the iommu_attach_group(). + */ +int iommu_group_replace_domain(struct iommu_group *group, + struct iommu_domain *new_domain) +{ + int ret; + + if (!new_domain) + return -EINVAL; + + mutex_lock(&group->mutex); + ret = __iommu_group_set_domain(group, new_domain); + if (ret) { + if (__iommu_group_set_domain(group, group->domain)) + __iommu_group_set_core_domain(group); + } + mutex_unlock(&group->mutex); + return ret; +} +EXPORT_SYMBOL_NS_GPL(iommu_group_replace_domain, IOMMUFD_INTERNAL); + static int iommu_group_do_set_platform_dma(struct device *dev, void *data) { const struct iommu_ops *ops = dev_iommu_ops(dev); From patchwork Thu Feb 2 07:05:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13125428 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34B36C05027 for ; Thu, 2 Feb 2023 07:06:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231725AbjBBHGB (ORCPT ); Thu, 2 Feb 2023 02:06:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231482AbjBBHFw (ORCPT ); Thu, 2 Feb 2023 02:05:52 -0500 Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2050.outbound.protection.outlook.com [40.107.92.50]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64D268349A; Wed, 1 Feb 2023 23:05:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=KJEtUCR/iXDYKT0vVgJm8MqeSDCOwKFpr0wK4y6nXyJ0C9VbrWFcVrffUmb+kkX1Ua9lAUfQgAeWeylHm9yacmdaKhuBNax87kldzw9AJItGAOlDnhd3EpFQrBN5Obnl0cypPc5EyVYF7iRJNAy+l+P9pdYZP3NGUWgqR/GZ5U63mI8hMAv4CrJYPRikrRI7XMvJWATmbPdwG+j3dlXrxDQ8uVAVZNOV4OHBS1GJ3BLFg1Trs1tyTWjQpTeQtiXr+JGfgodftRZlvJED6olfytDNbXOA/SaOLvjeSg7qchNF/TknfRXqm8rCwF9JfmIGrPejjDLYrwRU1QN3JONraA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=KHXZ1wkOfg4JQkH5cj6SdQs5cAJhTa/jEO7HpB38QC8=; b=COrFsIRsQnpN6yCVWpjDsxd/tIyz643iSfuDfOxpYMgs31n0jPeHAhvTLfNeEVYNFv5CP/eu4otU2OoUmBXc3SsMZxiXglqpfEihbW/u4LrVOlHaaE5aB+r5IF2q8D0KiKg66PTAV5DKJukepRIVjbBf0WS+46dHE0gQM+hSWuu+u4P2UilQYwIhIRkcPDQn4Us0tXbi0KhWoYwYzYKC0BPAj+HzLchy9LGh/DDcdmTmr9uv+x949G/oqBPjMxiBWl0evjup+Dhr6sK1WIkp0FFS/HcbNAtcn0P2Zb4sD3qVgAc27q5phQniVHca/Hzp0Jbvn1CkA7Qjf6mJaK1EKg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KHXZ1wkOfg4JQkH5cj6SdQs5cAJhTa/jEO7HpB38QC8=; b=WBqkkDcUGiSqyPZxqdSk0j421FUejXAvbbBkCqRjpJWpu+TVpsrb5RXdkhNSiUgfgV8SGUzalaOp7n+4Rbz63iDWlFEopvmbemyPAsc6x4rkezZErSPlTiRTGBg4/u9gmEPKd/SzFLBpGhHMBFUGdWwO+Ie49Hfo7qntt2SOqS3rNtl0DxdaN/EIZSOTkU4WAOS+EQIEvwXDg3vfPFmbeLxjOMtM3d9Sdnnp3bcpitUjv3tF2fNX75N6CosNc4aS4jiqa91crhdlx3voCGBJuXbfjqTHqTB5TwOjdS3VmJOA3tcf0pA0NUORbDgtPKp9QXhnKxKL9VStkutEIYdA+A== Received: from MW3PR05CA0017.namprd05.prod.outlook.com (2603:10b6:303:2b::22) by SN7PR12MB6792.namprd12.prod.outlook.com (2603:10b6:806:267::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.24; Thu, 2 Feb 2023 07:05:38 +0000 Received: from CO1NAM11FT098.eop-nam11.prod.protection.outlook.com (2603:10b6:303:2b:cafe::be) by MW3PR05CA0017.outlook.office365.com (2603:10b6:303:2b::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6086.6 via Frontend Transport; Thu, 2 Feb 2023 07:05:37 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1NAM11FT098.mail.protection.outlook.com (10.13.174.207) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27 via Frontend Transport; Thu, 2 Feb 2023 07:05:37 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:25 -0800 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:24 -0800 Received: from Asurada-Nvidia.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Wed, 1 Feb 2023 23:05:23 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , Subject: [PATCH v1 3/8] iommufd: Create access in vfio_iommufd_emulated_bind() Date: Wed, 1 Feb 2023 23:05:07 -0800 Message-ID: X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT098:EE_|SN7PR12MB6792:EE_ X-MS-Office365-Filtering-Correlation-Id: 487f62dd-64d4-46ca-abe9-08db04ebe30b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3iS+ORsfEMzLlMxoOy0/Mqyg3ZAygSmyEf5syd468Y8XWldaEwwGJHBiIR/TJKQ6BMnja15LDyx9G3b5xRrO4/cjhvOeqEVz6/CApbranbL17HrVFrMhQVO97TCu7AlskT/2w1OL1J1RaX99ftPRkwjL+hdrYGCT8Nw5ZEhusx+Dd4Olzkl25G2AM7/ViyxRNKFtX7Yd4vvj/Gforb7oxED3Z40MgRDoZs3cFWMOh3sDtkq9p4KCuCKAVFUuMHqy8GJjGWm6mKjMsS+JgpkhyPFsLRsj3z96RDRf0lEiZF7LUBJlU8Ms35Q/+mi/2eTSPqAaLAJkMfCYZgocrIq9BKwIuW5FJ1WNi/vqkkyTGGCoswuKnd9KFL3h0FBd8OmmZ8jpbuR3XKuFuV4XeJJuCAAn2SWdZYOAhYLIByV1QYzefDiVR4mvBxeSkd/vdCIse0B4NH+dCKzNkkGlULhr0U6HTU4+M+LoxCTEEzw5+/uVx/n1BDbAVkLCpJUF7VyIifliTRmc0LG88hXJ8r/7FNPMNjacA8ikJZbV+AO8McNBCup0vHwpkG63C2rJP2WUvJSChW39Eq6SZSJQGbbpygn/Wz2+PGcFx/UT5zMSNsgTcp4nFPYjFvmGiu+YUmPiLgwljAuTLZd5hu2k1m6ixBEqM6S60F9kSPK8rQKjqOnJiUgxDjiradeyDSpXOvhxUwKwifnzNSWVJu5n9f849w== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(396003)(376002)(136003)(346002)(39860400002)(451199018)(40470700004)(36840700001)(46966006)(40460700003)(83380400001)(110136005)(54906003)(47076005)(316002)(70586007)(41300700001)(70206006)(4326008)(8936002)(8676002)(6666004)(26005)(186003)(478600001)(2616005)(7696005)(336012)(86362001)(82310400005)(426003)(36756003)(356005)(2906002)(40480700001)(30864003)(36860700001)(5660300002)(7636003)(7416002)(82740400003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 07:05:37.5138 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 487f62dd-64d4-46ca-abe9-08db04ebe30b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT098.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6792 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org To prepare for an access->ioas replacement, move iommufd_access_create() call into vfio_iommufd_emulated_bind(), making it symmetric with the __vfio_iommufd_access_destroy() call in vfio_iommufd_emulated_unbind(). This means an access is created/destroyed by the bind()/unbind(), and the vfio_iommufd_emulated_attach_ioas() only updates the access->ioas pointer. Since there's no longer an ioas_id input for iommufd_access_create(), add a new helper iommufd_access_set_ioas() to set access->ioas. We can later add a "replace" feature simply to the new iommufd_access_set_ioas() too. Leaving the access->ioas in vfio_iommufd_emulated_attach_ioas(), however, can introduce some potential of a race condition during pin_/unpin_pages() call where access->ioas->iopt is getting referenced. So, add an ioas_lock to protect it. Note that the "refcount_dec(&access->ioas->obj.users)" line is also moved to the new iommufd_access_set_ioas() from iommufd_access_destroy_object() for symmetry. Without this change, the old_ioas would also lose the track of its refcount when the replace support is added. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/device.c | 100 ++++++++++++++++++------ drivers/iommu/iommufd/iommufd_private.h | 1 + drivers/iommu/iommufd/selftest.c | 5 +- drivers/vfio/iommufd.c | 30 +++---- include/linux/iommufd.h | 3 +- 5 files changed, 96 insertions(+), 43 deletions(-) diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index d81f93a321af..f4bd6f532a90 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -418,9 +418,9 @@ void iommufd_access_destroy_object(struct iommufd_object *obj) struct iommufd_access *access = container_of(obj, struct iommufd_access, obj); - iopt_remove_access(&access->ioas->iopt, access); + iommufd_access_set_ioas(access, 0); iommufd_ctx_put(access->ictx); - refcount_dec(&access->ioas->obj.users); + mutex_destroy(&access->ioas_lock); } /** @@ -437,12 +437,10 @@ void iommufd_access_destroy_object(struct iommufd_object *obj) * The provided ops are required to use iommufd_access_pin_pages(). */ struct iommufd_access * -iommufd_access_create(struct iommufd_ctx *ictx, u32 ioas_id, +iommufd_access_create(struct iommufd_ctx *ictx, const struct iommufd_access_ops *ops, void *data) { struct iommufd_access *access; - struct iommufd_object *obj; - int rc; /* * There is no uAPI for the access object, but to keep things symmetric @@ -455,33 +453,18 @@ iommufd_access_create(struct iommufd_ctx *ictx, u32 ioas_id, access->data = data; access->ops = ops; - obj = iommufd_get_object(ictx, ioas_id, IOMMUFD_OBJ_IOAS); - if (IS_ERR(obj)) { - rc = PTR_ERR(obj); - goto out_abort; - } - access->ioas = container_of(obj, struct iommufd_ioas, obj); - iommufd_ref_to_users(obj); - if (ops->needs_pin_pages) access->iova_alignment = PAGE_SIZE; else access->iova_alignment = 1; - rc = iopt_add_access(&access->ioas->iopt, access); - if (rc) - goto out_put_ioas; /* The calling driver is a user until iommufd_access_destroy() */ refcount_inc(&access->obj.users); + mutex_init(&access->ioas_lock); access->ictx = ictx; iommufd_ctx_get(ictx); iommufd_object_finalize(ictx, &access->obj); return access; -out_put_ioas: - refcount_dec(&access->ioas->obj.users); -out_abort: - iommufd_object_abort(ictx, &access->obj); - return ERR_PTR(rc); } EXPORT_SYMBOL_NS_GPL(iommufd_access_create, IOMMUFD); @@ -500,6 +483,50 @@ void iommufd_access_destroy(struct iommufd_access *access) } EXPORT_SYMBOL_NS_GPL(iommufd_access_destroy, IOMMUFD); +int iommufd_access_set_ioas(struct iommufd_access *access, u32 ioas_id) +{ + struct iommufd_ioas *new_ioas = NULL, *cur_ioas; + struct iommufd_ctx *ictx = access->ictx; + struct iommufd_object *obj; + int rc = 0; + + if (ioas_id) { + obj = iommufd_get_object(ictx, ioas_id, IOMMUFD_OBJ_IOAS); + if (IS_ERR(obj)) + return PTR_ERR(obj); + new_ioas = container_of(obj, struct iommufd_ioas, obj); + } + + mutex_lock(&access->ioas_lock); + cur_ioas = access->ioas; + if (cur_ioas == new_ioas) + goto out_unlock; + + if (new_ioas) { + rc = iopt_add_access(&new_ioas->iopt, access); + if (rc) + goto out_unlock; + iommufd_ref_to_users(obj); + } + + if (cur_ioas) { + iopt_remove_access(&cur_ioas->iopt, access); + refcount_dec(&cur_ioas->obj.users); + } + + access->ioas = new_ioas; + mutex_unlock(&access->ioas_lock); + + return 0; + +out_unlock: + mutex_unlock(&access->ioas_lock); + if (new_ioas) + iommufd_put_object(obj); + return rc; +} +EXPORT_SYMBOL_NS_GPL(iommufd_access_set_ioas, IOMMUFD); + /** * iommufd_access_notify_unmap - Notify users of an iopt to stop using it * @iopt: iopt to work on @@ -550,8 +577,8 @@ void iommufd_access_notify_unmap(struct io_pagetable *iopt, unsigned long iova, void iommufd_access_unpin_pages(struct iommufd_access *access, unsigned long iova, unsigned long length) { - struct io_pagetable *iopt = &access->ioas->iopt; struct iopt_area_contig_iter iter; + struct io_pagetable *iopt; unsigned long last_iova; struct iopt_area *area; @@ -559,6 +586,13 @@ void iommufd_access_unpin_pages(struct iommufd_access *access, WARN_ON(check_add_overflow(iova, length - 1, &last_iova))) return; + mutex_lock(&access->ioas_lock); + if (!access->ioas) { + mutex_unlock(&access->ioas_lock); + return; + } + iopt = &access->ioas->iopt; + down_read(&iopt->iova_rwsem); iopt_for_each_contig_area(&iter, area, iopt, iova, last_iova) iopt_area_remove_access( @@ -568,6 +602,7 @@ void iommufd_access_unpin_pages(struct iommufd_access *access, min(last_iova, iopt_area_last_iova(area)))); up_read(&iopt->iova_rwsem); WARN_ON(!iopt_area_contig_done(&iter)); + mutex_unlock(&access->ioas_lock); } EXPORT_SYMBOL_NS_GPL(iommufd_access_unpin_pages, IOMMUFD); @@ -613,8 +648,8 @@ int iommufd_access_pin_pages(struct iommufd_access *access, unsigned long iova, unsigned long length, struct page **out_pages, unsigned int flags) { - struct io_pagetable *iopt = &access->ioas->iopt; struct iopt_area_contig_iter iter; + struct io_pagetable *iopt; unsigned long last_iova; struct iopt_area *area; int rc; @@ -629,6 +664,13 @@ int iommufd_access_pin_pages(struct iommufd_access *access, unsigned long iova, if (check_add_overflow(iova, length - 1, &last_iova)) return -EOVERFLOW; + mutex_lock(&access->ioas_lock); + if (!access->ioas) { + mutex_unlock(&access->ioas_lock); + return -ENOENT; + } + iopt = &access->ioas->iopt; + down_read(&iopt->iova_rwsem); iopt_for_each_contig_area(&iter, area, iopt, iova, last_iova) { unsigned long last = min(last_iova, iopt_area_last_iova(area)); @@ -659,6 +701,7 @@ int iommufd_access_pin_pages(struct iommufd_access *access, unsigned long iova, } up_read(&iopt->iova_rwsem); + mutex_unlock(&access->ioas_lock); return 0; err_remove: @@ -673,6 +716,7 @@ int iommufd_access_pin_pages(struct iommufd_access *access, unsigned long iova, iopt_area_last_iova(area)))); } up_read(&iopt->iova_rwsem); + mutex_unlock(&access->ioas_lock); return rc; } EXPORT_SYMBOL_NS_GPL(iommufd_access_pin_pages, IOMMUFD); @@ -692,8 +736,8 @@ EXPORT_SYMBOL_NS_GPL(iommufd_access_pin_pages, IOMMUFD); int iommufd_access_rw(struct iommufd_access *access, unsigned long iova, void *data, size_t length, unsigned int flags) { - struct io_pagetable *iopt = &access->ioas->iopt; struct iopt_area_contig_iter iter; + struct io_pagetable *iopt; struct iopt_area *area; unsigned long last_iova; int rc; @@ -703,6 +747,13 @@ int iommufd_access_rw(struct iommufd_access *access, unsigned long iova, if (check_add_overflow(iova, length - 1, &last_iova)) return -EOVERFLOW; + mutex_lock(&access->ioas_lock); + if (!access->ioas) { + mutex_unlock(&access->ioas_lock); + return -ENOENT; + } + iopt = &access->ioas->iopt; + down_read(&iopt->iova_rwsem); iopt_for_each_contig_area(&iter, area, iopt, iova, last_iova) { unsigned long last = min(last_iova, iopt_area_last_iova(area)); @@ -729,6 +780,7 @@ int iommufd_access_rw(struct iommufd_access *access, unsigned long iova, rc = -ENOENT; err_out: up_read(&iopt->iova_rwsem); + mutex_unlock(&access->ioas_lock); return rc; } EXPORT_SYMBOL_NS_GPL(iommufd_access_rw, IOMMUFD); diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommufd/iommufd_private.h index 222e86591f8a..2f4bb106bac6 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -261,6 +261,7 @@ struct iommufd_access { struct iommufd_object obj; struct iommufd_ctx *ictx; struct iommufd_ioas *ioas; + struct mutex ioas_lock; const struct iommufd_access_ops *ops; void *data; unsigned long iova_alignment; diff --git a/drivers/iommu/iommufd/selftest.c b/drivers/iommu/iommufd/selftest.c index cfb5fe9a5e0e..db4011bdc8a9 100644 --- a/drivers/iommu/iommufd/selftest.c +++ b/drivers/iommu/iommufd/selftest.c @@ -571,7 +571,7 @@ static int iommufd_test_create_access(struct iommufd_ucmd *ucmd, } access = iommufd_access_create( - ucmd->ictx, ioas_id, + ucmd->ictx, (flags & MOCK_FLAGS_ACCESS_CREATE_NEEDS_PIN_PAGES) ? &selftest_access_ops_pin : &selftest_access_ops, @@ -580,6 +580,9 @@ static int iommufd_test_create_access(struct iommufd_ucmd *ucmd, rc = PTR_ERR(access); goto out_put_fdno; } + rc = iommufd_access_set_ioas(access, ioas_id); + if (rc) + goto out_destroy; cmd->create_access.out_access_fd = fdno; rc = iommufd_ucmd_respond(ucmd, sizeof(*cmd)); if (rc) diff --git a/drivers/vfio/iommufd.c b/drivers/vfio/iommufd.c index 412644fdbf16..78a8e4641cbf 100644 --- a/drivers/vfio/iommufd.c +++ b/drivers/vfio/iommufd.c @@ -144,10 +144,19 @@ static const struct iommufd_access_ops vfio_user_ops = { int vfio_iommufd_emulated_bind(struct vfio_device *vdev, struct iommufd_ctx *ictx, u32 *out_device_id) { + struct iommufd_access *user; + lockdep_assert_held(&vdev->dev_set->lock); - vdev->iommufd_ictx = ictx; iommufd_ctx_get(ictx); + user = iommufd_access_create(vdev->iommufd_ictx, &vfio_user_ops, vdev); + if (IS_ERR(user)) { + iommufd_ctx_put(vdev->iommufd_ictx); + return PTR_ERR(user); + } + iommufd_access_set_ioas(user, 0); + vdev->iommufd_access = user; + vdev->iommufd_ictx = ictx; return 0; } EXPORT_SYMBOL_GPL(vfio_iommufd_emulated_bind); @@ -171,27 +180,14 @@ EXPORT_SYMBOL_GPL(vfio_iommufd_emulated_unbind); int vfio_iommufd_emulated_attach_ioas(struct vfio_device *vdev, u32 *pt_id) { - struct iommufd_access *user; - lockdep_assert_held(&vdev->dev_set->lock); if (!vdev->iommufd_ictx) return -EINVAL; + if (!vdev->iommufd_access) + return -ENOENT; - if (!pt_id) { - if (vdev->iommufd_access) - __vfio_iommufd_access_destroy(vdev); - return 0; - } - - if (vdev->iommufd_access) - return -EBUSY; - - user = iommufd_access_create(vdev->iommufd_ictx, *pt_id, &vfio_user_ops, - vdev); - if (IS_ERR(user)) - return PTR_ERR(user); - vdev->iommufd_access = user; + iommufd_access_set_ioas(vdev->iommufd_access, *pt_id); return 0; } EXPORT_SYMBOL_GPL(vfio_iommufd_emulated_attach_ioas); diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index 650d45629647..0e30f2ce27cd 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -40,9 +40,10 @@ enum { }; struct iommufd_access * -iommufd_access_create(struct iommufd_ctx *ictx, u32 ioas_id, +iommufd_access_create(struct iommufd_ctx *ictx, const struct iommufd_access_ops *ops, void *data); void iommufd_access_destroy(struct iommufd_access *access); +int iommufd_access_set_ioas(struct iommufd_access *access, u32 ioas_id); void iommufd_ctx_get(struct iommufd_ctx *ictx); From patchwork Thu Feb 2 07:05:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13125427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27520C61DA4 for ; Thu, 2 Feb 2023 07:06:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229935AbjBBHF6 (ORCPT ); Thu, 2 Feb 2023 02:05:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229972AbjBBHFv (ORCPT ); Thu, 2 Feb 2023 02:05:51 -0500 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2066.outbound.protection.outlook.com [40.107.93.66]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 048118326C; Wed, 1 Feb 2023 23:05:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=QOLCpYnEFSRFWjkfoMIi9hpU2gzOFKziErXm7i5Uj72uCrklTMl2NQsTg809LDYPgr2tduOnMKE1KY9cmEKmJ22RKic+IwB9GukXN2z6Xpe+iW+Bc/IxYwNvRDI5o0FMkZvXBcmBVG3+dDuAQOMWsO/slmqqqH1caj7gnAz4bd5kqJMTGT8Z8SORrqrxuKPBA5JhHTz4cGQTG9GG3L2wHwAkobovBv+C10LVx9W1L2LKCYub7D6mro/QEbpE+3btr+BBb/y0AW6EfPgypWWUGsTa+Bv5rsErNxI4s5U0QTZJdK8+/xVHMl0bXXae6FTfKUI9j8Rk415ymJqbL9Qqrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=trqPQuSL508hbjLZkTsHtmMpbS6mglzaGKaP6bKXVsE=; b=gxS2GZo3RVJhGdHIeiGxsEwhFMvz5ECkD/e3FSZXdFwTGtNmfToaJzzKXctkm4k+1fcvNqmdXr85OCOXYcrIsJmxA0Ou7D2coIYM2T+eTxPWXjwQ/L4/cN7huLSZ604ZDyBM6akubx0kuMuCkS3Ah/rROTpS0T01XwbHT9Fh//BmQs6vycEBCZg+qfWcxWFk4hZTHOAUtv1y/WTY5RMbwnxE31e6QCtXLxCdIImC/Jq2isFJPU3M9XnUPQVcks0TJrffatOHdD4onTqyfer1akqLWubmU6UimtmqLBRgNK+0Doyaho53oTd7EECz5YUdHG/OTq5ll2WAMRIbP/02Zg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=trqPQuSL508hbjLZkTsHtmMpbS6mglzaGKaP6bKXVsE=; b=CrvQ0kMK0FPfyzHPw5Zo2AoQKLrWNQ2VNBP+KnZ+xxYBAxoKraeSsGyzvhlWatqItU/fvse+tz3007fqz4CMGhi93S+R56PmIOGjZ0lR1ULEekHQ1GDWk8Cg8lvCOcyI+qbIjK+2fKKps2Et6uiJ9qoDg3e9VXn4Q3Z0mIAcWi+B9G57UuDlSMlLX8CXDcmScfegGfBwYnBXBQaCtFtisOadBn+30AmBedjQwwHgIqc7jIS0JlqP164ciEDgXnLHVfUYwaQojhITFmmaZVN9+Y+FgAMvdBEMz/fLMRJUV1dHS+m/s3GISKg7bUo2vM32LtmDKUs0+vM2jm1euxXHmg== Received: from MW3PR05CA0019.namprd05.prod.outlook.com (2603:10b6:303:2b::24) by DS7PR12MB6190.namprd12.prod.outlook.com (2603:10b6:8:99::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27; Thu, 2 Feb 2023 07:05:38 +0000 Received: from CO1NAM11FT098.eop-nam11.prod.protection.outlook.com (2603:10b6:303:2b:cafe::59) by MW3PR05CA0019.outlook.office365.com (2603:10b6:303:2b::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6086.7 via Frontend Transport; Thu, 2 Feb 2023 07:05:38 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1NAM11FT098.mail.protection.outlook.com (10.13.174.207) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27 via Frontend Transport; Thu, 2 Feb 2023 07:05:38 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:26 -0800 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:25 -0800 Received: from Asurada-Nvidia.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Wed, 1 Feb 2023 23:05:25 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , Subject: [PATCH v1 4/8] iommufd/selftest: Add IOMMU_TEST_OP_ACCESS_SET_IOAS coverage Date: Wed, 1 Feb 2023 23:05:08 -0800 Message-ID: <34ca3fdafa57639834ee3cb1c9c398c518249d68.1675320212.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT098:EE_|DS7PR12MB6190:EE_ X-MS-Office365-Filtering-Correlation-Id: 2d73a65e-dbba-434f-2d23-08db04ebe391 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: la7hhRiRpY9MwlYxR+qYMy8vCmMCoYHf4qf7YXA9im0sXohc3tiIdylfmd+NnECR9uZAC7sEvZPxkIcFsFCLz3xcz/o9yZnuiJM8/GObgvn8fJbDwMKZva4ZfZH2uYKkRlw9G9lpX/JpDFmqy0gFVvTXVqhDtAMtRtLFkuSrWEbTQ+wJR8qhW6h6YnaM6f1oXrHSDt4lLdKGYHsN7CsRotk+9VJfHg72BmywffMSKJO8HXfhM03WLi42xmNDY7RTGyu9TwIuhw5bkoNHVDGy/4tRAAnbbBE8UUpxCI09efRab0vtD21BtH/drB/TkhzPsdgQ1eFJbGdBQjYHGs319k9rTiCSJVeYbXfwVWiLYqPoK8ie1WmqmIQ4Umvq4hj2d+AB8D0MTwcMd4802D5RFuj1gSbURSzpmYxE9egW9XPYvkIamUtuo13J3DZ1uagjqrQxoaoyxRWHqqhrs2+zUiFc8KdENEK+YqrnYyVh0pyeejEl9fc9NTXAxqjwbKL8RuLZ0BDBhlXY3uXEco9lK7rilPPs+o2BPp2Q54G8FxoEUk0ASSqArm0dKaPn9WO3y5m4CJJcTzoo9K8M996MQbHcpROtC3huustpwYZVu/sNBG+A+EtoCDNCrm23X6yxZH+1/QPfb8P0X7V31nyeHD+n7hnMCXIN4z1ViF/SmABSTjruqgeguhcluYgfd//tJ6m08PdIIM0Fw+w5JmU05g== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(396003)(376002)(39860400002)(136003)(346002)(451199018)(40470700004)(36840700001)(46966006)(356005)(7636003)(40480700001)(47076005)(426003)(83380400001)(336012)(2616005)(82740400003)(36860700001)(40460700003)(4326008)(70206006)(70586007)(8676002)(86362001)(5660300002)(2906002)(7416002)(41300700001)(8936002)(7696005)(478600001)(54906003)(6666004)(82310400005)(110136005)(316002)(186003)(36756003)(26005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 07:05:38.3887 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2d73a65e-dbba-434f-2d23-08db04ebe391 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT098.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6190 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add a new IOMMU_TEST_OP_ACCESS_SET_IOAS to allow setting access->ioas individually, corresponding to the iommufd_access_set_ioas() helper. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_test.h | 4 +++ drivers/iommu/iommufd/selftest.c | 26 +++++++++++++++---- tools/testing/selftests/iommu/iommufd_utils.h | 22 ++++++++++++++-- 3 files changed, 45 insertions(+), 7 deletions(-) diff --git a/drivers/iommu/iommufd/iommufd_test.h b/drivers/iommu/iommufd/iommufd_test.h index 1d96a8f466fd..f2c61a9500e7 100644 --- a/drivers/iommu/iommufd/iommufd_test.h +++ b/drivers/iommu/iommufd/iommufd_test.h @@ -13,6 +13,7 @@ enum { IOMMU_TEST_OP_MD_CHECK_MAP, IOMMU_TEST_OP_MD_CHECK_REFS, IOMMU_TEST_OP_CREATE_ACCESS, + IOMMU_TEST_OP_ACCESS_SET_IOAS, IOMMU_TEST_OP_DESTROY_ACCESS_PAGES, IOMMU_TEST_OP_ACCESS_PAGES, IOMMU_TEST_OP_ACCESS_RW, @@ -66,6 +67,9 @@ struct iommu_test_cmd { __u32 out_access_fd; __u32 flags; } create_access; + struct { + __u32 ioas_id; + } access_set_ioas; struct { __u32 access_pages_id; } destroy_access_pages; diff --git a/drivers/iommu/iommufd/selftest.c b/drivers/iommu/iommufd/selftest.c index db4011bdc8a9..b94870f93138 100644 --- a/drivers/iommu/iommufd/selftest.c +++ b/drivers/iommu/iommufd/selftest.c @@ -549,7 +549,7 @@ static struct selftest_access *iommufd_test_alloc_access(void) } static int iommufd_test_create_access(struct iommufd_ucmd *ucmd, - unsigned int ioas_id, unsigned int flags) + unsigned int flags) { struct iommu_test_cmd *cmd = ucmd->cmd; struct selftest_access *staccess; @@ -580,9 +580,6 @@ static int iommufd_test_create_access(struct iommufd_ucmd *ucmd, rc = PTR_ERR(access); goto out_put_fdno; } - rc = iommufd_access_set_ioas(access, ioas_id); - if (rc) - goto out_destroy; cmd->create_access.out_access_fd = fdno; rc = iommufd_ucmd_respond(ucmd, sizeof(*cmd)); if (rc) @@ -601,6 +598,22 @@ static int iommufd_test_create_access(struct iommufd_ucmd *ucmd, return rc; } +static int iommufd_test_access_set_ioas(struct iommufd_ucmd *ucmd, + unsigned int access_id, + unsigned int ioas_id) +{ + struct selftest_access *staccess; + int rc; + + staccess = iommufd_access_get(access_id); + if (IS_ERR(staccess)) + return PTR_ERR(staccess); + + rc = iommufd_access_set_ioas(staccess->access, ioas_id); + fput(staccess->file); + return rc; +} + /* Check that the pages in a page array match the pages in the user VA */ static int iommufd_test_check_pages(void __user *uptr, struct page **pages, size_t npages) @@ -810,8 +823,11 @@ int iommufd_test(struct iommufd_ucmd *ucmd) ucmd, u64_to_user_ptr(cmd->check_refs.uptr), cmd->check_refs.length, cmd->check_refs.refs); case IOMMU_TEST_OP_CREATE_ACCESS: - return iommufd_test_create_access(ucmd, cmd->id, + return iommufd_test_create_access(ucmd, cmd->create_access.flags); + case IOMMU_TEST_OP_ACCESS_SET_IOAS: + return iommufd_test_access_set_ioas( + ucmd, cmd->id, cmd->access_set_ioas.ioas_id); case IOMMU_TEST_OP_ACCESS_PAGES: return iommufd_test_access_pages( ucmd, cmd->id, cmd->access_pages.iova, diff --git a/tools/testing/selftests/iommu/iommufd_utils.h b/tools/testing/selftests/iommu/iommufd_utils.h index 0d1f46369c2a..67805afc620f 100644 --- a/tools/testing/selftests/iommu/iommufd_utils.h +++ b/tools/testing/selftests/iommu/iommufd_utils.h @@ -66,13 +66,31 @@ static int _test_cmd_mock_domain(int fd, unsigned int ioas_id, __u32 *device_id, EXPECT_ERRNO(_errno, _test_cmd_mock_domain(self->fd, ioas_id, \ device_id, hwpt_id)) +static int _test_cmd_access_set_ioas(int fd, __u32 access_id, + unsigned int ioas_id) +{ + struct iommu_test_cmd cmd = { + .size = sizeof(cmd), + .op = IOMMU_TEST_OP_ACCESS_SET_IOAS, + .id = access_id, + .access_set_ioas = { .ioas_id = ioas_id }, + }; + int ret; + + ret = ioctl(fd, IOMMU_TEST_CMD, &cmd); + if (ret) + return ret; + return 0; +} +#define test_cmd_access_set_ioas(access_id, ioas_id) \ + ASSERT_EQ(0, _test_cmd_access_set_ioas(self->fd, access_id, ioas_id)) + static int _test_cmd_create_access(int fd, unsigned int ioas_id, __u32 *access_id, unsigned int flags) { struct iommu_test_cmd cmd = { .size = sizeof(cmd), .op = IOMMU_TEST_OP_CREATE_ACCESS, - .id = ioas_id, .create_access = { .flags = flags }, }; int ret; @@ -81,7 +99,7 @@ static int _test_cmd_create_access(int fd, unsigned int ioas_id, if (ret) return ret; *access_id = cmd.create_access.out_access_fd; - return 0; + return _test_cmd_access_set_ioas(fd, *access_id, ioas_id); } #define test_cmd_create_access(ioas_id, access_id, flags) \ ASSERT_EQ(0, _test_cmd_create_access(self->fd, ioas_id, access_id, \ From patchwork Thu Feb 2 07:05:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13125429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7F65C61DA4 for ; Thu, 2 Feb 2023 07:06:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231770AbjBBHGD (ORCPT ); Thu, 2 Feb 2023 02:06:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231644AbjBBHFx (ORCPT ); Thu, 2 Feb 2023 02:05:53 -0500 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2063.outbound.protection.outlook.com [40.107.94.63]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9BAFE83485; Wed, 1 Feb 2023 23:05:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=K7z5P8ZRQ+Q7Y3svU42wlLBk7X74fuln98nvYHQSPUtgbQHCZuCibFp06VJwJFm1yb52XQqSvU3H9ZXB5MTP0xxMjbbAlm7A2sfgQJYGSaRvBrphCtAuxe/6htFjQmEK4isvMEZZioJyELfJ0vQlEyt7G44XLvMl5EuDfz+YipdOuOBuvF5OK7Lr05OkRgubbfHXPFwC0Z/olZbwAty94Zes+42tL9VCZv9A7/SpkBVXDmO2LeHeHkCKBsSrdffLucLO/8sEPVREWF/ntVpD0PxYcwKNUJy/IakOIJS/rIPFemhz4X5XKGJJUiZQ3GaVtF+kGhHrYYuzqZzmmDKkrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=tICV2SWIk6qWYrwA6OQ0wLv+yeybBZIZnKhYP+k2w74=; b=XPj7YiJQEksQxHqSlvplauS4zU/4F05LmStScYqZADV9WQ3K3Myi7dy0t4YKlyY/cHIrahyEmJ/+DeYSZGjnXZGMNfY2FNRoa/PAuktcuuZYEHC+/dutUmLC6AXlTyNrdVbfrJUTm/uYz3sleBKKLXGv5ZWNaCzbj5vmopeIPjW56paH/QfbEXhEQQaMrVnTsZrRDIY4dB1dHMdEXz3ca+pQfnJgfatrEIS7YjU/EsOn8/5TMtl95bMGcUI1YderKE4sKLXwYz8vHKyQl7UIREJ//50+2lbt24JVixWQa5H0WLbQvQtVJ9QdmuuHOmlc83XVKd4mxHI94AvtJcdDAA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=tICV2SWIk6qWYrwA6OQ0wLv+yeybBZIZnKhYP+k2w74=; b=gLFNaFYZ+a4TGAz5dWgYJbWZPXfAMJXOk336emMT9ABNA7wJFnDc0yrfNVuCuj8NAgHGZtIrxKN8lZJLHKrcnyXomomi/ZllsO0wG92NWSZ4+ltjLjb1Qpsu7uJMSVl4ag+x9GEF951CsEkZMD6MaYitLl0NmqBTFkuggsBlvbpAqbH04vw2rtH0pwzdL/UxHWgucbjTcrG1kzY5XPxhXWmoxxgvTJtKvun/L1c1Cr0RrkgkEqNbB+dAcJ2k4JbecWCW5bgQ1Mz/68AgSa+7tgXnNadzeK6rPDyBrOFyjbW9hjEeywOb309l8jTZIIXNFqzX9AjY1mZ/2k5LLgQWNw== Received: from DS7PR03CA0235.namprd03.prod.outlook.com (2603:10b6:5:3ba::30) by DS7PR12MB8323.namprd12.prod.outlook.com (2603:10b6:8:ec::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6043.38; Thu, 2 Feb 2023 07:05:41 +0000 Received: from DS1PEPF0000B077.namprd05.prod.outlook.com (2603:10b6:5:3ba:cafe::b7) by DS7PR03CA0235.outlook.office365.com (2603:10b6:5:3ba::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6043.43 via Frontend Transport; Thu, 2 Feb 2023 07:05:41 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by DS1PEPF0000B077.mail.protection.outlook.com (10.167.17.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.17 via Frontend Transport; Thu, 2 Feb 2023 07:05:41 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:27 -0800 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:27 -0800 Received: from Asurada-Nvidia.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Wed, 1 Feb 2023 23:05:26 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , Subject: [PATCH v1 5/8] iommufd: Add replace support in iommufd_access_set_ioas() Date: Wed, 1 Feb 2023 23:05:09 -0800 Message-ID: X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000B077:EE_|DS7PR12MB8323:EE_ X-MS-Office365-Filtering-Correlation-Id: e65e79a0-3fcd-4021-74c4-08db04ebe591 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: w/UCAU68Hs5WZ4OyJy4AHLRzp0PYDDkhpdZRjQwGDZvfccNPJJI/BYIZ538zfCcGVKRRPBcq5AKuqnh6fMBkRaBRgXnDXQiALYofKhaxTHBzh0SQD7tM9vDWYnbYk3KCGlbNdkV4MlGAsr+cnKu3e2rk2HKuy3DvrIXect4djB4QDCpcsh5ZSj0eYSZ9PQhAOMV4/0cKm9EdwmGh6k7WIsRnayA8KKeuaNwYsK36jvpmtRsvJH8klpNhkLiFHRaAcHpeNWeQS5Rx5jwATvie7Shmf0SY6Ob6UZgkxoxHZUdfdsf6mjQFcMteCRVWFcp7fISIeInICey6Y/aGwcF9VJVzLGlpgiC1O3JNqJ6YMuk8fnN7+NcqlJE35HZ+9JcGMfSNiGzI7eJpbm60snpX4CuJuYQKWR4y0L7W8OvNWk/p0I0DnKzEfEmJ3WuG03bF0sOaO60TzsIq+1FJMMMlZmNl0DFNjpP9YaXcjqKRbkFfgkwNlMonYjt+Y0cJ7679bX3Cj62gjjgPXKqSJ2DuGgEcrnXCD7D/yYsfjZehCJDhmzWMPQxtOCRvfhUH8c4amCsEpJJ1DheK4/LOwX+fzrpaKPftmjkWvucMQDmpaES35BH3pwjbtcUJC8EmJtCfNSu5oXgzBKeCPjSIis6Kf4fB5wUcWA3hKHkkEYw3oYCD94JcLhMVfDc9Xuc/8Ik7EzU2J8o544IcvKxg+KdyzeR4widhaWYh+TuhcIfU6Vg= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(376002)(39860400002)(136003)(396003)(346002)(451199018)(46966006)(36840700001)(40470700004)(40460700003)(2616005)(316002)(110136005)(83380400001)(4326008)(41300700001)(8936002)(54906003)(8676002)(70586007)(70206006)(6666004)(336012)(478600001)(26005)(186003)(426003)(7696005)(47076005)(86362001)(356005)(36756003)(40480700001)(2906002)(36860700001)(5660300002)(7416002)(7636003)(82310400005)(82740400003)(309714004);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 07:05:41.6835 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e65e79a0-3fcd-4021-74c4-08db04ebe591 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000B077.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8323 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Support an access->ioas replacement in iommufd_access_set_ioas(), which sets the access->ioas to NULL provisionally so that any further incoming iommufd_access_pin_pages() callback can be blocked. Then, call access->ops->unmap() to clean up the entire iopt. To allow an iommufd_access_unpin_pages() callback to happen via this unmap() call, add an ioas_unpin pointer so the unpin routine won't be affected by the "access->ioas = NULL" trick above. Also, a vdev without an ops->dma_unmap implementation cannot replace its access->ioas pointer. So add an iommufd_access_ioas_is_attached() helper to sanity that. Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/device.c | 28 +++++++++++++++++++++++-- drivers/iommu/iommufd/iommufd_private.h | 1 + drivers/vfio/iommufd.c | 4 ++++ include/linux/iommufd.h | 1 + 4 files changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index f4bd6f532a90..8118d5262800 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -509,11 +509,23 @@ int iommufd_access_set_ioas(struct iommufd_access *access, u32 ioas_id) iommufd_ref_to_users(obj); } + /* + * Set ioas to NULL to block any further iommufd_access_pin_pages(). + * iommufd_access_unpin_pages() can continue using access->ioas_unpin. + */ + access->ioas = NULL; + if (cur_ioas) { + if (new_ioas) { + mutex_unlock(&access->ioas_lock); + access->ops->unmap(access->data, 0, ULONG_MAX); + mutex_lock(&access->ioas_lock); + } iopt_remove_access(&cur_ioas->iopt, access); refcount_dec(&cur_ioas->obj.users); } + access->ioas_unpin = new_ioas; access->ioas = new_ioas; mutex_unlock(&access->ioas_lock); @@ -527,6 +539,18 @@ int iommufd_access_set_ioas(struct iommufd_access *access, u32 ioas_id) } EXPORT_SYMBOL_NS_GPL(iommufd_access_set_ioas, IOMMUFD); +bool iommufd_access_ioas_is_attached(struct iommufd_access *access) +{ + bool attached; + + mutex_lock(&access->ioas_lock); + attached = !!access->ioas; + mutex_unlock(&access->ioas_lock); + + return attached; +} +EXPORT_SYMBOL_NS_GPL(iommufd_access_ioas_is_attached, IOMMUFD); + /** * iommufd_access_notify_unmap - Notify users of an iopt to stop using it * @iopt: iopt to work on @@ -587,11 +611,11 @@ void iommufd_access_unpin_pages(struct iommufd_access *access, return; mutex_lock(&access->ioas_lock); - if (!access->ioas) { + if (!access->ioas_unpin) { mutex_unlock(&access->ioas_lock); return; } - iopt = &access->ioas->iopt; + iopt = &access->ioas_unpin->iopt; down_read(&iopt->iova_rwsem); iopt_for_each_contig_area(&iter, area, iopt, iova, last_iova) diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommufd/iommufd_private.h index 2f4bb106bac6..593138bb37b8 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -261,6 +261,7 @@ struct iommufd_access { struct iommufd_object obj; struct iommufd_ctx *ictx; struct iommufd_ioas *ioas; + struct iommufd_ioas *ioas_unpin; struct mutex ioas_lock; const struct iommufd_access_ops *ops; void *data; diff --git a/drivers/vfio/iommufd.c b/drivers/vfio/iommufd.c index 78a8e4641cbf..7e09defbcffe 100644 --- a/drivers/vfio/iommufd.c +++ b/drivers/vfio/iommufd.c @@ -187,6 +187,10 @@ int vfio_iommufd_emulated_attach_ioas(struct vfio_device *vdev, u32 *pt_id) if (!vdev->iommufd_access) return -ENOENT; + if (!vdev->ops->dma_unmap && pt_id && + iommufd_access_ioas_is_attached(vdev->iommufd_access)) + return -EBUSY; + iommufd_access_set_ioas(vdev->iommufd_access, *pt_id); return 0; } diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index 0e30f2ce27cd..e8d764b2c14c 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -44,6 +44,7 @@ iommufd_access_create(struct iommufd_ctx *ictx, const struct iommufd_access_ops *ops, void *data); void iommufd_access_destroy(struct iommufd_access *access); int iommufd_access_set_ioas(struct iommufd_access *access, u32 ioas_id); +bool iommufd_access_ioas_is_attached(struct iommufd_access *access); void iommufd_ctx_get(struct iommufd_ctx *ictx); From patchwork Thu Feb 2 07:05:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13125432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CDF0C636D4 for ; Thu, 2 Feb 2023 07:06:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231956AbjBBHGZ (ORCPT ); Thu, 2 Feb 2023 02:06:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48012 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231773AbjBBHGE (ORCPT ); Thu, 2 Feb 2023 02:06:04 -0500 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2061.outbound.protection.outlook.com [40.107.243.61]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86AD68326C; Wed, 1 Feb 2023 23:05:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=gqm7RVRlHVgTkrtBn1Rgue40SKd0W/yhXFKeNPFhRUmMxlkQwe0cY94Tc+IrKtiqi77gD66KOAJLBiemYkhKqIhuimODjdeOlggvJ37KPMGtwXtINEiHXJLvvl5X14vBYRkIZOE8PqjoLpuweVGadp2w+AYH2TbbwSZLg5dXcXlDUjTLQD2KWDa8iMa3OZHamSim+elTKPxo0ulVyurwY1fG6twYaaW/oBx7hs0o88f2+zwsdEXEl7Q5oPNArVXICNKkcbgI6If3v8hxjK5Turtm+7CM+1RQ//fPMlt7YO7y6TsIr9GfVCDfIFBgiSeadLccbHpZJYpxC8Tt3FBXCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=4M7iekfihGGncrRbOBERG3QeRSGUe0DStydbRWS41RI=; b=J5wEV2xsaxA79Bghw4XcFF+kR8aqmocfhN+cT6ZJ88IvMZ92Be9ERMJ2apDdxo88dShs66OjYivejLJVhxD4MOvlC4yI8sQ6mmWHAaQbXninRCzH3k7STPosNHnYsDFMQvXxmRlrYAKu8y+F5tnMIxd7ITx6KqwzBN8A1vVMeSvb2vSNwn0YxxB3clvKoSHUXQxiCVOarx88Ehq2vOHezggebmBKn8V8X9OHJGlRX0Qgw/kdYAgj2TV6olTB+TjlnTs9A6JZTo7Tn+O9rjFJ0t+2+OzI7SZZsqOAXIgk3CB6OpB7tXYMZDq2tS/NCEkFbLsH9d2b7x6mnl7XN85OuA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4M7iekfihGGncrRbOBERG3QeRSGUe0DStydbRWS41RI=; b=rtG5O4FZGRY0kWz43WPNPzaYqkH26EC5grDb5bKmOC8SppprwL7YdLtAtjs0rCfz1DoeMGdhvvRHkOqHkG5Xr6alALMv8Bm/544MHkB7SMPFGF3QvcncTvJ60Vot/qyKWbR0pAe7Uvhl9CQ7fMp8w/jR9JYw4RDYM8KAIo+kR6hVbIUVakAq8B9vv7V+xg3DtiRoouXg2tTxETZLypMGCYprXlJhBxii1H0LzdOwFsuIY3XuiFVvP3F7Dv5CEXM4kVues21OED3JgZCRNqc0x7USYuyh6wmIOac3rtQkquHfE8oCMa1ELdMJ36Hm2tdIXFgc0VLBTd6bEp0U90PAUQ== Received: from MW4PR03CA0253.namprd03.prod.outlook.com (2603:10b6:303:b4::18) by BL1PR12MB5945.namprd12.prod.outlook.com (2603:10b6:208:398::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27; Thu, 2 Feb 2023 07:05:43 +0000 Received: from CO1NAM11FT006.eop-nam11.prod.protection.outlook.com (2603:10b6:303:b4:cafe::7b) by MW4PR03CA0253.outlook.office365.com (2603:10b6:303:b4::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27 via Frontend Transport; Thu, 2 Feb 2023 07:05:43 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1NAM11FT006.mail.protection.outlook.com (10.13.174.246) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27 via Frontend Transport; Thu, 2 Feb 2023 07:05:42 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:28 -0800 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:28 -0800 Received: from Asurada-Nvidia.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Wed, 1 Feb 2023 23:05:27 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , Subject: [PATCH v1 6/8] iommufd/selftest: Add coverage for access->ioas replacement Date: Wed, 1 Feb 2023 23:05:10 -0800 Message-ID: <8afddda23752f41a31e8233847f4998fbda9db78.1675320212.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT006:EE_|BL1PR12MB5945:EE_ X-MS-Office365-Filtering-Correlation-Id: afcc4e08-655b-4b52-531f-08db04ebe63b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 8okXiqiYtFDuCj+WyBeWpnuWkNBgdBH1ZM/UsIrYh8K0DdDtlcercdZ29JBWik67rkdUvbOkE8J7pM4cwfZWp4RJxWkmXSCZ/VdRVgJL7tm+/+i7qfxwqcg1fZ+TAbSakhT6BFgdHhsO2BcvYuPJOhabFVel7WmrVDGZsYEU/bbveK6sjkv3clUBGjsSYaux1sRaaPdtYHLK8oe6k56Tj/Csk1lTBx41DmLdQ1PuYi2tGs0pNwIqtxg8d2EN4QnH8ZkpUUv/TxG2uas1QFWo6RiSgdegID/nSUzAfZLwNpmp+8wOGRrdf0Rh+PYwHS/O7XV2YWBoxWQphGF5B6r/eTw2TKbcEVSXWQMXCaS3ZnivzpgTgalGYa73ZYxjAEhspc6+EuYkwy1pq6OIeoFgYUmvaFLXU6jBAHsOnUDwsdA3pVdLsU11NycLxP3t7yFz48EkN2f146p6x5phdsrbe/ZN2ewUwoEod8hStinVAnNglkLur9o4dYcSwGYi7uKK2GfBjotn57IMNCCR+8xpk7VphqKztdKwDGEcfDSEFTNakfxVo8hM0vH+w8YhmfhomgpptaXb9teYBxtweEQ2/w7aGgULa7F70GFHS3lPWestBrywYr70NoXuv1H/FwyQl7KtkDCqhD/jg1r5xSNuRJ8DYEINYNrG0K85fICNCKJE69KVeZEPYUuScs1IWrvC7ZuHWDtQzj6ZTaH8HpM1JA== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(396003)(39860400002)(376002)(346002)(136003)(451199018)(46966006)(36840700001)(40470700004)(70586007)(70206006)(7696005)(4326008)(8676002)(356005)(86362001)(7636003)(40460700003)(36756003)(6666004)(336012)(426003)(83380400001)(36860700001)(186003)(26005)(2616005)(82310400005)(41300700001)(8936002)(5660300002)(54906003)(110136005)(316002)(47076005)(82740400003)(7416002)(478600001)(2906002)(40480700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 07:05:42.8436 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: afcc4e08-655b-4b52-531f-08db04ebe63b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT006.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5945 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add replace coverage as a part of user_copy test case. It basically repeats the copy test after replacing the old ioas with a new one. Signed-off-by: Nicolin Chen --- tools/testing/selftests/iommu/iommufd.c | 29 +++++++++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selftests/iommu/iommufd.c index fa08209268c4..1e293950ac88 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -1239,7 +1239,13 @@ TEST_F(iommufd_mock_domain, user_copy) .dst_iova = MOCK_APERTURE_START, .length = BUFFER_SIZE, }; - unsigned int ioas_id; + struct iommu_ioas_unmap unmap_cmd = { + .size = sizeof(unmap_cmd), + .ioas_id = self->ioas_id, + .iova = MOCK_APERTURE_START, + .length = BUFFER_SIZE, + }; + unsigned int new_ioas_id, ioas_id; /* Pin the pages in an IOAS with no domains then copy to an IOAS with domains */ test_ioctl_ioas_alloc(&ioas_id); @@ -1257,11 +1263,30 @@ TEST_F(iommufd_mock_domain, user_copy) ASSERT_EQ(0, ioctl(self->fd, IOMMU_IOAS_COPY, ©_cmd)); check_mock_iova(buffer, MOCK_APERTURE_START, BUFFER_SIZE); + /* Now replace the ioas with a new one */ + test_ioctl_ioas_alloc(&new_ioas_id); + test_ioctl_ioas_map_id(new_ioas_id, buffer, BUFFER_SIZE, + ©_cmd.src_iova); + test_cmd_access_set_ioas(access_cmd.id, new_ioas_id); + + /* Destroy the old ioas and cleanup copied mapping */ + ASSERT_EQ(0, ioctl(self->fd, IOMMU_IOAS_UNMAP, &unmap_cmd)); + test_ioctl_destroy(ioas_id); + + /* Then run the same test again with the new ioas */ + access_cmd.access_pages.iova = copy_cmd.src_iova; + ASSERT_EQ(0, + ioctl(self->fd, _IOMMU_TEST_CMD(IOMMU_TEST_OP_ACCESS_PAGES), + &access_cmd)); + copy_cmd.src_ioas_id = new_ioas_id; + ASSERT_EQ(0, ioctl(self->fd, IOMMU_IOAS_COPY, ©_cmd)); + check_mock_iova(buffer, MOCK_APERTURE_START, BUFFER_SIZE); + test_cmd_destroy_access_pages( access_cmd.id, access_cmd.access_pages.out_access_pages_id); test_cmd_destroy_access(access_cmd.id); - test_ioctl_destroy(ioas_id); + test_ioctl_destroy(new_ioas_id); } /* VFIO compatibility IOCTLs */ From patchwork Thu Feb 2 07:05:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13125431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C77CC636D4 for ; Thu, 2 Feb 2023 07:06:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230017AbjBBHGJ (ORCPT ); Thu, 2 Feb 2023 02:06:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231726AbjBBHGB (ORCPT ); Thu, 2 Feb 2023 02:06:01 -0500 Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2087.outbound.protection.outlook.com [40.107.92.87]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A31EF5142D; Wed, 1 Feb 2023 23:05:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=km9wG9EEpiV7FB8rM3Ufy6PjJj1lBvlGIJ4+0FURAnKFmtMnBe2yC8kgl5LiLTtCUhgi+tZv7K/4U7rqsZm+8WeB2pacSUw1LZIR5xMtFQbfVZpdOyy1Ezg/m571iZap/VzgLfruFaI/YgPx0SDbddLw2MlAr6+GM1J8eJ5Z3m2JsrZPW9Fv3h5gW7hq/hjk9kmV56tgOv/ZEeycRyWRuJevYuQf0OTaTjESZ1gnjqhgkJL7QtDRxgUTCfXzQxcolk/J02gxYRTkDyYedUXuFKK/vZjdt6eXcA5TKVqFUH1wQ9picKal2uW1iYGpH81NzFy0drU+EQs8DdAYBsQQOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6/me+yHMo3eWn3IrYZz4uus72G5TkqZVL2HsN97heJ4=; b=dsz6ygXOzSPkXUTMxJdCPfXQ4gFMV9E/SDZqGe1E+jpbtTBm1LBQocQ2llkhmyBJmoQZS6600YVD3d7RdTNh+X3KOYd65mD7JJSB5vz5XDhYHctlleWXmS+42/hreo9hLk7fK11s7ws3+I8qUSWo8EHR4xtuUcxTrkZEzuj+zO83luOko9CB3gwn0KFoE23Esi2RSdEkKtmNDYoIEL66FMNnJBmHJByYEN0W47s5WiICWrt06wsBSAV1vj9rwt6oVuSxkMgKwQM/Y4Z5DNJGFzB+tanrzRFv0gmPb/EED+rhwYHIsDbnWDnMXOV3FsHduiff0W7vZhglk0wzV0mKkA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=6/me+yHMo3eWn3IrYZz4uus72G5TkqZVL2HsN97heJ4=; b=PgFT1KY4i6rJSrR+zMCGvM8zwXiKDeg5Z9/fj6ZvUbsmnnT1yDhsNBHlAZ75jnk3emP/9vllkoWLNhT4MD0bfHOM7Fh0b5hFZvDIBqoNUq/Bg9XYrPzb08GLVyF0n5EfjiTIfUD2ErWtHm3aDbtMTGeX8jFXdyS4ZNmgNfr9QnngKDtxZEq4ggEzF7BeBi2rIhE4vHG7FAXQ567D58Mwq8qMNfs5+z3bCRvLfvUU4/GrErs2xFcW0gSCwUvnUG/r6GFEd2FkO0w97D8NhgdD5Yctx1x2ZS/mRRbL6VbqC1CCbo0Nao6A6izksGbL8hJH4hcqiUfRFYMXsCdy3XOTdA== Received: from MW3PR05CA0013.namprd05.prod.outlook.com (2603:10b6:303:2b::18) by CH3PR12MB7546.namprd12.prod.outlook.com (2603:10b6:610:149::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.22; Thu, 2 Feb 2023 07:05:44 +0000 Received: from CO1NAM11FT098.eop-nam11.prod.protection.outlook.com (2603:10b6:303:2b:cafe::fa) by MW3PR05CA0013.outlook.office365.com (2603:10b6:303:2b::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.25 via Frontend Transport; Thu, 2 Feb 2023 07:05:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1NAM11FT098.mail.protection.outlook.com (10.13.174.207) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27 via Frontend Transport; Thu, 2 Feb 2023 07:05:44 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:30 -0800 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:29 -0800 Received: from Asurada-Nvidia.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Wed, 1 Feb 2023 23:05:28 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , Subject: [PATCH v1 7/8] iommufd/device: Use iommu_group_replace_domain() Date: Wed, 1 Feb 2023 23:05:11 -0800 Message-ID: X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT098:EE_|CH3PR12MB7546:EE_ X-MS-Office365-Filtering-Correlation-Id: 380c7cd0-6320-4a85-b7d2-08db04ebe718 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dB0Kp3bifoXauPvLoCmv4t46UCcwZizw1N7kr0awPf9mxXbDYgs9nbQ0AzOx6RqAySTndfF+IR8WpEVzx6IGA9hDz/6EQz1PdqeUogJm2xYBwWsY9OXeMJth/jOViI7wquN+MtEi4YWhBoG2JfoinQWPIcDBrUyjCTgc/1lF6zCTFpqTAfBc8VrKhcGNui/K1yvzE9hlWNx3ZORFZwpwNcybI6Y/kfLSOIxe391gFf2fidLhXrZRhLXCPXzXs//U6y+k93VoUB70PcGaJKuLuKnYXxCMWSqpOzD248GCH8pbxR2LrM1Rdu/bjMVXE0/b6iU05lvmmgQRC+INFo9djI11blanoTE0oHUrYAzhbeRGSpi/d/yyPsZPypBNlLUZu/Li5dSHqa0mFJH634xbEIjbpF8Vaa87ZOLpOIzQF61U2SWz6shmEPf60c8eebdcigoOS7HIqfkEOpRSLx9Z8m/5AO9lXuZrtuqI0ua84H6mVftJSuuMRiA1jHoGS+NnwhtPXN1YL6apB7ZW8bVw1Y1tcFbspXwIj7pp/9Wl+KxCxLdWoMH8C/GSmf7irM/2cZXQaDeT7OI/nhrfjgQlkg7Tizz1MtasNiiLSjfVeJvyk0WB4bSYSASlMmDxGf68d54+aIQnQzxeXVfZ/oSxClyMGPikJ+jTydXVLcxVFrQDWTUOmZhLldO2Phfnkl2ro66o+O/bEbyNwpAVhRiTGg== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(376002)(136003)(396003)(346002)(39860400002)(451199018)(46966006)(40470700004)(36840700001)(2906002)(5660300002)(7416002)(36860700001)(40480700001)(7636003)(82740400003)(426003)(36756003)(40460700003)(336012)(2616005)(82310400005)(186003)(26005)(478600001)(86362001)(356005)(316002)(7696005)(47076005)(54906003)(110136005)(83380400001)(70586007)(70206006)(8936002)(8676002)(41300700001)(4326008)(6666004);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 07:05:44.2945 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 380c7cd0-6320-4a85-b7d2-08db04ebe718 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT098.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7546 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org iommu_group_replace_domain() is introduced to support use cases where an iommu_group can be attached to a new domain without getting detached from the old one. This replacement feature will be useful, for cases such as: 1) vPASID mode, when a guest wants to replace a single pasid (PASID=0) table with a larger table (PASID=N) 2) Nesting mode, when switching the attaching device from an S2 domain to an S1 domain, or when switching between relevant S1 domains. as it allows these cases to switch seamlessly without a DMA disruption. So, call iommu_group_replace_domain() in the iommufd_device_do_attach(). And then decrease the refcount of the hwpt being replaced. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/device.c | 26 +++++++++++++++++++++++-- drivers/iommu/iommufd/iommufd_private.h | 2 ++ 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index 8118d5262800..c7701e449f3d 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -9,6 +9,8 @@ #include "io_pagetable.h" #include "iommufd_private.h" +MODULE_IMPORT_NS(IOMMUFD_INTERNAL); + static bool allow_unsafe_interrupts; module_param(allow_unsafe_interrupts, bool, S_IRUGO | S_IWUSR); MODULE_PARM_DESC( @@ -197,6 +199,7 @@ static bool iommufd_hw_pagetable_has_group(struct iommufd_hw_pagetable *hwpt, static int iommufd_device_do_attach(struct iommufd_device *idev, struct iommufd_hw_pagetable *hwpt) { + struct iommufd_hw_pagetable *cur_hwpt = idev->hwpt; phys_addr_t sw_msi_start = PHYS_ADDR_MAX; int rc; @@ -234,7 +237,7 @@ static int iommufd_device_do_attach(struct iommufd_device *idev, * the group once for the first device that is in the group. */ if (!iommufd_hw_pagetable_has_group(hwpt, idev->group)) { - rc = iommu_attach_group(hwpt->domain, idev->group); + rc = iommu_group_replace_domain(idev->group, hwpt->domain); if (rc) goto out_iova; @@ -246,6 +249,18 @@ static int iommufd_device_do_attach(struct iommufd_device *idev, } } + if (cur_hwpt) { + /* Replace the cur_hwpt */ + mutex_lock(&cur_hwpt->devices_lock); + if (cur_hwpt->ioas != hwpt->ioas) + iopt_remove_reserved_iova(&cur_hwpt->ioas->iopt, + idev->dev); + list_del(&cur_hwpt->hwpt_item); + list_del(&idev->devices_item); + refcount_dec(&cur_hwpt->obj.users); + refcount_dec(&idev->obj.users); + mutex_unlock(&cur_hwpt->devices_lock); + } idev->hwpt = hwpt; refcount_inc(&hwpt->obj.users); list_add(&idev->devices_item, &hwpt->devices); @@ -253,7 +268,10 @@ static int iommufd_device_do_attach(struct iommufd_device *idev, return 0; out_detach: - iommu_detach_group(hwpt->domain, idev->group); + if (cur_hwpt) + iommu_group_replace_domain(idev->group, cur_hwpt->domain); + else + iommu_detach_group(hwpt->domain, idev->group); out_iova: iopt_remove_reserved_iova(&hwpt->ioas->iopt, idev->dev); out_unlock: @@ -343,6 +361,9 @@ int iommufd_device_attach(struct iommufd_device *idev, u32 *pt_id) struct iommufd_hw_pagetable *hwpt = container_of(pt_obj, struct iommufd_hw_pagetable, obj); + if (idev->hwpt == hwpt) + goto out_done; + rc = iommufd_device_do_attach(idev, hwpt); if (rc) goto out_put_pt_obj; @@ -367,6 +388,7 @@ int iommufd_device_attach(struct iommufd_device *idev, u32 *pt_id) } refcount_inc(&idev->obj.users); +out_done: *pt_id = idev->hwpt->obj.id; rc = 0; diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommufd/iommufd_private.h index 593138bb37b8..200c783800ad 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -9,6 +9,8 @@ #include #include +#include "../iommu-priv.h" + struct iommu_domain; struct iommu_group; struct iommu_option; From patchwork Thu Feb 2 07:05:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13125430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 134E3C05027 for ; Thu, 2 Feb 2023 07:06:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231895AbjBBHGL (ORCPT ); Thu, 2 Feb 2023 02:06:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231737AbjBBHGB (ORCPT ); Thu, 2 Feb 2023 02:06:01 -0500 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2055.outbound.protection.outlook.com [40.107.220.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90F0983247; Wed, 1 Feb 2023 23:05:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=kLswzXG4CIiDs8AS9hlpKderOV1y9MWeLRq9siT1dvzp34yvvYqnhXyDQ54t+obwI0WT+phA1X72UJ4ssr7yyzKmbn3imeExlLdeuUt2bLzRTB5/92Hcu9cVOXrInbZ0ntpVH9pnEFb8dnNvMJTuGCvNWgP8alDlO02O4JVj/ia5+QzfCf9nMDuuIBDp8k+82sWkymouo+HVo9cJEQQ4niWx8HbP/M2XNN9pTc+qkenn3gaHI5eNdPGckg0O7+gJpMmyf079fXn45w/0vMSJAKDRU9gXkJzl3+oNSqIiBmT/Q8vj9SlNajr8YId3UCFey5TQxEkmN3TpBy5z+ZYXPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=cSnb3seOfXhaHtUGd2lpRQOZXaxLwCLlFKCIaNVwaKE=; b=lD2Z7ceBgYPJ6y6Om8b4sa8Qe/tRBew/Mrijx4ZAEV5msh/1h72XD/C1J+L1zMj9skeCE5xcpwpIoLNcoA5GaDJPhOdaXOCTdawI+cADjNU5x/JL4FqlFV0n474Pi7LlbqQuwZn2FDBDHXfhaX/fZ+TS/m+/cgZxOjPYbug9mc81K76FBSzCm5oPRAjPxuv9gbEsgEuKS3R421Fxu0TgiqRV+nfSWB5GQziLTyM19V/0cN5/SQ7FqD4SJICgsdRo0EMaPhQQyz5keAsQno4UGpCAqEiwQ2LjkAaULSSOMnfBsZm29nb1KRUWvNAt5iSWfZPp6hyQp9JK1aEeUl8iKQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=cSnb3seOfXhaHtUGd2lpRQOZXaxLwCLlFKCIaNVwaKE=; b=NLPhKY+ZZXL5B9/CqQun+IX/5pejfoRW4ybs0qy2gM5RP9MOfh37grkf4M9FwFhTgHlDxGTBKXlNMT+/VKYyc71Inpcf+jJh+33jU7cuYpfHY1J4iSBb4tdTxGKdI6QyVNonBkMdbxvowGuURk/Q9NQpUXU+a2K9RiiSywd6ULUhE2Czi0SJEYq0VbDrZZ/1Ohbx7+ymkxmfQJsHD3a8tEIKxGZ38GXF0vh9M+MG34/ryiIP7ks1Ag95EGCRLFybBpNBOo7fsYIcXaCWyoUPng+sOKA9VrHxLKX8gwPZXOnvjyFu5XcTRU5oAsvsMu2yGHJ+YaHhTLd27MR+mFaDtQ== Received: from MW4PR03CA0252.namprd03.prod.outlook.com (2603:10b6:303:b4::17) by DM6PR12MB4284.namprd12.prod.outlook.com (2603:10b6:5:21a::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27; Thu, 2 Feb 2023 07:05:47 +0000 Received: from CO1NAM11FT006.eop-nam11.prod.protection.outlook.com (2603:10b6:303:b4:cafe::e1) by MW4PR03CA0252.outlook.office365.com (2603:10b6:303:b4::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27 via Frontend Transport; Thu, 2 Feb 2023 07:05:46 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1NAM11FT006.mail.protection.outlook.com (10.13.174.246) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27 via Frontend Transport; Thu, 2 Feb 2023 07:05:45 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:31 -0800 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 23:05:31 -0800 Received: from Asurada-Nvidia.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Wed, 1 Feb 2023 23:05:30 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , Subject: [PATCH v1 8/8] vfio-iommufd: Support IO page table replacement Date: Wed, 1 Feb 2023 23:05:12 -0800 Message-ID: X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT006:EE_|DM6PR12MB4284:EE_ X-MS-Office365-Filtering-Correlation-Id: 4c7595f6-d48a-4fb5-bdcf-08db04ebe815 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 1Gnh3SUWum0fnbUcSxaqsQQ8zYvirFe/OGILMgL7zo7DpppV5BmQo+9ozBjK0gNFq9c1sGTLkPP4t8qvJOgLSh4/a/YJiEhXjat+JuqPvMlRaxZgE47m9pM7eihoHMam+8OYcyKHLfPcqk4R6Su+3Zr+VFLhL1L0xcG3YGEzTcIO/qqTynCAZVH+182TAeDdWiSerB5oTvtLhlifu5U5KozBT3wvXUZwooorWtXc0NcakDbxt2yMXie0yleDjRnVoSUslxPM38ZCD8kCkue8Mz6W7tOPaldet03+SKNUF1YD+Bf1qlFN3RVbu/UkOKHP3WG7AIu1N42d3afJFcjxCa6xR625RbwgP41rypoZDciPsD9O2VFLcu1QR5y8n0Leu2MhEmP9k73LcRf28t7QZs8eAJfN0HOMDdAX9HetvqncYEGLa0Y37R73cWUU4KBTCogUkpGyIAna9ZVxgy1YVxoPSjfvphWLj1GkzKPmyEG3VEOvpXda75YlzOv5nRigDtNm7hUlT6r9/pxyDmGI59BI0/GKLAv4N+xUgqDUVBJUvGIe3oTvk76M+oDuls5A35ybgFWTyApDuPGP7c+1U/WfcUSSjCv5qsrUqUVsdg5Ku9/DuAkTREqb2uegLRw8IBjmZ4bhFPlD+9KFcOe5xMrT4OfIWfp/EC+wTE6jj/78FKaAhd0Ivf8J6cFP6D+ppFxRLE++SvA90OYrAzs4Bg== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(396003)(39860400002)(136003)(376002)(346002)(451199018)(46966006)(40470700004)(36840700001)(86362001)(2906002)(478600001)(36756003)(70586007)(4744005)(40460700003)(7416002)(6666004)(26005)(186003)(2616005)(7696005)(8936002)(336012)(40480700001)(47076005)(5660300002)(356005)(426003)(41300700001)(8676002)(82310400005)(4326008)(83380400001)(70206006)(316002)(82740400003)(36860700001)(110136005)(7636003)(54906003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 07:05:45.9528 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4c7595f6-d48a-4fb5-bdcf-08db04ebe815 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT006.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4284 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Remove the vdev->iommufd_attached check, since the kernel can internally handle a replacement of the IO page table now. Signed-off-by: Nicolin Chen --- drivers/vfio/iommufd.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/vfio/iommufd.c b/drivers/vfio/iommufd.c index 7e09defbcffe..f9e89b3eef69 100644 --- a/drivers/vfio/iommufd.c +++ b/drivers/vfio/iommufd.c @@ -111,9 +111,6 @@ int vfio_iommufd_physical_attach_ioas(struct vfio_device *vdev, u32 *pt_id) return 0; } - if (vdev->iommufd_attached) - return -EBUSY; - rc = iommufd_device_attach(vdev->iommufd_device, pt_id); if (rc) return rc;