From patchwork Sat Feb 4 08:47:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qu Wenruo X-Patchwork-Id: 13128623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02488C61DA4 for ; Sat, 4 Feb 2023 08:49:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9jzyOyQrc3Q7VnkDa6ctWmsuzn9X1KS7Rlqh1J7/upA=; b=hg0pqOD7Ixbwhx 1uoigr/qfk3uBCwFyptnovv9XY4+YH0uOL9vUV6D2lGiTTgDM5ys0z0sWyAARZhpNFDNVBeIT806P YNBwKTvR+JkSvv78oWshbeuSP+29ROuqjm9cEYBzVJ0at1/lt9dGp05e7OKIG6rkGNFhfGDwOUu++ /6Ubcq8bxBsJPCuc6aMeExJDlq4sqByixeg1Nwc4A/gIppzBI1jpfxdLil15JuMNltaZ8U6ArpAfM Iq9V94LdZbNpAViXaedJ25//O534C24BwEwB01sZB/Vq5G56giO/aZE20kzVfXOjblDkbZm5OLU8n njCffgeELLJx2HqSazig==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pOEDu-004kKT-1q; Sat, 04 Feb 2023 08:48:38 +0000 Received: from smtp-out2.suse.de ([195.135.220.29]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pOEDi-004kGS-VB; Sat, 04 Feb 2023 08:48:28 +0000 Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id F2CCF5D654; Sat, 4 Feb 2023 08:48:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1675500503; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=d7z5XdZWoamkGn7uclimU2ACqm9qye4DCglVI+koIEk=; b=nATeYykF8rYYi8PGDJueJBr6A+n8QfcOfWScCp882P7FlYezgDoYWJTlaT47kwC2+80dMe qwfTyrzDtXWbJ1hztMkSqydo60Myctw7J09zWgiXw9qJvUmOgo7LLUO8vNymOovDIqzNaW gPBonH7+SxVwzhv1xBhS4R4U37ra4ew= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id A4C95133F5; Sat, 4 Feb 2023 08:48:21 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id wJSrHdUb3mMKLAAAMHmgww (envelope-from ); Sat, 04 Feb 2023 08:48:21 +0000 From: Qu Wenruo To: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: sebastian.reichel@collabora.com, heiko@sntech.de Subject: [PATCH RFC 1/5] drivers: phy: rockhip: remove 24M and 25M clock handling for naneng combphy Date: Sat, 4 Feb 2023 16:47:58 +0800 Message-Id: <90166337143165787f131516976032af7aa200e8.1675498628.git.wqu@suse.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230204_004827_183622_45110D2F X-CRM114-Status: GOOD ( 10.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Although the combphy supports 24M and 25M clocks, they are not utilized at any upstream dts (RK3568) nor downstream vendor kernel (RK3568, RK3588S, RK3588). Another thing is, with those two clocks removed, it's easier to port the rk3588 combphy, as 3588 combphy needs to write into cfg->pipe_clk_24m for 24M clock case. Signed-off-by: Qu Wenruo --- .../phy/rockchip/phy-rockchip-naneng-combphy.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index 7b213825fb5d..ae7083ae17a2 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -94,7 +94,6 @@ struct rockchip_combphy_grfcfg { struct combphy_reg pipe_rxterm_set; struct combphy_reg pipe_txelec_set; struct combphy_reg pipe_txcomp_set; - struct combphy_reg pipe_clk_25m; struct combphy_reg pipe_clk_100m; struct combphy_reg pipe_phymode_sel; struct combphy_reg pipe_rate_sel; @@ -454,21 +453,6 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv) rate = clk_get_rate(priv->refclk); switch (rate) { - case REF_CLOCK_24MHz: - if (priv->type == PHY_TYPE_USB3 || priv->type == PHY_TYPE_SATA) { - /* Set ssc_cnt[9:0]=0101111101 & 31.5KHz. */ - val = PHYREG15_SSC_CNT_VALUE << PHYREG15_SSC_CNT_SHIFT; - rockchip_combphy_updatel(priv, PHYREG15_SSC_CNT_MASK, - val, PHYREG15); - - writel(PHYREG16_SSC_CNT_VALUE, priv->mmio + PHYREG16); - } - break; - - case REF_CLOCK_25MHz: - rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_clk_25m, true); - break; - case REF_CLOCK_100MHz: rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); if (priv->type == PHY_TYPE_PCIE) { @@ -530,7 +514,6 @@ static const struct rockchip_combphy_grfcfg rk3568_combphy_grfcfgs = { .pipe_rxterm_set = { 0x0000, 12, 12, 0x00, 0x01 }, .pipe_txelec_set = { 0x0004, 1, 1, 0x00, 0x01 }, .pipe_txcomp_set = { 0x0004, 4, 4, 0x00, 0x01 }, - .pipe_clk_25m = { 0x0004, 14, 13, 0x00, 0x01 }, .pipe_clk_100m = { 0x0004, 14, 13, 0x00, 0x02 }, .pipe_phymode_sel = { 0x0008, 1, 1, 0x00, 0x01 }, .pipe_rate_sel = { 0x0008, 2, 2, 0x00, 0x01 }, From patchwork Sat Feb 4 08:47:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qu Wenruo X-Patchwork-Id: 13128626 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DDBE8C61DA4 for ; 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Sat, 4 Feb 2023 08:48:23 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id UOkpBtcb3mMKLAAAMHmgww (envelope-from ); Sat, 04 Feb 2023 08:48:23 +0000 From: Qu Wenruo To: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: sebastian.reichel@collabora.com, heiko@sntech.de Subject: [PATCH RFC 2/5] dt-bindings: pci: controller: add pcie controller binding for RK3588 Date: Sat, 4 Feb 2023 16:47:59 +0800 Message-Id: X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230204_004827_397459_DC0EFAD9 X-CRM114-Status: UNSURE ( 9.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org All the properties are the same with RK3568 PCIE controllers, and in fact the driver can also be reused between RK3568 and RK3588 PCIE controllers. Signed-off-by: Qu Wenruo Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 2be72ae1169f..473c90a163b1 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -21,8 +21,9 @@ allOf: properties: compatible: - items: - - const: rockchip,rk3568-pcie + enum: + - rockchip,rk3568-pcie + - rockchip,rk3588-pcie reg: items: From patchwork Sat Feb 4 08:48:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qu Wenruo X-Patchwork-Id: 13128624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CCE46C636CD for ; Sat, 4 Feb 2023 08:49:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dsxR6sKrPNRPCnVHSsQz6eP/tj4Yvwh3joepvM2o48I=; b=B5p7CFFLDORcEz CrpQ+7zT9mBJ7fWqKReLnHYZ1PH1qYevZnyTAGE7uV2BeA64GqgvIaqmD0BGyFG+j45hPNr+mfNPl aczbVfUOPG5fjmYrEhcs7fczTJx7BisbjJj4fLIB35/HSMxTF9lNWUXmKz6ylxK/hM0Qn+HrUeLCq cn8AFOTt1S67nyc2sB6Z4IAcGb19FNKC9DiWy7S2hzFhFeqVDMoGsqK2aXpgb1Sc1Ff4rMvb/3PnK pzct0dSbid29WNpBQQHCZWhf2r1HCBTFqJ0tONuonipzXJ5bxmrTQ7AQiawcC/D1GY0OpmXUt99V1 U8pXeqljWwimt38JBmRw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pOEE1-004kMB-Vb; Sat, 04 Feb 2023 08:48:46 +0000 Received: from smtp-out2.suse.de ([195.135.220.29]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pOEDj-004kGc-B5; Sat, 04 Feb 2023 08:48:29 +0000 Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 269285D655; Sat, 4 Feb 2023 08:48:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1675500506; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LfXFDj2zbKch59pbOhh+rRsUmyO2+PkAEbeDIy2JVk4=; b=GRstlmIUesSyP7u9eKKfjBsZplR+yuatbBaqcEPRVuJe85wg2Q27xBgyMnk3s2XT/P37vR 5YWRxCWqaZeVt5kMqGrrRhJgeg92r7YEZCKAHzRiURKQRCsx00S27+mPEBHi9FXEpckcSL 3ZkWEYe+QuHhCFuJLWsYRJbLbZPkUgY= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id D978C133F5; Sat, 4 Feb 2023 08:48:24 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id aCxVKtgb3mMKLAAAMHmgww (envelope-from ); Sat, 04 Feb 2023 08:48:24 +0000 From: Qu Wenruo To: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: sebastian.reichel@collabora.com, heiko@sntech.de Subject: [PATCH RFC 3/5] drivers: pci: controller: add PCIE controller driver for RK3588 Date: Sat, 4 Feb 2023 16:48:00 +0800 Message-Id: <5ec4caab3fa934c173bbbfbbf711b1d2429426a7.1675498628.git.wqu@suse.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230204_004827_538449_FFA5A522 X-CRM114-Status: GOOD ( 10.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to the downstream code, the RK3568 and RK3588 share the same driver. Downstream code only has extra handling for the following cases: - RK1808 driver - Bifurcation handling - Endpoint handling All of the above features are not available upstream anyway. Thus here we only need to add a new compatible string for the existing driver. Signed-off-by: Qu Wenruo --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index c1e7653e508e..435b717e5bc6 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -354,6 +354,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev) static const struct of_device_id rockchip_pcie_of_match[] = { { .compatible = "rockchip,rk3568-pcie", }, + { .compatible = "rockchip,rk3588-pcie", }, {}, }; From patchwork Sat Feb 4 08:48:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qu Wenruo X-Patchwork-Id: 13128628 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64A39C636CC for ; Sat, 4 Feb 2023 08:50:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jY6LG0NaCEJyQ80uAtJFayHdTpTiQiSlsOKJWtRY5Qw=; b=BcelIEqD0e+hYo ykcB38h5+zaayj7NH9vPAXExQka6HVzGR2TePiNevwATX5ug7TgsQlFEidX+o8fVpQhfFBOc5Q++S iTfWtXXslFY5ogkbQ04clSmUWYa1eUeG+89lb0sGsaa4tBYA5RfjhCG2TGXOy3F9k7mfGEEOctXfm lMSGQ8Cxc6HvRea9/ZEvorcrByxjBnYyrrUbf9TKqhuvsbX5VIh1tAXczTQyHkpzV/lIRgdVYCN2v cy5hOQKEl+lKWscJjosVULauZ0hzXyBRMAcFpgyZ+C8oBmX6iDdP/0QRB5spJncCIjUSsBa1zKwgc zPsH4VYN2r3Ekzp9OaFg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pOEEI-004kRF-5X; Sat, 04 Feb 2023 08:49:02 +0000 Received: from smtp-out1.suse.de ([195.135.220.28]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pOEDl-004kHp-NM; Sat, 04 Feb 2023 08:48:31 +0000 Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id BE6BD38288; Sat, 4 Feb 2023 08:48:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1675500507; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HWO66ufv+5b4i35dkcrzDpCfgBQgEkUbxJLcbiZMd7I=; b=lQ2ti8IM3Ku9Wh0u7z9SIICadQ8WM8rPBonUpBjRZickyyR+m6+s7WEDn4b79Qxrrhe9h9 GZR0NIK896oJk+dYyFJs88nZz9dYagj9F3cHnPSL9m6HohlecSMG9MQVWGFZBzjhg5eFvx gWlSM3RtO2HNpO3fPqzNgbgFkN2IQR4= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 7AEEB133F5; Sat, 4 Feb 2023 08:48:26 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id iMNBE9ob3mMKLAAAMHmgww (envelope-from ); Sat, 04 Feb 2023 08:48:26 +0000 From: Qu Wenruo To: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: sebastian.reichel@collabora.com, heiko@sntech.de Subject: [PATCH RFC 4/5] arm64: dts: rockchip: add PCIE3 controller and phy for RK3588 Date: Sat, 4 Feb 2023 16:48:01 +0800 Message-Id: X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230204_004829_996664_FA681DD7 X-CRM114-Status: GOOD ( 12.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RK3588 has one PCIE3 x4 lanes, with one dedicated PCIE phy. This introduces the following needed nodes: - its0 and its1 sub-nodes of gic - pcie30_phy_grf node With the existing rk3588-pcie3-phy-grf compatible string. - pcie3x4 and pcie3x2 nodes The main nodes for the pcie controller. They share the same phy, thus only one of them can be enabled. - pcie30phy node It's the dedicated PCIE phy. The differences between upstream and downstream dts are: - The interrupt cells Upstream has two ppi partitions, thus requires #interrupt-cells = <4> to specify which partition is preferred. - The configuration space The downstream goes with an invalid range window, and modifies DesignWare driver to use that invalid range as configure space. Change the cursed method to use the proper "config" reg. - Reg names The downstream always has unnecessary "pcie-" prefix, while upstream DesignWare driver never checks such prefix. Signed-off-by: Qu Wenruo --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 128 ++++++++++++++++++++++ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 16 +++ 2 files changed, 144 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index d085e57fbc4c..371d7330a498 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -7,6 +7,121 @@ #include "rk3588-pinctrl.dtsi" / { + pcie30_phy_grf: syscon@fd5b8000 { + compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon"; + reg = <0x0 0xfd5b8000 0x0 0x10000>; + }; + + pcie3x4: pcie@fe150000 { + compatible = "rockchip,rk3588-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x00 0x0f>; + clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, + <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, + <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie3x4_intc 0>, + <0 0 0 2 &pcie3x4_intc 1>, + <0 0 0 3 &pcie3x4_intc 2>, + <0 0 0 4 &pcie3x4_intc 3>; + linux,pci-domain = <0>; + num-ib-windows = <16>; + num-ob-windows = <16>; + num-viewport = <8>; + max-link-speed = <3>; + msi-map = <0x0000 &its1 0x0000 0x1000>; + num-lanes = <4>; + phys = <&pcie30phy>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + ranges = <0x81000000 0x0 0xf0100000 0x0 0xf0100000 0x0 0x100000 + 0x82000000 0x0 0xf0200000 0x0 0xf0200000 0x0 0xe00000 + 0xc3000000 0x9 0x00000000 0x9 0x00000000 0x0 0x40000000>; + reg = <0x0 0xfe150000 0x0 0x10000>, + <0xa 0x40000000 0x0 0x400000>, + <0x0 0xf0000000 0x0 0x100000>; + reg-names = "apb", "dbi", "config"; + resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>; + reset-names = "pcie", "periph"; + rockchip,pipe-grf = <&php_grf>; + status = "disabled"; + + pcie3x4_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + + pcie3x2: pcie@fe160000 { + compatible = "rockchip,rk3588-pcie", "snps,dw-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x10 0x1f>; + clocks = <&cru ACLK_PCIE_2L_MSTR>, <&cru ACLK_PCIE_2L_SLV>, + <&cru ACLK_PCIE_2L_DBI>, <&cru PCLK_PCIE_2L>, + <&cru CLK_PCIE_AUX1>, <&cru CLK_PCIE2L_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie3x2_intc 0>, + <0 0 0 2 &pcie3x2_intc 1>, + <0 0 0 3 &pcie3x2_intc 2>, + <0 0 0 4 &pcie3x2_intc 3>; + linux,pci-domain = <1>; + num-ib-windows = <16>; + num-ob-windows = <16>; + num-viewport = <8>; + max-link-speed = <3>; + msi-map = <0x1000 &its1 0x1000 0x1000>; + num-lanes = <2>; + phys = <&pcie30phy>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + ranges = <0x81000000 0x0 0xf1100000 0x0 0xf1100000 0x0 0x100000 + 0x82000000 0x0 0xf1200000 0x0 0xf1200000 0x0 0xe00000 + 0xc3000000 0x9 0x40000000 0x9 0x40000000 0x0 0x40000000>; + reg = <0x0 0xfe160000 0x0 0x10000>, + <0xa 0x40400000 0x0 0x400000>, + <0x0 0xf1000000 0x0 0x100000>; + reg-names = "apb", "dbi", "config"; + resets = <&cru SRST_PCIE1_POWER_UP>, <&cru SRST_P_PCIE1>; + reset-names = "pcie", "periph"; + rockchip,pipe-grf = <&php_grf>; + status = "disabled"; + + pcie3x2_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + gmac0: ethernet@fe1b0000 { compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; reg = <0x0 0xfe1b0000 0x0 0x10000>; @@ -55,4 +170,17 @@ gmac0_mtl_tx_setup: tx-queues-config { queue1 {}; }; }; + + pcie30phy: phy@fee80000 { + compatible = "rockchip,rk3588-pcie3-phy"; + reg = <0x0 0xfee80000 0x0 0x20000>; + #phy-cells = <0>; + clocks = <&cru PCLK_PCIE_COMBO_PIPE_PHY>; + clock-names = "pclk"; + resets = <&cru SRST_PCIE30_PHY>; + reset-names = "phy"; + rockchip,pipe-grf = <&php_grf>; + rockchip,phy-grf = <&pcie30_phy_grf>; + status = "disabled"; + }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 24919cb5c153..3af31e12d04c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1594,6 +1594,22 @@ gic: interrupt-controller@fe600000 { mbi-ranges = <424 56>; msi-controller; #interrupt-cells = <4>; + #address-cells = <2>; + #size-cells = <2>; + + its0: interrupt-controller@fe640000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x0 0xfe640000 0x0 0x20000>; + }; + + its1: interrupt-controller@fe660000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x0 0xfe660000 0x0 0x20000>; + }; ppi-partitions { ppi_partition0: interrupt-partition-0 { From patchwork Sat Feb 4 08:48:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qu Wenruo X-Patchwork-Id: 13128627 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2D87C636CC for ; Sat, 4 Feb 2023 08:50:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Sat, 04 Feb 2023 08:48:27 +0000 From: Qu Wenruo To: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: sebastian.reichel@collabora.com, heiko@sntech.de Subject: [PATCH RFC 5/5] arm64: dts: rockchip: enable PCIE3 controller and phy for Rock5B boards Date: Sat, 4 Feb 2023 16:48:02 +0800 Message-Id: <74cec42b80db30395772df61fd8029bbf5a56411.1675498628.git.wqu@suse.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230204_004830_794612_A4BE5B7C X-CRM114-Status: GOOD ( 10.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org We only needs to define the needed 3v3 voltage for the PCIE controller, and enable both the controller and phy. Since I only own Rock5B boards for RK3588, I can not test for sure for other boards, thus this patch only enables the PCIE controller/phy for Rock5B. Signed-off-by: Qu Wenruo --- .../boot/dts/rockchip/rk3588-rock-5b.dts | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts index d2f1e963ce06..75015f065ceb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -2,6 +2,7 @@ /dts-v1/; +#include #include "rk3588.dtsi" / { @@ -25,6 +26,17 @@ vcc5v0_sys: vcc5v0-sys-regulator { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; + + vcc3v3_pcie30: vcc3v3-pcie30 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie30"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + startup-delay-us = <5000>; + vin-supply = <&vcc5v0_sys>; + }; }; &sdhci { @@ -38,6 +50,16 @@ &sdhci { status = "okay"; }; +&pcie30phy { + status = "okay"; +}; + +&pcie3x4 { + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie30>; + status = "okay"; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay";