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Wed, 8 Feb 2023 07:18:21 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT105.mail.protection.outlook.com (10.13.176.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6086.17 via Frontend Transport; Wed, 8 Feb 2023 07:18:21 +0000 Received: from rric.localdomain (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 8 Feb 2023 01:18:16 -0600 From: Robert Richter To: Alison Schofield , Vishal Verma , Ira Weiny , Ben Widawsky , Dan Williams CC: Jonathan Cameron , Dave Jiang , Robert Richter , , Subject: [PATCH] cxl/port: Disable decoder setup for endpoints in RCD mode Date: Wed, 8 Feb 2023 08:17:58 +0100 Message-ID: <20230208071758.658652-1-rrichter@amd.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT105:EE_|BL1PR12MB5924:EE_ X-MS-Office365-Filtering-Correlation-Id: dfca6380-eb19-4995-785e-08db09a4a8ca X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Feb 2023 07:18:21.3716 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dfca6380-eb19-4995-785e-08db09a4a8ca X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT105.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5924 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org In RCD mode the HDM decoder capability is optional for endpoints and may not exist. The HDM range registers are used instead. Since the driver relies on the existence of an HDM decoder capability, its absence will cause the initialization of a memory card to fail. Moreover, the driver also tries to enable or reuse enabled memory ranges. In the worst case this may lead to a system hang due to disabling system memory that was previously provided and setup by system firmware. To solve the issues described, disable decoder setup for RCD endpoints and instead rely exclusively on system firmware to enable those memory ranges. Decoders are used by the kernel to setup and configure CXL memory regions, esp. to enable and disable them. Since Hot-plug is not supported for devices in RCD mode, the ability to disable that memory by the kernel using a decoder is not a necessarily requirement, decoders are not needed then. Fixes: 34e37b4c432c ("cxl/port: Enable HDM Capability after validating DVSEC Ranges") Signed-off-by: Robert Richter --- drivers/cxl/port.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) base-commit: 623c0751336e4035ab0047f2c152a02bd26b612b diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c index 5453771bf330..19591d904bdf 100644 --- a/drivers/cxl/port.c +++ b/drivers/cxl/port.c @@ -43,11 +43,11 @@ static int cxl_port_probe(struct device *dev) return rc; if (rc == 1) return devm_cxl_add_passthrough_decoder(port); - } - cxlhdm = devm_cxl_setup_hdm(port); - if (IS_ERR(cxlhdm)) - return PTR_ERR(cxlhdm); + cxlhdm = devm_cxl_setup_hdm(port); + if (IS_ERR(cxlhdm)) + return PTR_ERR(cxlhdm); + } if (is_cxl_endpoint(port)) { struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport); @@ -61,6 +61,19 @@ static int cxl_port_probe(struct device *dev) if (rc) return rc; + /* + * The HDM decoder capability may not exist. Do not + * use decoders in RCD mode, instead rely on firmware + * to setup the range or decoder registers and to + * enable memory. + */ + if (cxlds->rcd) + return cxl_await_media_ready(cxlds); + + cxlhdm = devm_cxl_setup_hdm(port); + if (IS_ERR(cxlhdm)) + return PTR_ERR(cxlhdm); + rc = cxl_hdm_decode_init(cxlds, cxlhdm); if (rc) return rc;