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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Arinc Unal , Frank Wunderlich Cc: Richard van Schagen , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH] Fix setting up CPU and User ports to be in the correct mode during setup and when toggling vlan_filtering on a bridge port. Date: Sun, 12 Feb 2023 22:39:49 +0100 Message-Id: <20230212213949.672443-1-richard@routerhints.com> X-Mailer: git-send-email 2.30.2 X-ClientProxiedBy: AM0P190CA0001.EURP190.PROD.OUTLOOK.COM (2603:10a6:208:190::11) To VE1PR04MB7454.eurprd04.prod.outlook.com (2603:10a6:800:1a8::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VE1PR04MB7454:EE_|VI1PR04MB7149:EE_ X-MS-Office365-Filtering-Correlation-Id: e6621a02-39cb-4f19-31b7-08db0d41f757 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 1Z77X2P7JYrhmvEAlz2AgQ5YLCCAg4hL6immVhj7N1wPQ+qh+rvdT1AYaRvoWyBHtqZngGo7aKYmyHqeFrtJNQlXsDMbDG9HlC80uIKzK0DxMdmgWV2Z4GYTDr6eQ04+bhwLG7tlhkEOqJBvsFBH9rZW4riMUFwXVCtj9FzMjdu3mL1PDt2cmUrgdlrj2FkER1rcFA8Ze3zL3XbXCTxDvE9ruJYScqsUG0MBlUq0/YRj88zbLzvB7R9XKGUM5v7AYmfrbHPkUP9i2pSXRx1i8K4p1iJw/JoaLjlTCWSrFebA01QFEsOj1NW39DQpmLzmPye4ZZK7K6Hf4zZLF87GVUYrIzkWmSwoeD8r9gZyRXyGoLPvj1Evq8HxOiJKU+HXe81sbTaTB5peMklSRhkAOS0/vZksatoZA08CySL2TFj5TbA+eF9Tc34yr/LPx0iawKBJ3T45icQc4ZAZtYdWaKmQY+zHYZdZl/4Xtpg94nSJKfBzZm9IBAyfdyF0gVs1ZAfrB2gTkEQq4JPz3h9KdlX53CIdnz/02w4GoifnQyb4LnC8rXmPt+tpQzO34U9aifCb8O4PFbm+idg+76jDdbLyLXzjBdRE4AG/KfsF5baYHoDjsSSOENnwgUUNngVHLE6r1QutOb4swa02iGt33lbIYoVUmD9dySgBY4YqpNVopozh8TKDXVAOSen6kOXo X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VE1PR04MB7454.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230025)(346002)(39830400003)(396003)(366004)(136003)(376002)(451199018)(86362001)(478600001)(2616005)(6512007)(186003)(4326008)(8676002)(66946007)(66556008)(66476007)(6486002)(6666004)(52116002)(1076003)(6506007)(110136005)(316002)(921005)(5660300002)(7416002)(83380400001)(38100700002)(41300700001)(36756003)(8936002)(2906002);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Wr5qMSBC00GjZjlXSE4blMVMwhsYsaeukgY7XezRYd1JmpnosHBhywI+EC0SZmEIZo7NZ/zQiNHxc20flAJHP7skSAi0Nb4Kc5TrXe+5QjennkW0T6Yk/cxLZGy5PpF50bmZ1vTKBHx6MondsLAK7iDQWgniwADj1nwqfngI+v9woRVop2TTquVpiLJQeMJ5qfyV8Oe0bAgeV5tvZ4ORac25e1kbht0vkkFkJFqLLmBpuzTcRSXmiADtYIej4uKOs23PZhk/Y8J/0an7bsG6UxbDOpMGL1wBWU9ccU+U2vjzGIbv7JLmethFp/l7qGeH7f0m/Wa8v9c4ScXvGj9vU9/CIKoJ1GV1IUhurqWeo6AiA0vE/ZAQdUzjNNB11JL00OXwoDdC5mRxP+YSFO3FPbO/MQsRMzLbQ4d93KzcD/Gn4ZNfkNA1HB13izc4qcGem3kA9jMsaq9GrVk02ZZx63wmrbbX9stCM9drpmsrXIX7DE5cvwmfociJVLS/X+s71iNFBrII/ykm96n+XWAmND2GF/v9O9eTvEIoZgFDqip0obGlwR2I2+jTCAEXzYXBXZL9L50HjWckzLXwR+bCKMlH/qvwT1Spwx8/Bds+MGG35rjpBJmOOGaJ/ggQ6vw+w8rZT/L8JtjlZlPJpI/Gz+kCfxycEyfpPGkz71VLhUYjXHHBseYhbu5ipQoCP9Bs3uUrQFMiNc0W1UPYIZmVcmMkMQ/H+r0AgJdJZse5qZBhywHrO9LL9wd5vlnHsL2+fzfWeUtjKMXwaTF/4/4SaVWs0l8T63pyY8nyFCmgVuWEDbrczshezkNTK3O+seHCf1chIsuUbslyb3euZvPgoRjYZmW6sco7x0hn3bWScHKbUdE+D64TfSiNW8BSk+lGOPf/MSjZ78NOIIcob1SzVm43TsHNakhs7FUY2i5xTPBYLTNDUnNi7sVg0exQGzcSFIv5FV/omiG0/uZPo0kTIve9LBp7b1ESeeNjAcrDB8LSZfIJLThLSg+NiKwR/7l1cScCXNjXNKr71xqwykY1ZUKudxhPkTfDf50IHbmxkPEhFjbdoVoJNAmrLJKlQuGKyjSRrx1IxuRTSfL3ld/RWZFAy3Mf4eQUdU5MKvTstNzfLbzhKOFbbY/5Snq6TSkbEyCFm7anp44TTL2/laix+pj5Ex3YfgdsZOeUcab05Gbv3tsVif4zpi0nL3YDjxF76NySU3mEvzT1EOFejbLINiGQSmNbr0qw7i7WeVVa1R2LqpCy139jRwPK5I/OLG4AYPcBBqaiKxdhfShI8/ZuGHUkL5aYYR9YgiawuuhM3nODHz36cD0YPBBgy4FCZbv8JqOt+OitKSlX2Q4mVmTgTNM32Cs0P6OPl8h80Z6ln9udQbniGQWSCOGM7Wu7cV8r6nBVQQ0IcEJe2a2jVSCQFBepKV4BZeTpgbaJoV9XChei0/In/1vbN/iRgSnp5DKaOGyoAtJBYpWcbo8x8Xe3VfimepoIRAiq/vOlDMIa2k0Q1rMAStkVI4HuW7aSDoFHHh3KZUd+fM8bE5oFIyAaNNspwYMtZPeX4NOpA6VsLQzw7bJrSIgfhqELrZ8H2hkyDBp0t7LBNWjF3Lc16czJQWNayFnqPit59Fm9hqZUvP9epOCjzZT/PM13e9iaOxLOOTo0dpb9dzAleG+PxoKFAg== X-OriginatorOrg: routerhints.com X-MS-Exchange-CrossTenant-Network-Message-Id: e6621a02-39cb-4f19-31b7-08db0d41f757 X-MS-Exchange-CrossTenant-AuthSource: VE1PR04MB7454.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2023 21:41:58.0372 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 28838f2d-4c9a-459e-ada0-2a4216caa4fd X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Qcr/jNfGzAPmCBRvZYxG5aMteZ6mDuo8Ew73jF+pyuDl7oAeuyGtwGeCLrdxRc8npnofPp79ItZ3o+pXzV1KMA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB7149 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230212_134206_696514_F73B1265 X-CRM114-Status: GOOD ( 22.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --- drivers/net/dsa/mt7530.c | 124 ++++++++++++++------------------------- 1 file changed, 43 insertions(+), 81 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 3a15015bc409..f98a94361c84 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1027,6 +1027,12 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port) mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, MT7530_PORT_FALLBACK_MODE); + mt7530_rmw(priv, MT7530_PVC_P(port), + VLAN_ATTR_MASK | PVC_EG_TAG_MASK | ACC_FRM_MASK, + VLAN_ATTR(MT7530_VLAN_USER) | + PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT) | + MT7530_VLAN_ACC_ALL); + return 0; } @@ -1229,10 +1235,6 @@ mt7530_port_bridge_join(struct dsa_switch *ds, int port, PCR_MATRIX_MASK, PCR_MATRIX(port_bitmap)); priv->ports[port].pm |= PCR_MATRIX(port_bitmap); - /* Set to fallback mode for independent VLAN learning */ - mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, - MT7530_PORT_FALLBACK_MODE); - mutex_unlock(&priv->reg_mutex); return 0; @@ -1242,15 +1244,6 @@ static void mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port) { struct mt7530_priv *priv = ds->priv; - bool all_user_ports_removed = true; - int i; - - /* This is called after .port_bridge_leave when leaving a VLAN-aware - * bridge. Don't set standalone ports to fallback mode. - */ - if (dsa_port_bridge_dev_get(dsa_to_port(ds, port))) - mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, - MT7530_PORT_FALLBACK_MODE); mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK | PVC_EG_TAG_MASK | ACC_FRM_MASK, @@ -1261,27 +1254,6 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port) /* Set PVID to 0 */ mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, G0_PORT_VID_DEF); - - for (i = 0; i < MT7530_NUM_PORTS; i++) { - if (dsa_is_user_port(ds, i) && - dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) { - all_user_ports_removed = false; - break; - } - } - - /* CPU port also does the same thing until all user ports belonging to - * the CPU port get out of VLAN filtering mode. - */ - if (all_user_ports_removed) { - struct dsa_port *dp = dsa_to_port(ds, port); - struct dsa_port *cpu_dp = dp->cpu_dp; - - mt7530_write(priv, MT7530_PCR_P(cpu_dp->index), - PCR_MATRIX(dsa_user_ports(priv->ds))); - mt7530_write(priv, MT7530_PVC_P(cpu_dp->index), PORT_SPEC_TAG - | PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); - } } static void @@ -1292,36 +1264,24 @@ mt7530_port_set_vlan_aware(struct dsa_switch *ds, int port) /* Trapped into security mode allows packet forwarding through VLAN * table lookup. */ - if (dsa_is_user_port(ds, port)) { - mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, - MT7530_PORT_SECURITY_MODE); - mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, - G0_PORT_VID(priv->ports[port].pvid)); + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, + MT7530_PORT_SECURITY_MODE); + mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, + G0_PORT_VID(priv->ports[port].pvid)); - /* Only accept tagged frames if PVID is not set */ - if (!priv->ports[port].pvid) - mt7530_rmw(priv, MT7530_PVC_P(port), ACC_FRM_MASK, - MT7530_VLAN_ACC_TAGGED); + /* Only accept tagged frames if PVID is not set */ + if (!priv->ports[port].pvid) + mt7530_rmw(priv, MT7530_PVC_P(port), ACC_FRM_MASK, + MT7530_VLAN_ACC_TAGGED); - /* Set the port as a user port which is to be able to recognize - * VID from incoming packets before fetching entry within the - * VLAN table. - */ - mt7530_rmw(priv, MT7530_PVC_P(port), - VLAN_ATTR_MASK | PVC_EG_TAG_MASK, - VLAN_ATTR(MT7530_VLAN_USER) | - PVC_EG_TAG(MT7530_VLAN_EG_DISABLED)); - } else { - /* Also set CPU ports to the "user" VLAN port attribute, to - * allow VLAN classification, but keep the EG_TAG attribute as - * "consistent" (i.o.w. don't change its value) for packets - * received by the switch from the CPU, so that tagged packets - * are forwarded to user ports as tagged, and untagged as - * untagged. - */ - mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK, - VLAN_ATTR(MT7530_VLAN_USER)); - } + /* Set the port as a user port which is to be able to recognize + * VID from incoming packets before fetching entry within the + * VLAN table. + */ + mt7530_rmw(priv, MT7530_PVC_P(port), + VLAN_ATTR_MASK | PVC_EG_TAG_MASK, + VLAN_ATTR(MT7530_VLAN_USER) | + PVC_EG_TAG(MT7530_VLAN_EG_DISABLED)); } static void @@ -1526,20 +1486,11 @@ static int mt7530_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, struct netlink_ext_ack *extack) { - struct dsa_port *dp = dsa_to_port(ds, port); - struct dsa_port *cpu_dp = dp->cpu_dp; - - if (vlan_filtering) { - /* The port is being kept as VLAN-unaware port when bridge is - * set up with vlan_filtering not being set, Otherwise, the - * port and the corresponding CPU port is required the setup - * for becoming a VLAN-aware port. - */ + if (vlan_filtering) mt7530_port_set_vlan_aware(ds, port); - mt7530_port_set_vlan_aware(ds, cpu_dp->index); - } else { + else mt7530_port_set_vlan_unaware(ds, port); - } + return 0; } @@ -2225,10 +2176,16 @@ mt7530_setup(struct dsa_switch *ds) /* Set default PVID to 0 on all user ports */ mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK, G0_PORT_VID_DEF); + + mt7530_rmw(priv, MT7530_PVC_P(i), + VLAN_ATTR_MASK | PVC_EG_TAG_MASK | ACC_FRM_MASK, + VLAN_ATTR(MT7530_VLAN_TRANSPARENT) | + PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT) | + MT7530_VLAN_ACC_ALL); + + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_PORT_VLAN_MASK, + MT7530_PORT_MATRIX_MODE); } - /* Enable consistent egress tag */ - mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK, - PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); } /* Setup VLAN ID 0 for VLAN-unaware bridges */ @@ -2412,11 +2369,16 @@ mt7531_setup(struct dsa_switch *ds) /* Set default PVID to 0 on all user ports */ mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK, G0_PORT_VID_DEF); - } - /* Enable consistent egress tag */ - mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK, - PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); + mt7530_rmw(priv, MT7530_PVC_P(i), + VLAN_ATTR_MASK | PVC_EG_TAG_MASK | ACC_FRM_MASK, + VLAN_ATTR(MT7530_VLAN_TRANSPARENT) | + PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT) | + MT7530_VLAN_ACC_ALL); + + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_PORT_VLAN_MASK, + MT7530_PORT_MATRIX_MODE); + } } /* Setup VLAN ID 0 for VLAN-unaware bridges */