From patchwork Mon Feb 13 21:56:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 13139139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D0B1C6379F for ; Mon, 13 Feb 2023 21:56:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230423AbjBMV4k (ORCPT ); Mon, 13 Feb 2023 16:56:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229758AbjBMV4i (ORCPT ); Mon, 13 Feb 2023 16:56:38 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D25E21554D; Mon, 13 Feb 2023 13:56:37 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 31DIdPTJ021556; Mon, 13 Feb 2023 21:56:26 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=pDTcpTeWPev6cUNmcV+4aUzqUg+ek/XCm+YNM9S8XNI=; b=ZNDyr5606AC3h90R9kzgAe3IebFeb7PMCtz+8y5/gCdBhHZ+0fbiGgsTQkqWXW4GMNlL u2SJdzuqQkfbeetLLP2UGQIctkd2u0Ia5yUzYY8eHuPrFGCBxM/86vmhBYAArqUbLO/Y 9Os5kqo78qU2ZuBPw6PfK+ALr4F0lZ0LAghmK96yMLe7toplR8Y8eeVG/EqEYnUPLA6B Qjg7OaK1s0csNvwRZ3rk26T6QclpK+6WosguhJ19k0nahZkTsxDv4EE2bJTOgE4+/Kvx ZlycmrPLErG05c54SXxGbWKJVmQuw8DFveEurodsaWlcdHPllIAiCD8Cl0qEwSCLfMDl VA== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3nqpmmgyyp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 13 Feb 2023 21:56:26 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 31DLuPH9010868 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 13 Feb 2023 21:56:25 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 13 Feb 2023 13:56:25 -0800 From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Konrad Dybcio CC: Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon , , , , Subject: [PATCH v4 1/4] arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks Date: Mon, 13 Feb 2023 13:56:16 -0800 Message-ID: <20230213215619.1362566-2-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230213215619.1362566-1-quic_bjorande@quicinc.com> References: <20230213215619.1362566-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ux8s88d8wvudBwTuzV4kDN5GFMyNYQeb X-Proofpoint-GUID: ux8s88d8wvudBwTuzV4kDN5GFMyNYQeb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-13_12,2023-02-13_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 suspectscore=0 adultscore=0 impostorscore=0 bulkscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302130190 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bjorn Andersson Add the two DisplayPort controllers that are attached to QMP phys for providing display output on USB Type-C. Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Signed-off-by: Bjorn Andersson --- Changes since v3: - None arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 172 ++++++++++++++++++++++++- 1 file changed, 168 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 52172f79f2f2..92d5b5e21e50 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3155,6 +3155,20 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + mdss0_intf0_out: endpoint { + remote-endpoint = <&mdss0_dp0_in>; + }; + }; + + port@4 { + reg = <4>; + mdss0_intf4_out: endpoint { + remote-endpoint = <&mdss0_dp1_in>; + }; + }; + port@5 { reg = <5>; mdss0_intf5_out: endpoint { @@ -3199,6 +3213,156 @@ opp-600000000 { }; }; + mdss0_dp0: displayport-controller@ae90000 { + compatible = "qcom,sc8280xp-dp"; + reg = <0 0xae90000 0 0x200>, + <0 0xae90200 0 0x200>, + <0 0xae90400 0 0x600>, + <0 0xae91000 0 0x400>, + <0 0xae91400 0 0x400>; + interrupt-parent = <&mdss0>; + interrupts = <12>; + clocks = <&dispcc0 DISP_CC_MDSS_AHB_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX0_AUX_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>; + clock-names = "core_iface", "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel"; + + assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, + <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>; + assigned-clock-parents = <&usb_0_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys = <&usb_0_qmpphy QMP_USB43DP_DP_PHY>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + operating-points-v2 = <&mdss0_dp0_opp_table>; + power-domains = <&rpmhpd SC8280XP_CX>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss0_dp0_in: endpoint { + remote-endpoint = <&mdss0_intf0_out>; + }; + }; + + port@1 { + reg = <1>; + }; + }; + + mdss0_dp0_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + + mdss0_dp1: displayport-controller@ae98000 { + compatible = "qcom,sc8280xp-dp"; + reg = <0 0xae98000 0 0x200>, + <0 0xae98200 0 0x200>, + <0 0xae98400 0 0x600>, + <0 0xae99000 0 0x400>, + <0 0xae99400 0 0x400>; + interrupt-parent = <&mdss0>; + interrupts = <13>; + clocks = <&dispcc0 DISP_CC_MDSS_AHB_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX1_AUX_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>; + clock-names = "core_iface", "core_aux", + "ctrl_link", + "ctrl_link_iface", "stream_pixel"; + + assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>, + <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>; + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + operating-points-v2 = <&mdss0_dp1_opp_table>; + power-domains = <&rpmhpd SC8280XP_CX>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss0_dp1_in: endpoint { + remote-endpoint = <&mdss0_intf4_out>; + }; + }; + + port@1 { + reg = <1>; + }; + }; + + mdss0_dp1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + mdss0_dp2: displayport-controller@ae9a000 { compatible = "qcom,sc8280xp-dp"; reg = <0 0xae9a000 0 0x200>, @@ -3387,10 +3551,10 @@ dispcc0: clock-controller@af00000 { clocks = <&gcc GCC_DISP_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>, - <0>, - <0>, - <0>, - <0>, + <&usb_0_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <&mdss0_dp2_phy 0>, <&mdss0_dp2_phy 1>, <&mdss0_dp3_phy 0>, From patchwork Mon Feb 13 21:56:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 13139137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B569C636D4 for ; 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Mon, 13 Feb 2023 13:56:25 -0800 From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Konrad Dybcio CC: Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon , , , , Subject: [PATCH v4 2/4] arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink Date: Mon, 13 Feb 2023 13:56:17 -0800 Message-ID: <20230213215619.1362566-3-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230213215619.1362566-1-quic_bjorande@quicinc.com> References: <20230213215619.1362566-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Fv-7CoG2cy0VWemX0e7hUu9oDD1UftVN X-Proofpoint-GUID: Fv-7CoG2cy0VWemX0e7hUu9oDD1UftVN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-13_12,2023-02-13_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 impostorscore=0 adultscore=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302130190 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bjorn Andersson The SC8280XP CRD control over battery management and its two USB Type-C port using pmic_glink and two GPIO-based SBU muxes. Enable the two DisplayPort instances, GPIO SBU mux instance and pmic_glink with the two connectors on the CRD. Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Signed-off-by: Bjorn Andersson --- Changes since v3: - Moved data-lanes into dp/port/endpoint - Moved dp/port/endpoint definition to sc8280xp.dtsi, and reference by label - to avoid repeating structure in the dts arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 196 +++++++++++++++++++++- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 17 ++ 2 files changed, 211 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 2179c06b4e3b..98a0f1f9f01e 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -36,6 +36,84 @@ chosen { stdout-path = "serial0:115200n8"; }; + pmic-glink { + compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_con0_hs: endpoint { + remote-endpoint = <&usb_0_role_switch>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_con0_ss: endpoint { + remote-endpoint = <&mdss0_dp0_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_con0_sbu: endpoint { + remote-endpoint = <&usb0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + + pmic_glink_con1_hs: endpoint { + remote-endpoint = <&usb_1_role_switch>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_con1_ss: endpoint { + remote-endpoint = <&mdss0_dp1_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_con1_sbu: endpoint { + remote-endpoint = <&usb1_sbu_mux>; + }; + }; + }; + }; + }; + vreg_edp_3p3: regulator-edp-3p3 { compatible = "regulator-fixed"; @@ -139,6 +217,46 @@ linux,cma { linux,cma-default; }; }; + + usb0-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb0_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb0_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con0_sbu>; + }; + }; + }; + + usb1-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb1_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb1_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con1_sbu>; + }; + }; + }; }; &apps_rsc { @@ -262,6 +380,24 @@ &mdss0 { status = "okay"; }; +&mdss0_dp0 { + status = "okay"; +}; + +&mdss0_dp0_out { + data-lanes = <0 1>; + remote-endpoint = <&pmic_glink_con0_ss>; +}; + +&mdss0_dp1 { + status = "okay"; +}; + +&mdss0_dp1_out { + data-lanes = <0 1>; + remote-endpoint = <&pmic_glink_con1_ss>; +}; + &mdss0_dp3 { compatible = "qcom,sc8280xp-edp"; /delete-property/ #sound-dai-cells; @@ -480,7 +616,6 @@ &usb_0 { }; &usb_0_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; }; @@ -499,12 +634,15 @@ &usb_0_qmpphy { status = "okay"; }; +&usb_0_role_switch { + remote-endpoint = <&pmic_glink_con0_hs>; +}; + &usb_1 { status = "okay"; }; &usb_1_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; }; @@ -523,6 +661,10 @@ &usb_1_qmpphy { status = "okay"; }; +&usb_1_role_switch { + remote-endpoint = <&pmic_glink_con1_hs>; +}; + &xo_board_clk { clock-frequency = <38400000>; }; @@ -709,4 +851,54 @@ reset-n-pins { drive-strength = <16>; }; }; + + usb0_sbu_default: usb0-sbu-state { + oe-n-pins { + pins = "gpio101"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio164"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + + mode-pins { + pins = "gpio167"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + output-high; + }; + }; + + usb1_sbu_default: usb1-sbu-state { + oe-n-pins { + pins = "gpio48"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio47"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + + mode-pins { + pins = "gpio50"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + output-high; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 92d5b5e21e50..0d02599d8867 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3040,6 +3040,11 @@ usb_0_dwc3: usb@a600000 { iommus = <&apps_smmu 0x820 0x0>; phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + + port { + usb_0_role_switch: endpoint { + }; + }; }; }; @@ -3095,6 +3100,11 @@ usb_1_dwc3: usb@a800000 { iommus = <&apps_smmu 0x860 0x0>; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + + port { + usb_1_role_switch: endpoint { + }; + }; }; }; @@ -3253,6 +3263,7 @@ ports { port@0 { reg = <0>; + mdss0_dp0_in: endpoint { remote-endpoint = <&mdss0_intf0_out>; }; @@ -3260,6 +3271,9 @@ mdss0_dp0_in: endpoint { port@1 { reg = <1>; + + mdss0_dp0_out: endpoint { + }; }; }; @@ -3335,6 +3349,9 @@ mdss0_dp1_in: endpoint { port@1 { reg = <1>; + + mdss0_dp1_out: endpoint { + }; }; }; From patchwork Mon Feb 13 21:56:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 13139141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F5BFC678D4 for ; Mon, 13 Feb 2023 21:56:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230135AbjBMV4n (ORCPT ); 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Mon, 13 Feb 2023 21:56:27 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 31DLuQeK010981 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 13 Feb 2023 21:56:26 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 13 Feb 2023 13:56:26 -0800 From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Konrad Dybcio CC: Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon , , , , Subject: [PATCH v4 3/4] arm64: dts: qcom: sc8280xp-x13s: Enable external display Date: Mon, 13 Feb 2023 13:56:18 -0800 Message-ID: <20230213215619.1362566-4-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230213215619.1362566-1-quic_bjorande@quicinc.com> References: <20230213215619.1362566-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 1WHEQIEIlyxj3tWK9h8kuiK-GfWU86gC X-Proofpoint-GUID: 1WHEQIEIlyxj3tWK9h8kuiK-GfWU86gC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-13_12,2023-02-13_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 impostorscore=0 clxscore=1015 adultscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 mlxscore=0 spamscore=0 mlxlogscore=999 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302130190 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Like on the CRD, add the necessary nodes to enable USB Type-C altmode-based external display on the Lenovo ThinkPad X13s. Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson --- Changes since v3: - Moved data-lanes into dp/port/endpoint - Moved dp/port/endpoint definition to sc8280xp.dtsi, and reference by label - to avoid repeating structure in the dts .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 180 +++++++++++++++++- 1 file changed, 178 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 654b6b310bc9..98e71b933437 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -77,6 +77,84 @@ switch-lid { }; }; + pmic-glink { + compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_con0_hs: endpoint { + remote-endpoint = <&usb_0_role_switch>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_con0_ss: endpoint { + remote-endpoint = <&mdss0_dp0_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_con0_sbu: endpoint { + remote-endpoint = <&usb0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + + pmic_glink_con1_hs: endpoint { + remote-endpoint = <&usb_1_role_switch>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_con1_ss: endpoint { + remote-endpoint = <&mdss0_dp1_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_con1_sbu: endpoint { + remote-endpoint = <&usb1_sbu_mux>; + }; + }; + }; + }; + }; + vreg_edp_3p3: regulator-edp-3p3 { compatible = "regulator-fixed"; @@ -238,6 +316,46 @@ map1 { }; }; }; + + usb0-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb0_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb0_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con0_sbu>; + }; + }; + }; + + usb1-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb1_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb1_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con1_sbu>; + }; + }; + }; }; &apps_rsc { @@ -377,6 +495,24 @@ &mdss0 { status = "okay"; }; +&mdss0_dp0 { + status = "okay"; +}; + +&mdss0_dp0_out { + data-lanes = <0 1>; + remote-endpoint = <&pmic_glink_con0_ss>; +}; + +&mdss0_dp1 { + status = "okay"; +}; + +&mdss0_dp1_out { + data-lanes = <0 1>; + remote-endpoint = <&pmic_glink_con1_ss>; +}; + &mdss0_dp3 { compatible = "qcom,sc8280xp-edp"; @@ -871,7 +1007,6 @@ &usb_0 { }; &usb_0_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; }; @@ -890,12 +1025,15 @@ &usb_0_qmpphy { status = "okay"; }; +&usb_0_role_switch { + remote-endpoint = <&pmic_glink_con0_hs>; +}; + &usb_1 { status = "okay"; }; &usb_1_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; }; @@ -914,6 +1052,10 @@ &usb_1_qmpphy { status = "okay"; }; +&usb_1_role_switch { + remote-endpoint = <&pmic_glink_con1_hs>; +}; + &vamacro { pinctrl-0 = <&dmic01_default>, <&dmic02_default>; pinctrl-names = "default"; @@ -1147,6 +1289,40 @@ reset-n-pins { }; }; + usb0_sbu_default: usb0-sbu-state { + oe-n-pins { + pins = "gpio101"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio164"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + }; + + usb1_sbu_default: usb1-sbu-state { + oe-n-pins { + pins = "gpio48"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio47"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + }; + wcd_default: wcd-default-state { reset-pins { pins = "gpio106"; From patchwork Mon Feb 13 21:56:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 13139140 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47C8EC636CC for ; Mon, 13 Feb 2023 21:56:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231225AbjBMV4m (ORCPT ); Mon, 13 Feb 2023 16:56:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44388 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231209AbjBMV4k (ORCPT ); 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Mon, 13 Feb 2023 21:56:27 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 31DLuQkc022719 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 13 Feb 2023 21:56:26 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 13 Feb 2023 13:56:26 -0800 From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Konrad Dybcio CC: Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon , , , , Subject: [PATCH v4 4/4] arm64: defconfig: Enable DisplayPort on SC8280XP laptops Date: Mon, 13 Feb 2023 13:56:19 -0800 Message-ID: <20230213215619.1362566-5-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230213215619.1362566-1-quic_bjorande@quicinc.com> References: <20230213215619.1362566-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 1ts-WEmtA2oeC3l6l-kMAyqmnSky5Bmh X-Proofpoint-ORIG-GUID: 1ts-WEmtA2oeC3l6l-kMAyqmnSky5Bmh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-13_12,2023-02-13_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 malwarescore=0 mlxlogscore=849 phishscore=0 lowpriorityscore=0 bulkscore=0 mlxscore=0 adultscore=0 impostorscore=0 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302130190 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The QCOM_PMIC_GLINK implements the parts of a TCPM necessary for negotiating DP altmode and the TYPEC_MUX_GPIO_SBU driver is used for controlling connection and orientation switching of the SBU lanes in the USB-C connector Enable these to enable USB Type-C DisplayPort on SC8280XP laptops. Signed-off-by: Bjorn Andersson --- Changes since v3: - None arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e7e42bf79a26..df49fb15523d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -972,6 +972,7 @@ CONFIG_TYPEC_TPS6598X=m CONFIG_TYPEC_HD3SS3220=m CONFIG_TYPEC_UCSI=m CONFIG_UCSI_CCG=m +CONFIG_TYPEC_MUX_GPIO_SBU=m CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_ARMMMCI=y @@ -1208,6 +1209,7 @@ CONFIG_QCOM_CPR=y CONFIG_QCOM_GENI_SE=y CONFIG_QCOM_LLCC=m CONFIG_QCOM_OCMEM=m +CONFIG_QCOM_PMIC_GLINK=m CONFIG_QCOM_RMTFS_MEM=m CONFIG_QCOM_RPMH=y CONFIG_QCOM_RPMHPD=y