From patchwork Tue Feb 14 15:57:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 13140443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C7CAC64ED6 for ; Tue, 14 Feb 2023 15:57:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233146AbjBNP5c (ORCPT ); Tue, 14 Feb 2023 10:57:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232979AbjBNP5Z (ORCPT ); Tue, 14 Feb 2023 10:57:25 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D77B29E26 for ; Tue, 14 Feb 2023 07:57:21 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id r18so11276717wmq.5 for ; Tue, 14 Feb 2023 07:57:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KBKUFOg3aIZtzc5AANsCexRTxeA9fGhbkcwkIm+GvMw=; b=GzjrxgIcUlnIS+xbxRnaKHygDy3cpWQiWUzEnCGZ+NcM1GKjUMEF9Q60NWwZNTgDQU YI16PQ/4fM5ciNCDkTWV1SPuEsksqdO8qpNnrX7pMDz/KVVzpm/ubNyDEClIOjlBVBlc nB2YP57Obvy6HlrcAHm0/O5TLXyYRJ6RRmA8atymsIdbG0ivvAf87kALKhsuyqOuw40H AfiKpfEcpFX7C+4nwEkkEjk8XGHVnRiuDMUVe61bnDow1hUX7Fi2q+Ej4HcCd6NeSe2/ P6UA2I6N5/xawTR/NOlGRT7bQrdDAuciID7mDcmbCuGftsn3by+QtsVIClP86IwgPKXS aX8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KBKUFOg3aIZtzc5AANsCexRTxeA9fGhbkcwkIm+GvMw=; b=SKZIqyV79ELb+7I0gnyX4gY/dm7MsQD3uCleg0PLyoMC3AI59WkN8ObaFLfr2LX6lG 0l2gOO/HnRl+iMjbxJviBtJ/YVKZWk9ohInmDbHV8Xu4gvf53IdmkkBcG8mw627gAop3 tLjBag6ixiENz4qe72cePQKo+0dJVY9Lcu/hpQo//6zsZQvgFnQQeD95dOP00PEBGtCc V9j7d81Y1Yekhah3oG41XF5eARZA/YQUha7Bc5SFR27NbqBzllrRW/SkbxmFZ6beZJ6R cNVsBNUcRToz8FUCSk+NYNbxY7ffalRJhQP3ykEBJD3Upl004AVLUUjUINAf49cBPKw7 Dh8g== X-Gm-Message-State: AO0yUKXZo1WkCR8k+aqa/MmPFrifDDTsn6m/DHtike0X1vtzg3y277mD f3r5JObYvbWMSGrk9pOHFs7kgg== X-Google-Smtp-Source: AK7set8DqzIZvpNNbo4TuYiHcIs46x6Az2E8t7623RvDlEIhPG0Cnz3LzIAJlgwYz+8a4U4eNccGpQ== X-Received: by 2002:a1c:cc07:0:b0:3dc:55e6:fffd with SMTP id h7-20020a1ccc07000000b003dc55e6fffdmr2373232wmb.15.1676390238815; Tue, 14 Feb 2023 07:57:18 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:6e4b:bef:7edd:1af1]) by smtp.gmail.com with ESMTPSA id x2-20020a1c7c02000000b003df30c94850sm20451924wmc.25.2023.02.14.07.57.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 07:57:18 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 1/3] arm64: dts: qcom: sa8775p: add the i2c node for sa8775p-ride Date: Tue, 14 Feb 2023 16:57:13 +0100 Message-Id: <20230214155715.451130-2-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230214155715.451130-1-brgl@bgdev.pl> References: <20230214155715.451130-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the i2c node for the interface exposed on the sa8775p-ride board. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 19 +++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 34 +++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index 3adf7349f4e5..5fdce8279537 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -13,6 +13,7 @@ / { aliases { serial0 = &uart10; + i2c18 = &i2c18; }; chosen { @@ -20,10 +21,21 @@ chosen { }; }; +&i2c18 { + clock-frequency = <400000>; + pinctrl-0 = <&qup_i2c18_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &qupv3_id_1 { status = "okay"; }; +&qupv3_id_2 { + status = "okay"; +}; + &sleep_clk { clock-frequency = <32764>; }; @@ -33,6 +45,13 @@ qup_uart10_default: qup-uart10-state { pins = "gpio46", "gpio47"; function = "qup1_se3"; }; + + qup_i2c18_default: qup-i2c18-state { + pins = "gpio95", "gpio96"; + function = "qup2_se4"; + drive-strength = <2>; + bias-pull-up; + }; }; &uart10 { diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 565c1376073e..82582825f92a 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -491,6 +491,40 @@ &clk_virt SLAVE_QUP_CORE_1 0>, }; }; + qupv3_id_2: geniqup@8c0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x8c0000 0x0 0x6000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; + iommus = <&apps_smmu 0x5a3 0x0>; + status = "disabled"; + + i2c18: i2c@890000 { + compatible = "qcom,geni-i2c"; + reg = <0x0 0x890000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; + interconnects = <&clk_virt MASTER_QUP_CORE_2 0 + &clk_virt SLAVE_QUP_CORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_QUP_2 0>, + <&aggre2_noc MASTER_QUP_2 0 + &mc_virt SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; + power-domains = <&rpmhpd SA8775P_CX>; + status = "disabled"; + }; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ From patchwork Tue Feb 14 15:57:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 13140441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 561CCC64EC7 for ; Tue, 14 Feb 2023 15:57:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233282AbjBNP51 (ORCPT ); Tue, 14 Feb 2023 10:57:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232341AbjBNP5Z (ORCPT ); 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Tue, 14 Feb 2023 07:57:20 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 2/3] arm64: dts: qcom: sa8775p: add the SPI node for sa8775p-ride Date: Tue, 14 Feb 2023 16:57:14 +0100 Message-Id: <20230214155715.451130-3-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230214155715.451130-1-brgl@bgdev.pl> References: <20230214155715.451130-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the SPI node for the interface exposed on the sa8775p-ride board. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 14 ++++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 21 +++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index 5fdce8279537..d01ca3a9ee37 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -14,6 +14,7 @@ / { aliases { serial0 = &uart10; i2c18 = &i2c18; + spi16 = &spi16; }; chosen { @@ -40,12 +41,25 @@ &sleep_clk { clock-frequency = <32764>; }; +&spi16 { + pinctrl-0 = <&qup_spi16_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &tlmm { qup_uart10_default: qup-uart10-state { pins = "gpio46", "gpio47"; function = "qup1_se3"; }; + qup_spi16_default: qup-spi16-state { + pins = "gpio86", "gpio87", "gpio88", "gpio89"; + function = "qup2_se2"; + drive-strength = <6>; + bias-disable; + }; + qup_i2c18_default: qup-i2c18-state { pins = "gpio95", "gpio96"; function = "qup2_se4"; diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 82582825f92a..1abb545ff4f4 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -503,6 +503,27 @@ qupv3_id_2: geniqup@8c0000 { iommus = <&apps_smmu 0x5a3 0x0>; status = "disabled"; + spi16: spi@888000 { + compatible = "qcom,geni-spi"; + reg = <0x0 0x888000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; + clock-names = "se"; + interconnects = <&clk_virt MASTER_QUP_CORE_2 0 + &clk_virt SLAVE_QUP_CORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_QUP_2 0>, + <&aggre2_noc MASTER_QUP_2 0 + &mc_virt SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; + power-domains = <&rpmhpd SA8775P_CX>; + status = "disabled"; + }; + i2c18: i2c@890000 { compatible = "qcom,geni-i2c"; reg = <0x0 0x890000 0x0 0x4000>; From patchwork Tue Feb 14 15:57:15 2023 Content-Type: text/plain; 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Tue, 14 Feb 2023 07:57:22 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:6e4b:bef:7edd:1af1]) by smtp.gmail.com with ESMTPSA id x2-20020a1c7c02000000b003df30c94850sm20451924wmc.25.2023.02.14.07.57.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 07:57:21 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 3/3] arm64: dts: qcom: sa8775p: add the GNSS high-speed UART for sa8775p-ride Date: Tue, 14 Feb 2023 16:57:15 +0100 Message-Id: <20230214155715.451130-4-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230214155715.451130-1-brgl@bgdev.pl> References: <20230214155715.451130-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the serial port connected to the GNSS on sa8775p-ride. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 34 +++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 17 ++++++++++++ 2 files changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index d01ca3a9ee37..9aee6e4c1ba1 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -13,6 +13,7 @@ / { aliases { serial0 = &uart10; + serial1 = &uart17; i2c18 = &i2c18; spi16 = &spi16; }; @@ -66,6 +67,30 @@ qup_i2c18_default: qup-i2c18-state { drive-strength = <2>; bias-pull-up; }; + + qup_uart17_cts: qup-uart17-cts-state { + pins = "gpio91"; + function = "qup2_se3"; + bias-disable; + }; + + qup_uart17_rts: qup0_uart17_rts-state { + pins = "gpio92"; + function = "qup2_se3"; + bias-pull-down; + }; + + qup_uart17_tx: qup0_uart17_tx-state { + pins = "gpio93"; + function = "qup2_se3"; + bias-pull-up; + }; + + qup_uart17_rx: qup0_uart17_rx-state { + pins = "gpio94"; + function = "qup2_se3"; + bias-pull-down; + }; }; &uart10 { @@ -75,6 +100,15 @@ &uart10 { status = "okay"; }; +&uart17 { + pinctrl-0 = <&qup_uart17_cts>, + <&qup_uart17_rts>, + <&qup_uart17_tx>, + <&qup_uart17_rx>; + pinctrl-names = "default"; + status = "okay"; +}; + &xo_board_clk { clock-frequency = <38400000>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 1abb545ff4f4..b009e1100c0a 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -524,6 +524,23 @@ &config_noc SLAVE_QUP_2 0>, status = "disabled"; }; + uart17: serial@88c000 { + compatible = "qcom,geni-uart"; + reg = <0x0 0x88c000 0x0 0x4000>; + interrupts-extended = <&intc GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 94 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; + clock-names = "se"; + interconnects = <&clk_virt MASTER_QUP_CORE_2 0 + &clk_virt SLAVE_QUP_CORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_QUP_2 0>; + interconnect-names = "qup-core", + "qup-config"; + power-domains = <&rpmhpd SA8775P_CX>; + status = "disabled"; + }; + i2c18: i2c@890000 { compatible = "qcom,geni-i2c"; reg = <0x0 0x890000 0x0 0x4000>;