From patchwork Fri Feb 17 12:41:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13144651 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D042DC6379F for ; Fri, 17 Feb 2023 12:43:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tZKStWmZn/+V4yOO/ECUr4zUsx9+sLfIUmA2Xi6jkzQ=; b=K8D4MpfyEV/vzw iyAGYuUN/CF3rk0mXYNaKmrTqmEqMa9+ylrpfoL9zlhK+A8ePpfI7h2VkNLBTU3Ki+jJ50xkJUcFn CyK/7bpZTeqQNJV4NBYvLl2uRZrkQ86CBmQYZ0FXDXF5wL74vCwhxb+PjeIkz/ecTiANVHSrHl6mA BUa9bD8m8jvX5774TjdnGiehclbndyN+SbGHwzeHw926r4W3FVP35RGAYYX7xRfwH1LhGUngbvb9n S9tECxzEo6VomV9/wdvvgrplSVIBoDNIEiDn5tNr+B1IV9Y4AYxuuCuZR9rXC0WH/mp68vkG+tnae ASIcpz2sO/3HxF7zsVhw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pT049-00E9Un-GH; Fri, 17 Feb 2023 12:42:17 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pT045-00E9TA-BS for linux-arm-kernel@lists.infradead.org; Fri, 17 Feb 2023 12:42:15 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1676637733; x=1708173733; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=h/jiWEOZsffwI+IMKkal/xKUjU/a6RIroqiEYcdfC9s=; b=iF5slHV8GVol0jPuEpZocXm53u9HEaPSs6GHJ2u0uWwjlJs1fKGHMaWH YuVXgbfkB3FSxHdkOcjWjv1zm9Bb6u0uh2XpMXcDztrfcBCaOR0+V7I4m O3cUHQa85wJRdl59ZoX4nOMR4j+ihIizlXXX9z1sNGAj/jaAjJDyMxxJ2 uy+2wcoeOvmGShZPKR3czrbIPnoiq2l9RZPjnsW3zuFHX/DJq/yVKyyH0 hWC4aWGwUsvkRnTlAMZqSlsglK1txBHd//oqiqw+S2QM7JoAaI6G6lBNH X1HfqwNxpQUJVgBRP0RE5/76e2CrAMBfrDOwZuLrokT5zc3CnoQvy9dQB Q==; X-IronPort-AV: E=Sophos;i="5.97,304,1669100400"; d="scan'208";a="137771533" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Feb 2023 05:42:11 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 17 Feb 2023 05:42:07 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Fri, 17 Feb 2023 05:42:03 -0700 From: Claudiu Beznea To: , , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 1/3] ASoC: soc-pcm: add option to start DMA after DAI Date: Fri, 17 Feb 2023 14:41:49 +0200 Message-ID: <20230217124151.236216-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230217124151.236216-1-claudiu.beznea@microchip.com> References: <20230217124151.236216-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230217_044213_476179_E6E5DC0A X-CRM114-Status: GOOD ( 14.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add option to start DMA component after DAI trigger. This is done by filling the new struct snd_soc_component_driver::start_dma_last. Signed-off-by: Claudiu Beznea --- include/sound/soc-component.h | 2 ++ sound/soc/soc-pcm.c | 27 ++++++++++++++++++++++----- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/include/sound/soc-component.h b/include/sound/soc-component.h index 3203d35bc8c1..0814ed143864 100644 --- a/include/sound/soc-component.h +++ b/include/sound/soc-component.h @@ -190,6 +190,8 @@ struct snd_soc_component_driver { bool use_dai_pcm_id; /* use DAI link PCM ID as PCM device number */ int be_pcm_base; /* base device ID for all BE PCMs */ + unsigned int start_dma_last; + #ifdef CONFIG_DEBUG_FS const char *debugfs_prefix; #endif diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index 005b179a770a..5eb056b942ce 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -1088,22 +1088,39 @@ static int soc_pcm_hw_params(struct snd_pcm_substream *substream, static int soc_pcm_trigger(struct snd_pcm_substream *substream, int cmd) { struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); - int ret = -EINVAL, _ret = 0; + struct snd_soc_component *component; + int ret = -EINVAL, _ret = 0, start_dma_last = 0, i; int rollback = 0; switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + /* Do we need to start dma last? */ + for_each_rtd_components(rtd, i, component) { + if (component->driver->start_dma_last) { + start_dma_last = 1; + break; + } + } + ret = snd_soc_link_trigger(substream, cmd, 0); if (ret < 0) goto start_err; - ret = snd_soc_pcm_component_trigger(substream, cmd, 0); - if (ret < 0) - goto start_err; + if (start_dma_last) { + ret = snd_soc_pcm_dai_trigger(substream, cmd, 0); + if (ret < 0) + goto start_err; + + ret = snd_soc_pcm_component_trigger(substream, cmd, 0); + } else { + ret = snd_soc_pcm_component_trigger(substream, cmd, 0); + if (ret < 0) + goto start_err; - ret = snd_soc_pcm_dai_trigger(substream, cmd, 0); + ret = snd_soc_pcm_dai_trigger(substream, cmd, 0); + } start_err: if (ret < 0) rollback = 1; From patchwork Fri Feb 17 12:41:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13144653 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6E831C05027 for ; Fri, 17 Feb 2023 12:43:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6gs8lHJgGtp4Xz8s3f1hS9qJ5R+6s2xfhgF7ir4ShFI=; b=xJa4QeZaiHEREo 9wIfJChlqMVw3W98sQrMKUAYgfqSSqhFiICKyskehn4dzFt7JndiwpVY/eroFI3mE82jhvc2m9af2 ra5zQIWCWbSZghqDsNloI9oxA1trVlDhTVSh+voTEflpNrCGfUHZ0g1fz4fH+a9Gq7GAlrn8SAxoN WOApl7ggi8VYGJbgrNX81UjZEVXe0ZF11eJN6GPzZWvRsfA0f5uk1WQFFTxW28pkFGeJa8JLQNYUh xuARLdL1PoBZYYAc2uejgHvt77yu63QYsHEWqYmqc95Xco9507thAZljAHurofL+/Lo7eS62wYyw7 HvNCzxUmeLsLgcaMgMPA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pT04P-00E9Z6-9c; Fri, 17 Feb 2023 12:42:33 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pT049-00E9U7-Of for linux-arm-kernel@lists.infradead.org; Fri, 17 Feb 2023 12:42:19 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1676637737; x=1708173737; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=egnooPJpNM4o/gc+8fNo8gZUG2pwChKFBH3+nnb+9yo=; b=aZZs7ebSt5L+vd/owLIiXvCeFnHynB8depBHVPJYXUG8dBw47cFC00IF qPlhva5pih7DKT2XS8XkQyMjFG1vNgoe4u7iF572C4lhxk3iNjZjExqPO D7V5mKMYCOSBp/miG8q8ODsfMn6WA7IEsfGV0k0gElOCSEzvNuZCkFTpG rRZSmDBzrZV5xJMQNKI34Y+oHfXYHZwbYhYdo+0JFl10TsrN5jgxoA62I MtUIFQgImMmOim5zG38YTRYL0Y9ERo8BCsP1WUzsZPLKN6TwwAynFZPHV AzmaJC8sxXI1JEeqh3WGyLK6b+LsxWpc82lNLIXBY+TbujLxkAS3V2fGE w==; X-IronPort-AV: E=Sophos;i="5.97,304,1669100400"; d="scan'208";a="212504683" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Feb 2023 05:42:13 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 17 Feb 2023 05:42:13 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Fri, 17 Feb 2023 05:42:08 -0700 From: Claudiu Beznea To: , , , , , , , CC: , , , , Claudiu Beznea , Krzysztof Kozlowski Subject: [PATCH v2 2/3] ASoC: dt-bindings: sama7g5-pdmc: add microchip,startup-delay-us binding Date: Fri, 17 Feb 2023 14:41:50 +0200 Message-ID: <20230217124151.236216-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230217124151.236216-1-claudiu.beznea@microchip.com> References: <20230217124151.236216-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230217_044217_845100_9C3973FA X-CRM114-Status: UNSURE ( 6.96 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add microchip,startup-delay-us binding to let PDMC users to specify startup delay. Signed-off-by: Claudiu Beznea Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml b/Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml index c4cf1e5ab84b..9b40268537cb 100644 --- a/Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml +++ b/Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml @@ -67,6 +67,12 @@ properties: maxItems: 4 uniqueItems: true + microchip,startup-delay-us: + description: | + Specifies the delay in microseconds that needs to be applied after + enabling the PDMC microphones to avoid unwanted noise due to microphones + not being ready. + required: - compatible - reg From patchwork Fri Feb 17 12:41:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13144654 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6FEEEC05027 for ; Fri, 17 Feb 2023 12:43:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=p4v7XfdJduXrnoOXkDzAN54YIOg4TZueakqmM06RJ70=; b=DSzD7PhprqgNkq gLOVIjYJFVnzhaKS4Kn5KuTKTXC4yBk4Cluxl27tK1j5qYNIf1AiC0p2dKo+Gjb4LMKfnN7qsYBgT xTpdMERbxxgn+OWlMGL2X5yqEl9sICQRYoHv50hrTR45P+TpQNqagvYHWHQq1nK8wZTzGFJeEYW+0 E3F6mPb0OPCJibEDfTGkPjOaVvDoSvnUYr9TgDZyNfIjB3J3n80H/qrQtp/cO/MJipyjmauGIZjmq sn+9PN3v7aP4XnQpMt3XyZU9TpF+1CCH5UfqvYxqKrneG6S94MrbPTVVQwtZhJbvHzmCiOeDpsQh5 YiPQRjcHDLV885wPTfXg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pT04X-00E9ak-4C; Fri, 17 Feb 2023 12:42:41 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pT04E-00E9Wf-Pr for linux-arm-kernel@lists.infradead.org; Fri, 17 Feb 2023 12:42:24 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1676637742; x=1708173742; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Nd3sj2gVnzWEhmVAYlV1QIY3H4ahpeDxvqquOqfsu+c=; b=Gm9zFX+SBWArSlx7t1pxb7jC7fBPqnPkLGaGRTQGPEqt8VKwfcTimyTT yJ8WFbtFBKGFJ2xbKYKXe+w9HaD01vNrcgSkLniiNVdCoRP8uTyLCHZju iZCxOpgmM+astwUgKDZTInEargFZHDak13JXWPONFiz1kbZjkZnm8GbWx GopDwMtivGpfGSLaoUIfQBoTmxag0MxEyh3bjN+ih1KkxQjZddND/b4Qa 3bwdnJuqLk9PgQIkWIW30lQE4xl17iU75F3rCuNOvkszCMKcxE85wZDtP JH/S4tb4YDY4CFvCJldLlsAHDc/AzFJrw9AQ9wH8+Vvgs0uizY5hERS8H Q==; X-IronPort-AV: E=Sophos;i="5.97,304,1669100400"; d="scan'208";a="201115103" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Feb 2023 05:42:19 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 17 Feb 2023 05:42:18 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Fri, 17 Feb 2023 05:42:13 -0700 From: Claudiu Beznea To: , , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 3/3] ASoC: mchp-pdmc: fix poc noise at capture startup Date: Fri, 17 Feb 2023 14:41:51 +0200 Message-ID: <20230217124151.236216-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230217124151.236216-1-claudiu.beznea@microchip.com> References: <20230217124151.236216-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230217_044222_966233_37EB9B83 X-CRM114-Status: GOOD ( 18.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Microchip PDMC IP doesn't filter microphone noises on startup. By default, it captures data received from digital microphones after the MCHP_PDMC_MR.EN bits are set. Thus when enable is set on PDMC side the digital microphones might not be ready yet and PDMC captures data from then in this time. This data captured is poc noise. To avoid this the software workaround is to the following: 1/ enable PDMC channel 2/ wait 150ms (on SAMA7G5-EK setup) 3/ execute 16 dummy reads from RHR 4/ clear interrupts 5/ enable interrupts 6/ enable DMA channel Fixes: 50291652af52 ("ASoC: atmel: mchp-pdmc: add PDMC driver") Signed-off-by: Claudiu Beznea --- Hi, Mark, If this is applied as is please add proper Depends-on tag to point to patch 1/3 commit id to ease the backporting on older kernels, if any. Thank you, Claudiu sound/soc/atmel/mchp-pdmc.c | 55 +++++++++++++++++++++++++++++++++---- 1 file changed, 50 insertions(+), 5 deletions(-) diff --git a/sound/soc/atmel/mchp-pdmc.c b/sound/soc/atmel/mchp-pdmc.c index cf4084dcbd5e..6461e2741a33 100644 --- a/sound/soc/atmel/mchp-pdmc.c +++ b/sound/soc/atmel/mchp-pdmc.c @@ -114,6 +114,7 @@ struct mchp_pdmc { struct clk *gclk; u32 pdmcen; u32 suspend_irq; + u32 startup_delay_us; int mic_no; int sinc_order; bool audio_filter_en; @@ -425,6 +426,7 @@ static const struct snd_soc_component_driver mchp_pdmc_dai_component = { .open = &mchp_pdmc_open, .close = &mchp_pdmc_close, .legacy_dai_naming = 1, + .start_dma_last = 1, }; static const unsigned int mchp_pdmc_1mic[] = {1}; @@ -632,6 +634,29 @@ static int mchp_pdmc_hw_params(struct snd_pcm_substream *substream, return 0; } +static void mchp_pdmc_noise_filter_workaround(struct mchp_pdmc *dd) +{ + u32 tmp, steps = 16; + + /* + * PDMC doesn't wait for microphones' startup time thus the acquisition + * may start before the microphones are ready leading to poc noises at + * the beginning of capture. To avoid this, we need to wait 50ms (in + * normal startup procedure) or 150 ms (worst case after resume from sleep + * states) after microphones are enabled and then clear the FIFOs (by + * reading the RHR 16 times) and possible interrupts before continuing. + * Also, for this to work the DMA needs to be started after interrupts + * are enabled. + */ + usleep_range(dd->startup_delay_us, dd->startup_delay_us + 5); + + while (steps--) + regmap_read(dd->regmap, MCHP_PDMC_RHR, &tmp); + + /* Clear interrupts. */ + regmap_read(dd->regmap, MCHP_PDMC_ISR, &tmp); +} + static int mchp_pdmc_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { @@ -644,15 +669,17 @@ static int mchp_pdmc_trigger(struct snd_pcm_substream *substream, switch (cmd) { case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_START: - /* Enable overrun and underrun error interrupts */ - regmap_write(dd->regmap, MCHP_PDMC_IER, dd->suspend_irq | - MCHP_PDMC_IR_RXOVR | MCHP_PDMC_IR_RXUDR); - dd->suspend_irq = 0; - fallthrough; case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: snd_soc_component_update_bits(cpu, MCHP_PDMC_MR, MCHP_PDMC_MR_PDMCEN_MASK, dd->pdmcen); + + mchp_pdmc_noise_filter_workaround(dd); + + /* Enable interrupts. */ + regmap_write(dd->regmap, MCHP_PDMC_IER, dd->suspend_irq | + MCHP_PDMC_IR_RXOVR | MCHP_PDMC_IR_RXUDR); + dd->suspend_irq = 0; break; case SNDRV_PCM_TRIGGER_SUSPEND: regmap_read(dd->regmap, MCHP_PDMC_IMR, &dd->suspend_irq); @@ -796,6 +823,7 @@ static bool mchp_pdmc_readable_reg(struct device *dev, unsigned int reg) case MCHP_PDMC_CFGR: case MCHP_PDMC_IMR: case MCHP_PDMC_ISR: + case MCHP_PDMC_RHR: case MCHP_PDMC_VER: return true; default: @@ -817,6 +845,17 @@ static bool mchp_pdmc_writeable_reg(struct device *dev, unsigned int reg) } } +static bool mchp_pdmc_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MCHP_PDMC_ISR: + case MCHP_PDMC_RHR: + return true; + default: + return false; + } +} + static bool mchp_pdmc_precious_reg(struct device *dev, unsigned int reg) { switch (reg) { @@ -836,6 +875,7 @@ static const struct regmap_config mchp_pdmc_regmap_config = { .readable_reg = mchp_pdmc_readable_reg, .writeable_reg = mchp_pdmc_writeable_reg, .precious_reg = mchp_pdmc_precious_reg, + .volatile_reg = mchp_pdmc_volatile_reg, .cache_type = REGCACHE_FLAT, }; @@ -918,6 +958,11 @@ static int mchp_pdmc_dt_init(struct mchp_pdmc *dd) dd->channel_mic_map[i].clk_edge = edge; } + ret = of_property_read_u32(np, "microchip,startup-delay-us", + &dd->startup_delay_us); + if (ret) + dd->startup_delay_us = 150000; + return 0; }