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[83.9.2.151]) by smtp.gmail.com with ESMTPSA id m25-20020ac24ad9000000b004cf07a0051csm262304lfp.228.2023.02.23.02.52.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 02:52:04 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 11:51:57 +0100 Subject: [PATCH v3 1/7] drm/msm/a2xx: Include perf counter reg values in XML MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v3-1-5f22163cd1df@linaro.org> References: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> In-Reply-To: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677149522; l=830; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=mzjSUO+qHIiKaLiyXFVom/GoyNVpw37b+tvLzQHI5RY=; b=Brq/xe9nTTlSzXWpTd9q4AEiAPA/i+F2rPcpTI/RHWye8OlGMO/u1xixuJxZpsRGzai7/0/FTHLf UJmGc0t/AfG08cffcQLz4JK8ezQYgkxA6VOOcAcN82FMb+GJubR7 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This is a partial merge of [1], subject to be dropped if a header update is executed. [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21480/ Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/a2xx.xml.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a2xx.xml.h b/drivers/gpu/drm/msm/adreno/a2xx.xml.h index afa6023346c4..b85fdc082bc1 100644 --- a/drivers/gpu/drm/msm/adreno/a2xx.xml.h +++ b/drivers/gpu/drm/msm/adreno/a2xx.xml.h @@ -1060,6 +1060,12 @@ enum a2xx_mh_perfcnt_select { AXI_TOTAL_READ_REQUEST_DATA_BEATS = 181, }; +enum perf_mode_cnt { + PERF_STATE_RESET = 0, + PERF_STATE_ENABLE = 1, + PERF_STATE_FREEZE = 2, +}; + enum adreno_mmu_clnt_beh { BEH_NEVR = 0, BEH_TRAN_RNG = 1, From patchwork Thu Feb 23 10:51:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13150112 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D5365C61DA4 for ; Thu, 23 Feb 2023 10:52:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 29F8D10E4AE; Thu, 23 Feb 2023 10:52:16 +0000 (UTC) Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7334410E050 for ; Thu, 23 Feb 2023 10:52:08 +0000 (UTC) Received: by mail-lf1-x133.google.com with SMTP id m7so13196668lfj.8 for ; Thu, 23 Feb 2023 02:52:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Za3E13sEZpZGy0TRJfvtiuOwvhVoLyHtf80EvRj/pZk=; b=MDFq7rd08fXsre18G6E1RTIFFlyssmJ+vfcqlTduSLfBAGaBXeUbiqS2FYeUnFxlcz xqtsu6wHR3yzgazAaEoSAJKqkJ57YROo71Zl14aE19ixcfjFQzMGFV50Vy1/z2DQVDyr WdlBgzz0BxgwxqgBKgpyDZQu8NGtXGD6YrZ5+il7oThfUPtAGqfADDnSJdpp1leUlB0R RiOldLJvkKRaZzEWYhLcbXaVYwM7pxE7Kb8fcth7iPB91UC2KdLvMuBZKhhTamILNn+Z G5DnB02Pmi6FLAiHyMVQ9Q7tE1sNtXlPF+uQPWB5JSp0bequVliG6odKHsCDWfrhW+ph JJ8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Za3E13sEZpZGy0TRJfvtiuOwvhVoLyHtf80EvRj/pZk=; b=y+4nb0JmLAbIaMfSC79sYy0r8GtNhVQYg+AkMcmKpOXHvdWI/0IhEQ/7JXpeUjZhYP QaMap2KC+MXe5381sonsbq9eI5fEaYDrSsL+B/VXMW37Q8Paz7Yxuf8olhGUMjjQl7aj 9F0ECyYIyME4V/fHYfbir96//B6K2D+ZVdcsyCfSFIo7sNniMop1LR91rxIaB9YSeVe8 tw1sLxwicLWTVhJdzw/r20G4ZzTAxbNb1HWRl3x6GzmjF6UJoLWlq/PQlHptgtE+BqFS ozGpXSiYbFBwdYdaPzlwWCbM3Vy0NwEHKTB/HpSKjURwpZC5K0Eg/2VHjMkBJGV7b2aj u6dw== X-Gm-Message-State: AO0yUKXDGQgi6jpF1j39cyFFnXTgmP0n/TKG+wgDWvl2/NwmY8kOo15i yZ2b7HUs1mkmieXKN3dUG6XORw== X-Google-Smtp-Source: AK7set+INuNTeXBO0iROBK4FB6M/NFho1ZgSth/f6jVVon+fZ6e/xF2oYOFwXv7MXdUhShIA2QVsYA== X-Received: by 2002:ac2:53b3:0:b0:4db:1e4a:74a1 with SMTP id j19-20020ac253b3000000b004db1e4a74a1mr3691416lfh.0.1677149526474; Thu, 23 Feb 2023 02:52:06 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id m25-20020ac24ad9000000b004cf07a0051csm262304lfp.228.2023.02.23.02.52.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 02:52:06 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 11:51:58 +0100 Subject: [PATCH v3 2/7] drm/msm/a2xx: Add REG_A2XX_RBBM_PM_OVERRIDE2 to XML MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v3-2-5f22163cd1df@linaro.org> References: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> In-Reply-To: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677149522; l=1718; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=rz6HoVcDmCXeKasABEEZkTNc5/V8jfFkA4B1KcOgBnk=; b=SV+lLJPnQxMiG/KFu5RTsHoCbIyFDh3U+cxdnLtWr+2iKgpzxvA+vL+isiIzxDQu0WWLaAFkiOco 5fsAxgM/ChvKgPuWKpvD2Uc6+EI07YVG76reRZTaxRAM7YZWZsqV X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This is a partial merge of [1], subject to be dropped if a header update is executed. [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21484 Suggested-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/a2xx.xml.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a2xx.xml.h b/drivers/gpu/drm/msm/adreno/a2xx.xml.h index b85fdc082bc1..fbac25f66c67 100644 --- a/drivers/gpu/drm/msm/adreno/a2xx.xml.h +++ b/drivers/gpu/drm/msm/adreno/a2xx.xml.h @@ -1313,6 +1313,18 @@ static inline uint32_t A2XX_MH_MMU_VA_RANGE_VA_BASE(uint32_t val) #define A2XX_RBBM_PM_OVERRIDE1_MH_TCROQ_SCLK_PM_OVERRIDE 0x80000000 #define REG_A2XX_RBBM_PM_OVERRIDE2 0x0000039d +#define A2XX_RBBM_PM_OVERRIDE2_PA_REG_SCLK_PM_OVERRIDE 0x00000001 +#define A2XX_RBBM_PM_OVERRIDE2_PA_PA_SCLK_PM_OVERRIDE 0x00000002 +#define A2XX_RBBM_PM_OVERRIDE2_PA_AG_SCLK_PM_OVERRIDE 0x00000004 +#define A2XX_RBBM_PM_OVERRIDE2_VGT_REG_SCLK_PM_OVERRIDE 0x00000008 +#define A2XX_RBBM_PM_OVERRIDE2_VGT_FIFOS_SCLK_PM_OVERRIDE 0x00000010 +#define A2XX_RBBM_PM_OVERRIDE2_VGT_VGT_SCLK_PM_OVERRIDE 0x00000020 +#define A2XX_RBBM_PM_OVERRIDE2_DEBUG_PERF_SCLK_PM_OVERRIDE 0x00000040 +#define A2XX_RBBM_PM_OVERRIDE2_PERM_SCLK_PM_OVERRIDE 0x00000080 +#define A2XX_RBBM_PM_OVERRIDE2_GC_GA_GMEM0_PM_OVERRIDE 0x00000100 +#define A2XX_RBBM_PM_OVERRIDE2_GC_GA_GMEM1_PM_OVERRIDE 0x00000200 +#define A2XX_RBBM_PM_OVERRIDE2_GC_GA_GMEM2_PM_OVERRIDE 0x00000400 +#define A2XX_RBBM_PM_OVERRIDE2_GC_GA_GMEM3_PM_OVERRIDE 0x00000800 #define REG_A2XX_RBBM_DEBUG_OUT 0x000003a0 From patchwork Thu Feb 23 10:51:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13150111 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5EA72C636D6 for ; Thu, 23 Feb 2023 10:52:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E7E6A10E4CF; Thu, 23 Feb 2023 10:52:14 +0000 (UTC) Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by gabe.freedesktop.org (Postfix) with ESMTPS id 67E5110E050 for ; Thu, 23 Feb 2023 10:52:09 +0000 (UTC) Received: by mail-lf1-x12a.google.com with SMTP id g17so545981lfv.4 for ; Thu, 23 Feb 2023 02:52:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=kOnarmskAJLopy40U3oKLXvwONPiZjzBhb9uGjfbEpM=; b=v6mJXgjMBuGtfrSDWhwelPVQPy3Ud+cSwx2/evKTPdSq2McQWPDRRTSbbBwaf5CVUa Pf52PM0d3kILST+/20WP0ERnplsPF6R+swwCslmoH1hrDDvvFtXCBoFy39K8UnN9TMxz kXq41D5IOYUlKtzL8yK3m3TtlG61F/dXmnTamm0m2rA+IWz2rpvpwTz+jmK7fcp2xtFU qcF54AiBnvXe7Czvj8VBl/LHxTjUeyZRZc25/b8Y+JBMUIpETQUxKzNuJYHI9lY67SPC nUXdP22icW4dJvyJ9td1/c5TTGcxNwXq0pyfElh/NPu4nyunz3ER13hHZDxNzNHnvHWz +W2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kOnarmskAJLopy40U3oKLXvwONPiZjzBhb9uGjfbEpM=; b=avyRPfwcwFNFTHE+W4gmvmKaRZWRIQZjGQaX+eONZ2ocWfGtOKsOUvrfKvDf7Mip8b E+gIZVRE8HyUSgXhBHF+8b9AfzdP8tEt/nm3a2TI1ZkA5zt1b4QAJvJbx+TzegBzz+U3 qhwZzZhkonpTNiXYmswqqxWTjPqhbDSuY1yy1cxE2IcCkN35hfBVqtiQa6sOPs1vWoa8 KILTMhBLEGU3O1x/sY0KDNL9H7Yk2D1sv/mD/bQGUD1yR6UDb7NHUYOCp05N1DCm+H+z zz6OUE8KsP9gwXuoQpwFHaW+6S+2rdcHB0wikrufuJO2z2jb6CWWo+sLPLFaf6bw7AzM 8hqQ== X-Gm-Message-State: AO0yUKW8Dcy0mQdQWZGtbciJF2oMI8QtUR+3hKWHmKAdiEcstpEbM9aq 75azN7BFjTdpyQRs4NrXH8vXiw== X-Google-Smtp-Source: AK7set+Ll6LguG7fwI+ZW1MKrmT0txqLk0/wruezIlzF3Nb5y2FtSmtqTMkvKl3ULG0p0w7fygQDvQ== X-Received: by 2002:ac2:5df1:0:b0:4db:1bee:c with SMTP id z17-20020ac25df1000000b004db1bee000cmr3797826lfq.44.1677149527659; Thu, 23 Feb 2023 02:52:07 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id m25-20020ac24ad9000000b004cf07a0051csm262304lfp.228.2023.02.23.02.52.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 02:52:07 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 11:51:59 +0100 Subject: [PATCH v3 3/7] drm/msm/adreno: Use OPP for every GPU generation MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v3-3-5f22163cd1df@linaro.org> References: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> In-Reply-To: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677149522; l=6284; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=glYRGSAYYXQFh91qm5j1elUuZYdypRgrsNPyka/F8vE=; b=aNk/6sMX10joDOfNNA+zMQRVgVNP1GQlVvN6+WTjJArXs6Mfezf/axeXVsw/hubjtzdfeQUk1CiW 5U+fuMvaA3Ke1TyL+vpAeDKopiEgfvO0Rk1oXpIN8/6EVjfjMp2L X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Some older GPUs (namely a2xx with no opp tables at all and a320 with downstream-remnants gpu pwrlevels) used not to have OPP tables. They both however had just one frequency defined, making it extremely easy to construct such an OPP table from within the driver if need be. Do so and switch all clk_set_rate calls on core_clk to their OPP counterparts. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 99 +++++++++++++++------------------ drivers/gpu/drm/msm/msm_gpu.c | 4 +- drivers/gpu/drm/msm/msm_gpu_devfreq.c | 2 +- 3 files changed, 47 insertions(+), 58 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index ce6b76c45b6f..d12f2f314022 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -922,73 +922,46 @@ void adreno_wait_ring(struct msm_ringbuffer *ring, uint32_t ndwords) ring->id); } -/* Get legacy powerlevels from qcom,gpu-pwrlevels and populate the opp table */ -static int adreno_get_legacy_pwrlevels(struct device *dev) -{ - struct device_node *child, *node; - int ret; - - node = of_get_compatible_child(dev->of_node, "qcom,gpu-pwrlevels"); - if (!node) { - DRM_DEV_DEBUG(dev, "Could not find the GPU powerlevels\n"); - return -ENXIO; - } - - for_each_child_of_node(node, child) { - unsigned int val; - - ret = of_property_read_u32(child, "qcom,gpu-freq", &val); - if (ret) - continue; - - /* - * Skip the intentionally bogus clock value found at the bottom - * of most legacy frequency tables - */ - if (val != 27000000) - dev_pm_opp_add(dev, val, 0); - } - - of_node_put(node); - - return 0; -} - -static void adreno_get_pwrlevels(struct device *dev, +static int adreno_get_pwrlevels(struct device *dev, struct msm_gpu *gpu) { + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); unsigned long freq = ULONG_MAX; struct dev_pm_opp *opp; int ret; gpu->fast_rate = 0; - /* You down with OPP? */ - if (!of_find_property(dev->of_node, "operating-points-v2", NULL)) - ret = adreno_get_legacy_pwrlevels(dev); - else { - ret = devm_pm_opp_of_add_table(dev); - if (ret) - DRM_DEV_ERROR(dev, "Unable to set the OPP table\n"); - } - - if (!ret) { - /* Find the fastest defined rate */ - opp = dev_pm_opp_find_freq_floor(dev, &freq); - if (!IS_ERR(opp)) { - gpu->fast_rate = freq; - dev_pm_opp_put(opp); + /* devm_pm_opp_of_add_table may error out but will still create an OPP table */ + ret = devm_pm_opp_of_add_table(dev); + if (ret == -ENODEV) { + /* Special cases for ancient hw with ancient DT bindings */ + if (adreno_is_a2xx(adreno_gpu)) { + dev_warn(dev, "Unable to find the OPP table. Falling back to 200 MHz.\n"); + dev_pm_opp_add(dev, 200000000, 0); + } else if (adreno_is_a320(adreno_gpu)) { + dev_warn(dev, "Unable to find the OPP table. Falling back to 450 MHz.\n"); + dev_pm_opp_add(dev, 450000000, 0); + } else { + DRM_DEV_ERROR(dev, "Unable to find the OPP table\n"); + return -ENODEV; } + } else if (ret) { + DRM_DEV_ERROR(dev, "Unable to set the OPP table\n"); + return ret; } - if (!gpu->fast_rate) { - dev_warn(dev, - "Could not find a clock rate. Using a reasonable default\n"); - /* Pick a suitably safe clock speed for any target */ - gpu->fast_rate = 200000000; - } + /* Find the fastest defined rate */ + opp = dev_pm_opp_find_freq_floor(dev, &freq); + if (IS_ERR(opp)) + return PTR_ERR(opp); + + gpu->fast_rate = freq; + dev_pm_opp_put(opp); DBG("fast_rate=%u, slow_rate=27000000", gpu->fast_rate); + + return 0; } int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu, @@ -1046,6 +1019,20 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, struct adreno_rev *rev = &config->rev; const char *gpu_name; u32 speedbin; + int ret; + + /* + * This can only be done before devm_pm_opp_of_add_table(), or + * dev_pm_opp_set_config() will WARN_ON() + */ + if (IS_ERR(devm_clk_get(dev, "core"))) { + /* + * If "core" is absent, go for the legacy clock name. + * If we got this far in probing, it's a given one of them exists. + */ + devm_pm_opp_set_clkname(dev, "core_clk"); + } else + devm_pm_opp_set_clkname(dev, "core"); adreno_gpu->funcs = funcs; adreno_gpu->info = adreno_info(config->rev); @@ -1070,7 +1057,9 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, adreno_gpu_config.nr_rings = nr_rings; - adreno_get_pwrlevels(dev, gpu); + ret = adreno_get_pwrlevels(dev, gpu); + if (ret) + return ret; pm_runtime_set_autosuspend_delay(dev, adreno_gpu->info->inactive_period); diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 380249500325..cdcb00df3f25 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -59,7 +59,7 @@ static int disable_pwrrail(struct msm_gpu *gpu) static int enable_clk(struct msm_gpu *gpu) { if (gpu->core_clk && gpu->fast_rate) - clk_set_rate(gpu->core_clk, gpu->fast_rate); + dev_pm_opp_set_rate(&gpu->pdev->dev, gpu->fast_rate); /* Set the RBBM timer rate to 19.2Mhz */ if (gpu->rbbmtimer_clk) @@ -78,7 +78,7 @@ static int disable_clk(struct msm_gpu *gpu) * will be rounded down to zero anyway so it all works out. */ if (gpu->core_clk) - clk_set_rate(gpu->core_clk, 27000000); + dev_pm_opp_set_rate(&gpu->pdev->dev, 27000000); if (gpu->rbbmtimer_clk) clk_set_rate(gpu->rbbmtimer_clk, 0); diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c b/drivers/gpu/drm/msm/msm_gpu_devfreq.c index e27dbf12b5e8..ea70c1c32d94 100644 --- a/drivers/gpu/drm/msm/msm_gpu_devfreq.c +++ b/drivers/gpu/drm/msm/msm_gpu_devfreq.c @@ -48,7 +48,7 @@ static int msm_devfreq_target(struct device *dev, unsigned long *freq, gpu->funcs->gpu_set_freq(gpu, opp, df->suspended); mutex_unlock(&df->lock); } else { - clk_set_rate(gpu->core_clk, *freq); + dev_pm_opp_set_rate(dev, *freq); } dev_pm_opp_put(opp); From patchwork Thu Feb 23 10:52:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13150113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BFB43C636D6 for ; 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[83.9.2.151]) by smtp.gmail.com with ESMTPSA id m25-20020ac24ad9000000b004cf07a0051csm262304lfp.228.2023.02.23.02.52.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 02:52:08 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 11:52:00 +0100 Subject: [PATCH v3 4/7] drm/msm/a2xx: Implement .gpu_busy MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v3-4-5f22163cd1df@linaro.org> References: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> In-Reply-To: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677149522; l=2182; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=M4GtniFH7Z74oP+C1wfVcdO+1YLmUE+S93nPkBb/ZUE=; b=A2D3TmwvTtxWv0uaGt4JkpWCn10VLe5vtr+8DwgiZJRVaOxktLKqoQFk0HZPITd+ExjXUz1QU95S 18RI7cwQD1ckEytf8zZPcel2UNNBKTsg0CC4mdBmGnGNEy0o5Nak X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Implement gpu_busy based on the downstream msm-3.4 code [1]. This allows us to use devfreq on this old old old hardware! [1] https://github.com/LineageOS/android_kernel_sony_apq8064/blob/lineage-16.0/drivers/gpu/msm/adreno_a2xx.c#L1975 Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c index c67089a7ebc1..104bdf28cdaf 100644 --- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c @@ -481,6 +481,31 @@ a2xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev) return aspace; } +/* While the precise size of this field is unknown, it holds at least these three values.. */ +static u64 a2xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate) +{ + u64 busy_cycles; + + /* Freeze the counter */ + gpu_write(gpu, REG_A2XX_CP_PERFMON_CNTL, PERF_STATE_FREEZE); + + busy_cycles = gpu_read64(gpu, REG_A2XX_RBBM_PERFCOUNTER1_LO); + + /* Reset the counter */ + gpu_write(gpu, REG_A2XX_CP_PERFMON_CNTL, PERF_STATE_RESET); + + /* Re-enable the performance monitors */ + gpu_rmw(gpu, REG_A2XX_RBBM_PM_OVERRIDE2, + A2XX_RBBM_PM_OVERRIDE2_DEBUG_PERF_SCLK_PM_OVERRIDE, + A2XX_RBBM_PM_OVERRIDE2_DEBUG_PERF_SCLK_PM_OVERRIDE); + gpu_write(gpu, REG_A2XX_RBBM_PERFCOUNTER1_SELECT, 1); + gpu_write(gpu, REG_A2XX_CP_PERFMON_CNTL, PERF_STATE_ENABLE); + + *out_sample_rate = clk_get_rate(gpu->core_clk); + + return busy_cycles; +} + static u32 a2xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) { ring->memptrs->rptr = gpu_read(gpu, REG_AXXX_CP_RB_RPTR); @@ -502,6 +527,7 @@ static const struct adreno_gpu_funcs funcs = { #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) .show = adreno_show, #endif + .gpu_busy = a2xx_gpu_busy, .gpu_state_get = a2xx_gpu_state_get, .gpu_state_put = adreno_gpu_state_put, .create_address_space = a2xx_create_address_space, From patchwork Thu Feb 23 10:52:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13150110 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D429EC64ED8 for ; Thu, 23 Feb 2023 10:52:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C40EC10E07D; Thu, 23 Feb 2023 10:52:13 +0000 (UTC) Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by gabe.freedesktop.org (Postfix) with ESMTPS id 360C210E07D for ; Thu, 23 Feb 2023 10:52:12 +0000 (UTC) Received: by mail-lf1-x129.google.com with SMTP id f18so13283025lfa.3 for ; Thu, 23 Feb 2023 02:52:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4RozdFg8UcjNGaMEUfY94uV2Q1ptXwQxOYUwNdKHWzQ=; b=GGxvm6blqyc89yQk58xauwymRokHUWjtnfkAy0M5C/kAVwDVTzl5V5K3cPOqw/6Wz2 I+SFohN/OEwGh2D1YA9QotnOOOtXEozSgwQ5LYVWUzsf1+Ad3VGPeDwANoTmFyPhHz+L h1EFNvVz2N4El2qWdqCvQZ4Nx1n+SU+VA5embliA1uijST9wNBP992di58UohE6MNHH2 hUPJKKiB+MaldLPl1+y9bvMNtzP0SfmJIyrULtEccFk0uapq+TSBo9VtVbCE0hsLro9Z 6TJ2P83GdNGwPWEEBFqffGr2lN1qOMiyW8o46ZsEr+MdVSbwgIWoMW+sQ4exqOCKF9k0 WmQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4RozdFg8UcjNGaMEUfY94uV2Q1ptXwQxOYUwNdKHWzQ=; b=jI7oxfUiNtr1MBm3npiicH2RNY/9lPX+kyd2V/BVjbpFNMJJkhb7Jmkn6KhxHmzumZ v1u89sLzpRueMlG2mIsnErA0I3/CGOjmHP0iGJdxpygZZFbYSDBDAGxCOkhSDsiHx/Kc +6IDo8/V2MTrNBxq5zXQ573r7KpnFKU123aU9TgS2j6d33vxGqtUDBZCgnAXyPc8GmO/ yeSHdQY+sJG2SD5BLx6ZXnzl1oaFwdYxvWSkt6PwPwKViZ2KiuUyXnXD5PknmHfv6zCb 5E0Y4bS06FErDFzsqCLFt32Ui/4xChV2ypaDmix7H/1874e85ToCY3m13EhQdLq+CJ/l wnSQ== X-Gm-Message-State: AO0yUKVnC3ClCKwFWJ1GWjvT65wKR0zG6c9bxL57x2p5BWm2ZNPJp+xq U6FA8GAs+2KZy9I4Tm7pQRfsvQ== X-Google-Smtp-Source: AK7set9jmvh+j4JyveYHT6/2X0EcNAwdK8aOAIJtzI8kddXy/qZK/hV40KXfjYqRZm5s7DJ2H2eGEA== X-Received: by 2002:a05:6512:7b:b0:4dd:a053:3c0b with SMTP id i27-20020a056512007b00b004dda0533c0bmr992258lfo.42.1677149530231; Thu, 23 Feb 2023 02:52:10 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id m25-20020ac24ad9000000b004cf07a0051csm262304lfp.228.2023.02.23.02.52.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 02:52:09 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 11:52:01 +0100 Subject: [PATCH v3 5/7] drm/msm/a3xx: Implement .gpu_busy MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v3-5-5f22163cd1df@linaro.org> References: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> In-Reply-To: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677149522; l=1452; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=sAA92dCqoQlGesDQKUB68UAlcg2YIqQbh8UmjiEN524=; b=2jM+T/p9ilIYyJLFdFVnqDFZlEMAxUjw5IY/bXTDdO3ddLKvpMDcoDN5is+J8/ZT0+M8fbi/up0Z PVqxIs+gC4KVk5kRrpXOogK84F17HfLU9lulIvcI7CWczCEmjCw6 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for gpu_busy on a3xx, which is required for devfreq support. Tested-by: Dmitry Baryshkov #ifc6410 Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c index 948785ed07bb..c86b377f6f0d 100644 --- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c @@ -477,6 +477,16 @@ static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu) return state; } +static u64 a3xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate) +{ + u64 busy_cycles; + + busy_cycles = gpu_read64(gpu, REG_A3XX_RBBM_PERFCTR_RBBM_1_LO); + *out_sample_rate = clk_get_rate(gpu->core_clk); + + return busy_cycles; +} + static u32 a3xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) { ring->memptrs->rptr = gpu_read(gpu, REG_AXXX_CP_RB_RPTR); @@ -498,6 +508,7 @@ static const struct adreno_gpu_funcs funcs = { #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) .show = adreno_show, #endif + .gpu_busy = a3xx_gpu_busy, .gpu_state_get = a3xx_gpu_state_get, .gpu_state_put = adreno_gpu_state_put, .create_address_space = adreno_create_address_space, From patchwork Thu Feb 23 10:52:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13150114 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5393BC61DA4 for ; Thu, 23 Feb 2023 10:52:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 893D110E054; Thu, 23 Feb 2023 10:52:19 +0000 (UTC) Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by gabe.freedesktop.org (Postfix) with ESMTPS id 655BE10E4AE for ; Thu, 23 Feb 2023 10:52:13 +0000 (UTC) Received: by mail-lf1-x12c.google.com with SMTP id f18so13283073lfa.3 for ; Thu, 23 Feb 2023 02:52:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GGhJ8k8BvYcG4UvdUcw3fi971zbE82bjXqWQD3F+nXY=; b=nwnpdMI6fiACcnT6sDMZQnAaSHlzmaHJezhHhQQ2bSHQ4B4nl5tbH6A2q3diS3eX/m oG1jc6/dNoQHwRXZw0DrEoB0m4SAFkNi7i8gxOoyMKFs48ccXDkGqWjMY2xGxB8ifX5t B6iYN9uQKAzTk9XnEhjkO+lNnCUN93bTZChJ8C7iRl/LQ4O8cLRdYVZf1EK4bNBsG0r/ uR1TapxsbvlbBPaZD3CFeZWeIOJS6UqAH8A46G8oR/07ZrKAX3fxJRuj36RH3IG1kAme FyV3JUTbVVAhBECLWUIt5xKVpMSSY9EV57xo0g19GpFRJi6QGZ7VUbONhKiI9+stFIct Zy7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GGhJ8k8BvYcG4UvdUcw3fi971zbE82bjXqWQD3F+nXY=; b=L0/mH/lIcqqxi5JavG8mBU3ryT/oJbbNm5X2iGyw/47I/UoDolGc24waTqF4D7z6qP AkOnKthquAIbKFSNkc7utiHocmhV/7RDXLoOPmSmM0bJNnF1KdaW5jorXzvnelkzwdnN Qgd9DQiuYe+vKbqPmfke5j7zphTSrsGOy0W/VAbnIOOv3xK1xB+4Yzlnn/DnfxRRTJFx 0uHcL8eQH6XXRjuCzDBO/wWBqeuk/R+fg/HIM8+Y35JLrv5YbNIYUpa57S20mTYdZh/E VOhUq2OogexMN3IxQf3gnc7ctzE7fraFJoGWe4KBxFPdXSs19lpWXLF29f48xH7c9EPB zXYQ== X-Gm-Message-State: AO0yUKVgkNmWfXjr9kTeKlslE8FvdlhKW0vFBreuHszzMWc7e0wNa89v ERSGq7ho40NmdKMcnyyB+bGEBw== X-Google-Smtp-Source: AK7set/elyparV9oVKEeDJbSsKTik5j9hneZPxyOqkZSoXL1ZHolnyYLAlfuh92Bkn/hZ2QMW/HkaQ== X-Received: by 2002:ac2:5ddc:0:b0:4b5:b7c3:8053 with SMTP id x28-20020ac25ddc000000b004b5b7c38053mr3513220lfq.42.1677149531482; Thu, 23 Feb 2023 02:52:11 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id m25-20020ac24ad9000000b004cf07a0051csm262304lfp.228.2023.02.23.02.52.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 02:52:11 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 11:52:02 +0100 Subject: [PATCH v3 6/7] drm/msm/a4xx: Implement .gpu_busy MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v3-6-5f22163cd1df@linaro.org> References: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> In-Reply-To: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677149522; l=1379; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Mfqjq6oPzn0mWycAv8UA9lcR+KDEDYvYmMvB7YZF6m4=; b=v+TXzHtZ4KeibeJvtAtSVkVKGunOe6Iu1g5H+gnK2w1JBEKFvxZTmXGxVramXBPr/Tj8NsK8Bi9k LEPBJc3jCmmBpymLrHmo0iWWUGGZz0RaGGJMjVYruwZq+Rrbi8gn X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for gpu_busy on a4xx, which is required for devfreq support. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c index 3e09d3a7a0ac..715436cb3996 100644 --- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c @@ -611,6 +611,16 @@ static int a4xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) return 0; } +static u64 a4xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate) +{ + u64 busy_cycles; + + busy_cycles = gpu_read64(gpu, REG_A4XX_RBBM_PERFCTR_RBBM_1_LO); + *out_sample_rate = clk_get_rate(gpu->core_clk); + + return busy_cycles; +} + static u32 a4xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) { ring->memptrs->rptr = gpu_read(gpu, REG_A4XX_CP_RB_RPTR); @@ -632,6 +642,7 @@ static const struct adreno_gpu_funcs funcs = { #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) .show = adreno_show, #endif + .gpu_busy = a4xx_gpu_busy, .gpu_state_get = a4xx_gpu_state_get, .gpu_state_put = adreno_gpu_state_put, .create_address_space = adreno_create_address_space, From patchwork Thu Feb 23 10:52:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13150116 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 647C6C636D6 for ; Thu, 23 Feb 2023 10:52:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 959BB10EB07; Thu, 23 Feb 2023 10:52:40 +0000 (UTC) Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8092510E4AE for ; Thu, 23 Feb 2023 10:52:14 +0000 (UTC) Received: by mail-lf1-x135.google.com with SMTP id bp25so13421927lfb.0 for ; Thu, 23 Feb 2023 02:52:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=312OV1ExLaf1docfwSJg/DyYHuD2OoIvYCwHKB24HQI=; b=Ce/cN8SJNqmnOLGti7C/wIYSkPwOXN+WsO7YJlUi1HVGSsH4IugGMhdMSOArjMUlwz AfXqXzfVXH7StipBipyI9C3rVs/AfBEsOlpjoGUJH6oUehAIfEiVTE3C8iOSLzVu/Lym /2bcRB2hfvVFzai8oYsySHFBGqcL9QaQK0N/izI0yShx3HtY8Ngi1xEHljGpBafM+oCJ SCvH6y3c6LpK5hC/pNqwwIfaGs4EQfZlF7AyG9hek48zBPsI3xMZUy97nqProR/RqSYk lJOjp5loyoTQHXMZpg7J2h+5BR/glkMobFjQAxPjq9GGDGwqLeYNFHMwlydmAu+ROLIU iwfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=312OV1ExLaf1docfwSJg/DyYHuD2OoIvYCwHKB24HQI=; b=W6XJFrJm+Su21RkalEJkPWHnhPoM+8i083uODdjwIi65fxQG/6Pe9TLFfvjORjC5fA uswGNZG4l2v3JVUcUbkN3+Re9K0fC+tIsOyRc12YA3ALK3LPqvdrKv+/inkKklw/Wscz Rgjh/WaYZ/c2YwzItJvph5Nol0HLj4OkOOnrRul25RgJhPYMfvMS6WazsmtkJv9222kC YT4ShBSMGfWHYuy48crrIZlyz+ml/clRTe6ljYASulIMdWHJSI2GfsvFFJc2b5Kv+cpE sBXAZpSJ8wIL+TF6CzKPjBQHYI76I5fkkmy1d4wYHt/WNJJqQe3IR45BCa1WG2nWPc2q /ycw== X-Gm-Message-State: AO0yUKWoX6zCNpiP3GmE8LjQptt5NG5xSD0XAvnBBgUZnbIqVC3u9xaN +tOQZ3Hz4qJ5op8ZlEk9PJIuhw== X-Google-Smtp-Source: AK7set8osHC1BKuwQhKilzcKra4Qow5sccaKlgb33WRhd1YaD6tJd1VO+rXTjbpXroqZwNqtZ8dETQ== X-Received: by 2002:ac2:5225:0:b0:4dc:4bda:c26f with SMTP id i5-20020ac25225000000b004dc4bdac26fmr3063427lfl.23.1677149532652; Thu, 23 Feb 2023 02:52:12 -0800 (PST) Received: from [192.168.1.101] (abxi151.neoplus.adsl.tpnet.pl. [83.9.2.151]) by smtp.gmail.com with ESMTPSA id m25-20020ac24ad9000000b004cf07a0051csm262304lfp.228.2023.02.23.02.52.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 02:52:12 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 11:52:03 +0100 Subject: [PATCH v3 7/7] drm/msm/adreno: Enable optional icc voting from OPP tables MIME-Version: 1.0 Message-Id: <20230223-topic-opp-v3-7-5f22163cd1df@linaro.org> References: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> In-Reply-To: <20230223-topic-opp-v3-0-5f22163cd1df@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677149522; l=828; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Yh6pwT6P3XDwmr1GaQu8MRHxTbI8EpTO/tdF6ItczWk=; b=2rrRDrTtljtkMy2NiIvypriRAjz8Zl6PZhh4lLLHUrTd/4LPzZWyfiOavFuEJQnJLGhxCc/L8cSg DQgfDp28B0bz+/nmo/25V3K4pnLZVeMgAtqBwOy48QqoAzn8bDYx X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework handle bus voting as part of power level setting. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/adreno_device.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 36f062c7582f..5142a4c72cfc 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -548,6 +548,10 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) return PTR_ERR(gpu); } + ret = dev_pm_opp_of_find_icc_paths(dev, NULL); + if (ret) + return ret; + return 0; }