From patchwork Mon Feb 27 19:35:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A239C64ED6 for ; Mon, 27 Feb 2023 19:36:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 02D1E10E3D4; Mon, 27 Feb 2023 19:35:57 +0000 (UTC) Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0689089612; Mon, 27 Feb 2023 19:35:50 +0000 (UTC) Received: by mail-pl1-x62e.google.com with SMTP id z2so7885916plf.12; Mon, 27 Feb 2023 11:35:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pnCiHlTZ3XHUfR7rXNQOF8AslwfEMhVF7SVf22K+dwA=; b=I6mDs2TufiHGOpRM9erBq02iQ22+V5PWw8V9du6xB+Z0yvBkxQyMt7qnlMSEgeIO0O Qs4EWbkmc7NbNwgpoNM36W06HYMEXUolOBzcYA4PsKl9Zj4z/s2nUirhAzhKa1ISdxO6 XUdR0DPB/dsFQ+OP2wTwLdRQa+zYbOB7fAmgTF7HOFutnypvSToRj0kjQY6TklMT2otY 7xmabiC02oOcM7YCf8joTl0AyeJOLMYTIxclDdO335JDb655VLZMBfPeBFn7kcAq/7nt yFaaY/LNBD5GT6AqGZnJKyLYZFuwPzUQDmao+GOlppq4ntWVmcmNQ656Bm1M66aX7nyI qhVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pnCiHlTZ3XHUfR7rXNQOF8AslwfEMhVF7SVf22K+dwA=; b=Xkxh3ZyZpmjAkp9dgLdD6bnSK4ewJWvqElBvO8s4xAtBxSNIvRmXM22WYKQOtf8gRJ QsoC4BwF2DaNeuH5RpRvKCAUgLneYL4dshKSndvCxl/rF5sT+jtVBvqi7JTmBrou2E2H oaVnsUKuK7OkDVQF/hEKBM6RHLOha9YAOD3He1sHhoNXVWOtjrvjfTkd8C3MXs8VUJ7A 65pfDyjvFcsnOA0K1waybfmIXcjaxAWgUj7rUw96hWfcY4nrVgBOHKNPFGI9dEtL/IeJ 9dqfWaPycTvsdgkSZL+tyAMZM2mgLITX/zSsvtMDtki11bfjiWwFVv7QH08F3yDS3mDh X3kA== X-Gm-Message-State: AO0yUKVZpLJap3ynm08tY/eKOfxd/oGEtNmy0X1XhvH2P70Siox/bEyi +350WwYUu0V6Tlh+B5q0EggKTpk9XbE= X-Google-Smtp-Source: AK7set+xjcru5uMJbo51/Coda3pgTL/GPwf8cuOG/WLXI8Ek1zE0cnb0rvcHwjA9q8TU8Dl271GYcA== X-Received: by 2002:a17:902:db0b:b0:19d:f7e:9864 with SMTP id m11-20020a170902db0b00b0019d0f7e9864mr5610079plx.57.1677526550132; Mon, 27 Feb 2023 11:35:50 -0800 (PST) Received: from localhost ([2a00:79e1:abd:4a00:61b:48ed:72ab:435b]) by smtp.gmail.com with ESMTPSA id ix1-20020a170902f80100b0019ab58f47a6sm5000335plb.105.2023.02.27.11.35.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 11:35:49 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness Date: Mon, 27 Feb 2023 11:35:07 -0800 Message-Id: <20230227193535.2822389-2-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Gustavo Padovan , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , Jonathan Corbet , "open list:DOCUMENTATION" , open list , Sumit Semwal , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org, =?utf-8?q?Christian_K=C3=B6nig?= , "open list:DMA BUFFER SHARING FRAMEWORK" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Add a way to hint to the fence signaler of an upcoming deadline, such as vblank, which the fence waiter would prefer not to miss. This is to aid the fence signaler in making power management decisions, like boosting frequency as the deadline approaches and awareness of missing deadlines so that can be factored in to the frequency scaling. v2: Drop dma_fence::deadline and related logic to filter duplicate deadlines, to avoid increasing dma_fence size. The fence-context implementation will need similar logic to track deadlines of all the fences on the same timeline. [ckoenig] v3: Clarify locking wrt. set_deadline callback v4: Clarify in docs comment that this is a hint v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. v6: More docs Signed-off-by: Rob Clark Reviewed-by: Christian König Acked-by: Pekka Paalanen Reviewed-by: Bagas Sanjaya --- Documentation/driver-api/dma-buf.rst | 6 +++ drivers/dma-buf/dma-fence.c | 59 ++++++++++++++++++++++++++++ include/linux/dma-fence.h | 20 ++++++++++ 3 files changed, 85 insertions(+) diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-api/dma-buf.rst index 622b8156d212..183e480d8cea 100644 --- a/Documentation/driver-api/dma-buf.rst +++ b/Documentation/driver-api/dma-buf.rst @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations .. kernel-doc:: drivers/dma-buf/dma-fence.c :doc: fence signalling annotation +DMA Fence Deadline Hints +~~~~~~~~~~~~~~~~~~~~~~~~ + +.. kernel-doc:: drivers/dma-buf/dma-fence.c + :doc: deadline hints + DMA Fences Functions Reference ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c index 0de0482cd36e..e103e821d993 100644 --- a/drivers/dma-buf/dma-fence.c +++ b/drivers/dma-buf/dma-fence.c @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count, } EXPORT_SYMBOL(dma_fence_wait_any_timeout); +/** + * DOC: deadline hints + * + * In an ideal world, it would be possible to pipeline a workload sufficiently + * that a utilization based device frequency governor could arrive at a minimum + * frequency that meets the requirements of the use-case, in order to minimize + * power consumption. But in the real world there are many workloads which + * defy this ideal. For example, but not limited to: + * + * * Workloads that ping-pong between device and CPU, with alternating periods + * of CPU waiting for device, and device waiting on CPU. This can result in + * devfreq and cpufreq seeing idle time in their respective domains and in + * result reduce frequency. + * + * * Workloads that interact with a periodic time based deadline, such as double + * buffered GPU rendering vs vblank sync'd page flipping. In this scenario, + * missing a vblank deadline results in an *increase* in idle time on the GPU + * (since it has to wait an additional vblank period), sending a single to + * the GPU's devfreq to reduce frequency, when in fact the opposite is what is + * needed. + * + * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fence_set_deadline. + * The deadline hint provides a way for the waiting driver, or userspace, to + * convey an appropriate sense of urgency to the signaling driver. + * + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for userspace + * facing APIs). The time could either be some point in the future (such as + * the vblank based deadline for page-flipping, or the start of a compositor's + * composition cycle), or the current time to indicate an immediate deadline + * hint (Ie. forward progress cannot be made until this fence is signaled). + * + * Multiple deadlines may be set on a given fence, even in parallel. See the + * documentation for &dma_fence_ops.set_deadline. + * + * The deadline hint is just that, a hint. The driver that created the fence + * may react by increasing frequency, making different scheduling choices, etc. + * Or doing nothing at all. + */ + +/** + * dma_fence_set_deadline - set desired fence-wait deadline hint + * @fence: the fence that is to be waited on + * @deadline: the time by which the waiter hopes for the fence to be + * signaled + * + * Give the fence signaler a hint about an upcoming deadline, such as + * vblank, by which point the waiter would prefer the fence to be + * signaled by. This is intended to give feedback to the fence signaler + * to aid in power management decisions, such as boosting GPU frequency + * if a periodic vblank deadline is approaching but the fence is not + * yet signaled.. + */ +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline) +{ + if (fence->ops->set_deadline && !dma_fence_is_signaled(fence)) + fence->ops->set_deadline(fence, deadline); +} +EXPORT_SYMBOL(dma_fence_set_deadline); + /** * dma_fence_describe - Dump fence describtion into seq_file * @fence: the 6fence to describe diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h index 775cdc0b4f24..87c0d846dbb4 100644 --- a/include/linux/dma-fence.h +++ b/include/linux/dma-fence.h @@ -257,6 +257,24 @@ struct dma_fence_ops { */ void (*timeline_value_str)(struct dma_fence *fence, char *str, int size); + + /** + * @set_deadline: + * + * Callback to allow a fence waiter to inform the fence signaler of + * an upcoming deadline, such as vblank, by which point the waiter + * would prefer the fence to be signaled by. This is intended to + * give feedback to the fence signaler to aid in power management + * decisions, such as boosting GPU frequency. + * + * This is called without &dma_fence.lock held, it can be called + * multiple times and from any context. Locking is up to the callee + * if it has some state to manage. If multiple deadlines are set, + * the expectation is to track the soonest one. + * + * This callback is optional. + */ + void (*set_deadline)(struct dma_fence *fence, ktime_t deadline); }; void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, @@ -583,6 +601,8 @@ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr) return ret < 0 ? ret : 0; } +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline); + struct dma_fence *dma_fence_get_stub(void); struct dma_fence *dma_fence_allocate_private_stub(void); u64 dma_fence_context_alloc(unsigned num); From patchwork Mon Feb 27 19:35:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71778C7EE2D for ; Mon, 27 Feb 2023 19:35:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3C0E610E3D3; Mon, 27 Feb 2023 19:35:56 +0000 (UTC) Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by gabe.freedesktop.org (Postfix) with ESMTPS id 960CD10E1E5; Mon, 27 Feb 2023 19:35:53 +0000 (UTC) Received: by mail-pl1-x633.google.com with SMTP id i10so7899760plr.9; Mon, 27 Feb 2023 11:35:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MohZmh6ZcfzJn1OmRfs/o8+oM4ZPKLi2FB+4LPpL34o=; b=X/q1O+ZjV77fFoFmlutTEvpBGJueKF62goh9oezUzKs0YuCwyml4JbObsSCKbJT7JJ Ui2mwUw8xWQ5zAfkS8BdHCASqtnYmQkZXr/bJed/zVD5wE9mniBdhWRVLkle/VxdlecU EYBRwij8IxedCpNP6P8fBKe0OxTQeT6uksuCmf1kLP2B0/+VLWcxVR3r9hf9HstT29wZ NRbPkx+hAiOd2Ot9e6+DDrHanEKhBYQjZqGn7kUviCnLWtHhYm8bUrnS+Nyr9cHEFBRD L00cCCQln0V7zr854vwSpgsMzu6N3GTblVnUK03+zodB8MxhMlB0d5BP1fJZFRj+eSqq l76w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MohZmh6ZcfzJn1OmRfs/o8+oM4ZPKLi2FB+4LPpL34o=; b=TF8mFNAyZbFqLvdwLBpkrEQoUI7riWwX5+8XPrKBEWzZUu1PX/fnfV3IPsmKYv1m9q yFwOlcLguOJjbBFXYE8b3CeETYo/hhHts4kI8tU6G87LwpbxvLSU/bG1aUV7QQwRieoe FjdC3pVdtHxQ+iHJPrBo88E2h+XeObMWVLRRkIpvOQZOlcrleNgyqNsFyX7NeVgPrgHE tQbZxVt1fVF0u4NmWZBeNn9Wq5aIOXAIOyVMnsVToyxEmhMYco574hDKmFHND0N8n2ug N74OjFu7GlM09JoW0xKAXj+iuup2mBf08nrt6h4rQ3le7EARgcw/XPeR2FwDY3JtbzkF Jk+w== X-Gm-Message-State: AO0yUKUBeaQH4vmmzrIPnDJQ80gJVcBDxl1xCq3RABTxSc1VthyfOqKw s2iZ5rgXx5hfg6BmHkoZQsEtjBux4ko= X-Google-Smtp-Source: AK7set9N4lsFjy2RVODKG+NOcQZxVca6+ZqrLKo0+d5nuJz3ER974n1Njl6HYvE9R2QPaFG+ddOexA== X-Received: by 2002:a05:6a20:12ce:b0:cc:1996:9828 with SMTP id v14-20020a056a2012ce00b000cc19969828mr538145pzg.34.1677526552835; Mon, 27 Feb 2023 11:35:52 -0800 (PST) Received: from localhost ([2a00:79e1:abd:4a00:61b:48ed:72ab:435b]) by smtp.gmail.com with ESMTPSA id z9-20020a656109000000b004d4547cc0f7sm4322113pgu.18.2023.02.27.11.35.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 11:35:52 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 02/15] dma-buf/fence-array: Add fence deadline support Date: Mon, 27 Feb 2023 11:35:08 -0800 Message-Id: <20230227193535.2822389-3-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Gustavo Padovan , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , open list , Sumit Semwal , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org, =?utf-8?q?Christian_K=C3=B6nig?= , "open list:SYNC FILE FRAMEWORK" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Propagate the deadline to all the fences in the array. Signed-off-by: Rob Clark Reviewed-by: Christian König --- drivers/dma-buf/dma-fence-array.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/dma-buf/dma-fence-array.c b/drivers/dma-buf/dma-fence-array.c index 5c8a7084577b..9b3ce8948351 100644 --- a/drivers/dma-buf/dma-fence-array.c +++ b/drivers/dma-buf/dma-fence-array.c @@ -123,12 +123,23 @@ static void dma_fence_array_release(struct dma_fence *fence) dma_fence_free(fence); } +static void dma_fence_array_set_deadline(struct dma_fence *fence, + ktime_t deadline) +{ + struct dma_fence_array *array = to_dma_fence_array(fence); + unsigned i; + + for (i = 0; i < array->num_fences; ++i) + dma_fence_set_deadline(array->fences[i], deadline); +} + const struct dma_fence_ops dma_fence_array_ops = { .get_driver_name = dma_fence_array_get_driver_name, .get_timeline_name = dma_fence_array_get_timeline_name, .enable_signaling = dma_fence_array_enable_signaling, .signaled = dma_fence_array_signaled, .release = dma_fence_array_release, + .set_deadline = dma_fence_array_set_deadline, }; EXPORT_SYMBOL(dma_fence_array_ops); From patchwork Mon Feb 27 19:35:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154122 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84C01C64ED6 for ; Mon, 27 Feb 2023 19:36:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8790C89C46; Mon, 27 Feb 2023 19:35:57 +0000 (UTC) Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by gabe.freedesktop.org (Postfix) with ESMTPS id 75D8010E3D3; Mon, 27 Feb 2023 19:35:55 +0000 (UTC) Received: by mail-pf1-x432.google.com with SMTP id c10so3610548pfv.13; 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Mon, 27 Feb 2023 11:35:54 -0800 (PST) Received: from localhost ([2a00:79e1:abd:4a00:61b:48ed:72ab:435b]) by smtp.gmail.com with ESMTPSA id d15-20020aa7868f000000b0058e1b55391esm4697531pfo.178.2023.02.27.11.35.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 11:35:54 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 03/15] dma-buf/fence-chain: Add fence deadline support Date: Mon, 27 Feb 2023 11:35:09 -0800 Message-Id: <20230227193535.2822389-4-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Gustavo Padovan , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , open list , Sumit Semwal , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org, =?utf-8?q?Christian_K=C3=B6nig?= , "open list:SYNC FILE FRAMEWORK" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Propagate the deadline to all the fences in the chain. v2: Use dma_fence_chain_contained [Tvrtko] Signed-off-by: Rob Clark Reviewed-by: Christian König for this one. --- drivers/dma-buf/dma-fence-chain.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-chain.c index a0d920576ba6..9663ba1bb6ac 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -206,6 +206,17 @@ static void dma_fence_chain_release(struct dma_fence *fence) dma_fence_free(fence); } + +static void dma_fence_chain_set_deadline(struct dma_fence *fence, + ktime_t deadline) +{ + dma_fence_chain_for_each(fence, fence) { + struct dma_fence *f = dma_fence_chain_contained(fence); + + dma_fence_set_deadline(f, deadline); + } +} + const struct dma_fence_ops dma_fence_chain_ops = { .use_64bit_seqno = true, .get_driver_name = dma_fence_chain_get_driver_name, @@ -213,6 +224,7 @@ const struct dma_fence_ops dma_fence_chain_ops = { .enable_signaling = dma_fence_chain_enable_signaling, .signaled = dma_fence_chain_signaled, .release = dma_fence_chain_release, + .set_deadline = dma_fence_chain_set_deadline, }; EXPORT_SYMBOL(dma_fence_chain_ops); From patchwork Mon Feb 27 19:35:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154123 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 216FDC64ED8 for ; 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Mon, 27 Feb 2023 11:35:57 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 04/15] dma-buf/dma-resv: Add a way to set fence deadline Date: Mon, 27 Feb 2023 11:35:10 -0800 Message-Id: <20230227193535.2822389-5-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , open list , Sumit Semwal , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org, =?utf-8?q?Christian_K=C3=B6nig?= , "open list:DMA BUFFER SHARING FRAMEWORK" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Add a way to set a deadline on remaining resv fences according to the requested usage. Signed-off-by: Rob Clark Reviewed-by: Christian König --- drivers/dma-buf/dma-resv.c | 22 ++++++++++++++++++++++ include/linux/dma-resv.h | 2 ++ 2 files changed, 24 insertions(+) diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c index 1c76aed8e262..2a594b754af1 100644 --- a/drivers/dma-buf/dma-resv.c +++ b/drivers/dma-buf/dma-resv.c @@ -684,6 +684,28 @@ long dma_resv_wait_timeout(struct dma_resv *obj, enum dma_resv_usage usage, } EXPORT_SYMBOL_GPL(dma_resv_wait_timeout); +/** + * dma_resv_set_deadline - Set a deadline on reservation's objects fences + * @obj: the reservation object + * @usage: controls which fences to include, see enum dma_resv_usage. + * @deadline: the requested deadline (MONOTONIC) + * + * May be called without holding the dma_resv lock. Sets @deadline on + * all fences filtered by @usage. + */ +void dma_resv_set_deadline(struct dma_resv *obj, enum dma_resv_usage usage, + ktime_t deadline) +{ + struct dma_resv_iter cursor; + struct dma_fence *fence; + + dma_resv_iter_begin(&cursor, obj, usage); + dma_resv_for_each_fence_unlocked(&cursor, fence) { + dma_fence_set_deadline(fence, deadline); + } + dma_resv_iter_end(&cursor); +} +EXPORT_SYMBOL_GPL(dma_resv_set_deadline); /** * dma_resv_test_signaled - Test if a reservation object's fences have been diff --git a/include/linux/dma-resv.h b/include/linux/dma-resv.h index 0637659a702c..8d0e34dad446 100644 --- a/include/linux/dma-resv.h +++ b/include/linux/dma-resv.h @@ -479,6 +479,8 @@ int dma_resv_get_singleton(struct dma_resv *obj, enum dma_resv_usage usage, int dma_resv_copy_fences(struct dma_resv *dst, struct dma_resv *src); long dma_resv_wait_timeout(struct dma_resv *obj, enum dma_resv_usage usage, bool intr, unsigned long timeout); +void dma_resv_set_deadline(struct dma_resv *obj, enum dma_resv_usage usage, + ktime_t deadline); bool dma_resv_test_signaled(struct dma_resv *obj, enum dma_resv_usage usage); void dma_resv_describe(struct dma_resv *obj, struct seq_file *seq); From patchwork Mon Feb 27 19:35:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154124 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1A7E2C64ED6 for ; Mon, 27 Feb 2023 19:36:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9DC2610E417; Mon, 27 Feb 2023 19:36:07 +0000 (UTC) Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3347510E41D; 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Mon, 27 Feb 2023 11:35:59 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 05/15] dma-buf/sync_file: Add SET_DEADLINE ioctl Date: Mon, 27 Feb 2023 11:35:11 -0800 Message-Id: <20230227193535.2822389-6-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Gustavo Padovan , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , open list , =?utf-8?q?Christian_K=C3=B6nig?= , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org, Sumit Semwal , "open list:SYNC FILE FRAMEWORK" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark The initial purpose is for igt tests, but this would also be useful for compositors that wait until close to vblank deadline to make decisions about which frame to show. The igt tests can be found at: https://gitlab.freedesktop.org/robclark/igt-gpu-tools/-/commits/fence-deadline v2: Clarify the timebase, add link to igt tests v3: Use u64 value in ns to express deadline. v4: More doc Signed-off-by: Rob Clark Acked-by: Pekka Paalanen --- drivers/dma-buf/dma-fence.c | 3 ++- drivers/dma-buf/sync_file.c | 19 +++++++++++++++++++ include/uapi/linux/sync_file.h | 22 ++++++++++++++++++++++ 3 files changed, 43 insertions(+), 1 deletion(-) diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c index e103e821d993..7761ceeae620 100644 --- a/drivers/dma-buf/dma-fence.c +++ b/drivers/dma-buf/dma-fence.c @@ -933,7 +933,8 @@ EXPORT_SYMBOL(dma_fence_wait_any_timeout); * the GPU's devfreq to reduce frequency, when in fact the opposite is what is * needed. * - * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fence_set_deadline. + * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fence_set_deadline + * (or indirectly via userspace facing ioctls like &SYNC_IOC_SET_DEADLINE). * The deadline hint provides a way for the waiting driver, or userspace, to * convey an appropriate sense of urgency to the signaling driver. * diff --git a/drivers/dma-buf/sync_file.c b/drivers/dma-buf/sync_file.c index af57799c86ce..418021cfb87c 100644 --- a/drivers/dma-buf/sync_file.c +++ b/drivers/dma-buf/sync_file.c @@ -350,6 +350,22 @@ static long sync_file_ioctl_fence_info(struct sync_file *sync_file, return ret; } +static int sync_file_ioctl_set_deadline(struct sync_file *sync_file, + unsigned long arg) +{ + struct sync_set_deadline ts; + + if (copy_from_user(&ts, (void __user *)arg, sizeof(ts))) + return -EFAULT; + + if (ts.pad) + return -EINVAL; + + dma_fence_set_deadline(sync_file->fence, ns_to_ktime(ts.deadline_ns)); + + return 0; +} + static long sync_file_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { @@ -362,6 +378,9 @@ static long sync_file_ioctl(struct file *file, unsigned int cmd, case SYNC_IOC_FILE_INFO: return sync_file_ioctl_fence_info(sync_file, arg); + case SYNC_IOC_SET_DEADLINE: + return sync_file_ioctl_set_deadline(sync_file, arg); + default: return -ENOTTY; } diff --git a/include/uapi/linux/sync_file.h b/include/uapi/linux/sync_file.h index ee2dcfb3d660..49325cf6749b 100644 --- a/include/uapi/linux/sync_file.h +++ b/include/uapi/linux/sync_file.h @@ -67,6 +67,21 @@ struct sync_file_info { __u64 sync_fence_info; }; +/** + * struct sync_set_deadline - set a deadline hint on a fence + * @deadline_ns: absolute time of the deadline + * @pad: must be zero + * + * The timebase for the deadline is CLOCK_MONOTONIC (same as vblank) + */ +struct sync_set_deadline { + __u64 deadline_ns; + /* Not strictly needed for alignment but gives some possibility + * for future extension: + */ + __u64 pad; +}; + #define SYNC_IOC_MAGIC '>' /** @@ -95,4 +110,11 @@ struct sync_file_info { */ #define SYNC_IOC_FILE_INFO _IOWR(SYNC_IOC_MAGIC, 4, struct sync_file_info) +/** + * DOC: SYNC_IOC_SET_DEADLINE - set a deadline on a fence + * + * Allows userspace to set a deadline on a fence, see dma_fence_set_deadline() + */ +#define SYNC_IOC_SET_DEADLINE _IOW(SYNC_IOC_MAGIC, 5, struct sync_set_deadline) + #endif /* _UAPI_LINUX_SYNC_H */ From patchwork Mon Feb 27 19:35:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2626C64ED6 for ; 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Mon, 27 Feb 2023 11:36:01 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 06/15] dma-buf/sync_file: Support (E)POLLPRI Date: Mon, 27 Feb 2023 11:35:12 -0800 Message-Id: <20230227193535.2822389-7-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Gustavo Padovan , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , open list , =?utf-8?q?Christian_K=C3=B6nig?= , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org, Sumit Semwal , "open list:SYNC FILE FRAMEWORK" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Allow userspace to use the EPOLLPRI/POLLPRI flag to indicate an urgent wait (as opposed to a "housekeeping" wait to know when to cleanup after some work has completed). Usermode components of GPU driver stacks often poll() on fence fd's to know when it is safe to do things like free or reuse a buffer, but they can also poll() on a fence fd when waiting to read back results from the GPU. The EPOLLPRI/POLLPRI flag lets the kernel differentiate these two cases. Signed-off-by: Rob Clark --- drivers/dma-buf/sync_file.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/dma-buf/sync_file.c b/drivers/dma-buf/sync_file.c index 418021cfb87c..cbe96295373b 100644 --- a/drivers/dma-buf/sync_file.c +++ b/drivers/dma-buf/sync_file.c @@ -192,6 +192,14 @@ static __poll_t sync_file_poll(struct file *file, poll_table *wait) { struct sync_file *sync_file = file->private_data; + /* + * The POLLPRI/EPOLLPRI flag can be used to signal that + * userspace wants the fence to signal ASAP, express this + * as an immediate deadline. + */ + if (poll_requested_events(wait) & EPOLLPRI) + dma_fence_set_deadline(sync_file->fence, ktime_get()); + poll_wait(file, &sync_file->wq, wait); if (list_empty(&sync_file->cb.node) && From patchwork Mon Feb 27 19:35:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154125 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C82E6C64ED8 for ; Mon, 27 Feb 2023 19:36:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1276B10E479; Mon, 27 Feb 2023 19:36:08 +0000 (UTC) Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4201F10E45F; Mon, 27 Feb 2023 19:36:05 +0000 (UTC) Received: by mail-pj1-x1032.google.com with SMTP id kb15so7357193pjb.1; Mon, 27 Feb 2023 11:36:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LNxsKWr79zliY+Ix7FyHLBv/jvOdd98Ee5355EN3fy4=; b=kPUcQyxxpm05goWDvLo1dDZedNX9BX61/F/oPQD/rogzHNKcrjBRHyp5HfUkm0jIMb oo4wwdgJQ3AOiWnQ/iqcejiRkYWP4xX2P+0yhJVSlqdITvFns0WnAe8h115A589YL0FS VmAPZq2WL/fFgPPhOQNxKo/84nIIo/FqP7rIHr7NlMaCbClO07d7yZATpDUzWZwROngN izR+1KnKVH+ixXnnAiAnYbvUXkbWMHpnLbhk4m5kDyedPbFEIM5fmgsREW6G66V8npSE lBpKO+3yZVWelSP1GxLN+4Z20eaMZ6Sxt2RT44EGp7FU7uYdG9WG0CMt4DYg3IH9N9LG 2xCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LNxsKWr79zliY+Ix7FyHLBv/jvOdd98Ee5355EN3fy4=; b=ayQMMcC6eUkR5CofuSS8ZjUH+rbxVsQfFffM5pe3/KuIUxLQdICrcAGs/WaCBeEw6n gCgbIeTsw3zNjl8ktTTPX1ivk28lkrEHzYruTGGGMFQ0bBm2qbX9NDWjrRvr9BEt48hK TlYrgebbf9cJoKekYZo4m2YgE8GYvstY1KPJYhdPPbNFuWGkMWrpwIVrlp7kebmdVnSs Iw5bGxwlbAKE5rsFe2R9dGmhQkM7uKZIC3ua9WB33abUV46Ac+WXEy3DhuNi2mn8wqJv LrVk7j3Ffu7yQSYUHo2J2PD49jCd/lutRlPD6aK9+wfr/rFL2fG8zByL6zr2+9zmoo9O 7UDQ== X-Gm-Message-State: AO0yUKUVHKkCDCeYwxP678vpugLVNCpi1vbAWlY6Pm3KfnSuZWbGNybI vI8NxC3TqE7nVb0N2U518aFSv7yT3HM= X-Google-Smtp-Source: AK7set8aFROWB3JM7O+EwRDn3uJ6BxDpdV0bVN++OBmQjDQK2wy3/MuU7bDrxaniAacd9fi2QaT+ZA== X-Received: by 2002:a17:902:ea0b:b0:19c:fc7b:69a4 with SMTP id s11-20020a170902ea0b00b0019cfc7b69a4mr8993303plg.65.1677526564596; Mon, 27 Feb 2023 11:36:04 -0800 (PST) Received: from localhost ([2a00:79e1:abd:4a00:61b:48ed:72ab:435b]) by smtp.gmail.com with ESMTPSA id g24-20020a170902fe1800b001943d58268csm4965963plj.55.2023.02.27.11.36.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 11:36:04 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 07/15] dma-buf/sw_sync: Add fence deadline support Date: Mon, 27 Feb 2023 11:35:13 -0800 Message-Id: <20230227193535.2822389-8-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Gustavo Padovan , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , open list , Sumit Semwal , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org, =?utf-8?q?Christian_K=C3=B6nig?= , "open list:SYNC FILE FRAMEWORK" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark This consists of simply storing the most recent deadline, and adding an ioctl to retrieve the deadline. This can be used in conjunction with the SET_DEADLINE ioctl on a fence fd for testing. Ie. create various sw_sync fences, merge them into a fence-array, set deadline on the fence-array and confirm that it is propagated properly to each fence. v2: Switch UABI to express deadline as u64 v3: More verbose UAPI docs, show how to convert from timespec Signed-off-by: Rob Clark Reviewed-by: Christian König --- drivers/dma-buf/sw_sync.c | 58 ++++++++++++++++++++++++++++++++++ drivers/dma-buf/sync_debug.h | 2 ++ include/uapi/linux/sync_file.h | 6 +++- 3 files changed, 65 insertions(+), 1 deletion(-) diff --git a/drivers/dma-buf/sw_sync.c b/drivers/dma-buf/sw_sync.c index 348b3a9170fa..3e2315ee955b 100644 --- a/drivers/dma-buf/sw_sync.c +++ b/drivers/dma-buf/sw_sync.c @@ -52,12 +52,28 @@ struct sw_sync_create_fence_data { __s32 fence; /* fd of new fence */ }; +/** + * struct sw_sync_get_deadline - get the deadline hint of a sw_sync fence + * @deadline_ns: absolute time of the deadline + * @pad: must be zero + * @fence_fd: the sw_sync fence fd (in) + * + * The timebase for the deadline is CLOCK_MONOTONIC (same as vblank) + */ +struct sw_sync_get_deadline { + __u64 deadline_ns; + __u32 pad; + __s32 fence_fd; +}; + #define SW_SYNC_IOC_MAGIC 'W' #define SW_SYNC_IOC_CREATE_FENCE _IOWR(SW_SYNC_IOC_MAGIC, 0,\ struct sw_sync_create_fence_data) #define SW_SYNC_IOC_INC _IOW(SW_SYNC_IOC_MAGIC, 1, __u32) +#define SW_SYNC_GET_DEADLINE _IOWR(SW_SYNC_IOC_MAGIC, 2, \ + struct sw_sync_get_deadline) static const struct dma_fence_ops timeline_fence_ops; @@ -171,6 +187,13 @@ static void timeline_fence_timeline_value_str(struct dma_fence *fence, snprintf(str, size, "%d", parent->value); } +static void timeline_fence_set_deadline(struct dma_fence *fence, ktime_t deadline) +{ + struct sync_pt *pt = dma_fence_to_sync_pt(fence); + + pt->deadline = deadline; +} + static const struct dma_fence_ops timeline_fence_ops = { .get_driver_name = timeline_fence_get_driver_name, .get_timeline_name = timeline_fence_get_timeline_name, @@ -179,6 +202,7 @@ static const struct dma_fence_ops timeline_fence_ops = { .release = timeline_fence_release, .fence_value_str = timeline_fence_value_str, .timeline_value_str = timeline_fence_timeline_value_str, + .set_deadline = timeline_fence_set_deadline, }; /** @@ -387,6 +411,37 @@ static long sw_sync_ioctl_inc(struct sync_timeline *obj, unsigned long arg) return 0; } +static int sw_sync_ioctl_get_deadline(struct sync_timeline *obj, unsigned long arg) +{ + struct sw_sync_get_deadline data; + struct dma_fence *fence; + struct sync_pt *pt; + + if (copy_from_user(&data, (void __user *)arg, sizeof(data))) + return -EFAULT; + + if (data.deadline_ns || data.pad) + return -EINVAL; + + fence = sync_file_get_fence(data.fence_fd); + if (!fence) + return -EINVAL; + + pt = dma_fence_to_sync_pt(fence); + if (!pt) + return -EINVAL; + + + data.deadline_ns = ktime_to_ns(pt->deadline); + + dma_fence_put(fence); + + if (copy_to_user((void __user *)arg, &data, sizeof(data))) + return -EFAULT; + + return 0; +} + static long sw_sync_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { @@ -399,6 +454,9 @@ static long sw_sync_ioctl(struct file *file, unsigned int cmd, case SW_SYNC_IOC_INC: return sw_sync_ioctl_inc(obj, arg); + case SW_SYNC_GET_DEADLINE: + return sw_sync_ioctl_get_deadline(obj, arg); + default: return -ENOTTY; } diff --git a/drivers/dma-buf/sync_debug.h b/drivers/dma-buf/sync_debug.h index 6176e52ba2d7..2e0146d0bdbb 100644 --- a/drivers/dma-buf/sync_debug.h +++ b/drivers/dma-buf/sync_debug.h @@ -55,11 +55,13 @@ static inline struct sync_timeline *dma_fence_parent(struct dma_fence *fence) * @base: base fence object * @link: link on the sync timeline's list * @node: node in the sync timeline's tree + * @deadline: the most recently set fence deadline */ struct sync_pt { struct dma_fence base; struct list_head link; struct rb_node node; + ktime_t deadline; }; extern const struct file_operations sw_sync_debugfs_fops; diff --git a/include/uapi/linux/sync_file.h b/include/uapi/linux/sync_file.h index 49325cf6749b..dc6645b2598b 100644 --- a/include/uapi/linux/sync_file.h +++ b/include/uapi/linux/sync_file.h @@ -72,7 +72,11 @@ struct sync_file_info { * @deadline_ns: absolute time of the deadline * @pad: must be zero * - * The timebase for the deadline is CLOCK_MONOTONIC (same as vblank) + * The timebase for the deadline is CLOCK_MONOTONIC (same as vblank). For + * example: + * + * clock_gettime(CLOCK_MONOTONIC, &t); + * deadline_ns = (t.tv_sec * 1000000000L) + t.tv_nsec + duration_ns */ struct sync_set_deadline { __u64 deadline_ns; From patchwork Mon Feb 27 19:35:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6F326C7EE31 for ; Mon, 27 Feb 2023 19:36:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5780510E41D; Mon, 27 Feb 2023 19:36:12 +0000 (UTC) Received: from mail-pg1-x531.google.com (mail-pg1-x531.google.com [IPv6:2607:f8b0:4864:20::531]) by gabe.freedesktop.org (Postfix) with ESMTPS id B4F4510E464; Mon, 27 Feb 2023 19:36:08 +0000 (UTC) Received: by mail-pg1-x531.google.com with SMTP id q189so4229752pga.9; Mon, 27 Feb 2023 11:36:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Fry4TP6AIquyUeVXSm7W0PXZtEhE3hkfU2dLB2bew7U=; b=YckQb7/ERtb485oiiR6WPL+6RddWfkDYo9adIuUBDZG+V34YcDMDFi2A2n4Rih9bPm uRKS7/5WAI1W6Kzd2eJWWrVhZLgPBEHGQ37hSV4bq0fXn96o8Vr2vOi+tszJMRbaZrJ7 IAhLQrCgVzI14Yl1f4mXWvUEmfAH8amJpmFMNfSeneN+OtmsIWV6H/Z+REvFYEOi6g64 CoxOdoal9+2e7tfpU6n+9X5R6dy6wl58IZrYILqPoVQOK/kJmyYgGgHMADcEhuWik7p3 9V4Qu2ExAF8MOo1qT02OGLjvKZ+xBCAkflZYRUoEy3m/yxNZpYs6EEjOLjxBDLb2iWx3 x9fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Fry4TP6AIquyUeVXSm7W0PXZtEhE3hkfU2dLB2bew7U=; b=ARlgJDUxGLNDdixyX1hCxvkVZYscgjPEBmEGefChDuIKgydCqxJ3kFu58HOxl6fcoT 7/JY9xfeVTA1BbQh7g1NBCZUYwnarV2mh/SSb2qLMV+9uzXB7NKL/fFvSFCSisA2WgBy s4FE6Qyae2LANebMhdjCMxfWUkpwCO7zl2rR6gFlWJ2SA8/8bpZFE3MAXoBZIR2NggHE X/rMTKid5zwcZ/HxtuMA2TOLQR3pwbWrMVQeX+d6N3PitlYPGF8Vt9VyHSORd5xqQzci YK6wz997qXamZs7L0vMkM5nWwsICktsdm9TGbT5suPe0Daxr5hQjbTKI/zJPUtUFNeej 6ZSQ== X-Gm-Message-State: AO0yUKXzqPqV+iXdPaUQWebluUWdm0OtrENx9ioIaMEDii2NZxRw7kOT mzZbHG2rbemEH4HgZ788Cofpe6ggyok= X-Google-Smtp-Source: AK7set/GOe1T5Y++9WHJ9mnW2g2Aoty2s3b64lXsfNyfr7xjRMyn9hnvgDDoTyxMGQxRgkQw5aT/uQ== X-Received: by 2002:aa7:940b:0:b0:5a9:b910:6d98 with SMTP id x11-20020aa7940b000000b005a9b9106d98mr101195pfo.13.1677526568014; Mon, 27 Feb 2023 11:36:08 -0800 (PST) Received: from localhost ([2a00:79e1:abd:4a00:61b:48ed:72ab:435b]) by smtp.gmail.com with ESMTPSA id x42-20020a056a000bea00b005df065ebd5esm4547737pfu.209.2023.02.27.11.36.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 11:36:07 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 08/15] drm/scheduler: Add fence deadline support Date: Mon, 27 Feb 2023 11:35:14 -0800 Message-Id: <20230227193535.2822389-9-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , =?utf-8?q?Christian_K?= =?utf-8?q?=C3=B6nig?= , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org, Sumit Semwal , open list , "open list:DMA BUFFER SHARING FRAMEWORK" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" As the finished fence is the one that is exposed to userspace, and therefore the one that other operations, like atomic update, would block on, we need to propagate the deadline from from the finished fence to the actual hw fence. v2: Split into drm_sched_fence_set_parent() (ckoenig) v3: Ensure a thread calling drm_sched_fence_set_deadline_finished() sees fence->parent set before drm_sched_fence_set_parent() does this test_bit(DMA_FENCE_FLAG_HAS_DEADLINE_BIT). Signed-off-by: Rob Clark Acked-by: Luben Tuikov --- drivers/gpu/drm/scheduler/sched_fence.c | 46 +++++++++++++++++++++++++ drivers/gpu/drm/scheduler/sched_main.c | 2 +- include/drm/gpu_scheduler.h | 17 +++++++++ 3 files changed, 64 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/scheduler/sched_fence.c b/drivers/gpu/drm/scheduler/sched_fence.c index 7fd869520ef2..fe9c6468e440 100644 --- a/drivers/gpu/drm/scheduler/sched_fence.c +++ b/drivers/gpu/drm/scheduler/sched_fence.c @@ -123,6 +123,37 @@ static void drm_sched_fence_release_finished(struct dma_fence *f) dma_fence_put(&fence->scheduled); } +static void drm_sched_fence_set_deadline_finished(struct dma_fence *f, + ktime_t deadline) +{ + struct drm_sched_fence *fence = to_drm_sched_fence(f); + struct dma_fence *parent; + unsigned long flags; + + spin_lock_irqsave(&fence->lock, flags); + + /* If we already have an earlier deadline, keep it: */ + if (test_bit(DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT, &f->flags) && + ktime_before(fence->deadline, deadline)) { + spin_unlock_irqrestore(&fence->lock, flags); + return; + } + + fence->deadline = deadline; + set_bit(DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT, &f->flags); + + spin_unlock_irqrestore(&fence->lock, flags); + + /* + * smp_load_aquire() to ensure that if we are racing another + * thread calling drm_sched_fence_set_parent(), that we see + * the parent set before it calls test_bit(HAS_DEADLINE_BIT) + */ + parent = smp_load_acquire(&fence->parent); + if (parent) + dma_fence_set_deadline(parent, deadline); +} + static const struct dma_fence_ops drm_sched_fence_ops_scheduled = { .get_driver_name = drm_sched_fence_get_driver_name, .get_timeline_name = drm_sched_fence_get_timeline_name, @@ -133,6 +164,7 @@ static const struct dma_fence_ops drm_sched_fence_ops_finished = { .get_driver_name = drm_sched_fence_get_driver_name, .get_timeline_name = drm_sched_fence_get_timeline_name, .release = drm_sched_fence_release_finished, + .set_deadline = drm_sched_fence_set_deadline_finished, }; struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f) @@ -147,6 +179,20 @@ struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f) } EXPORT_SYMBOL(to_drm_sched_fence); +void drm_sched_fence_set_parent(struct drm_sched_fence *s_fence, + struct dma_fence *fence) +{ + /* + * smp_store_release() to ensure another thread racing us + * in drm_sched_fence_set_deadline_finished() sees the + * fence's parent set before test_bit() + */ + smp_store_release(&s_fence->parent, dma_fence_get(fence)); + if (test_bit(DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT, + &s_fence->finished.flags)) + dma_fence_set_deadline(fence, s_fence->deadline); +} + struct drm_sched_fence *drm_sched_fence_alloc(struct drm_sched_entity *entity, void *owner) { diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 4e6ad6e122bc..007f98c48f8d 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -1019,7 +1019,7 @@ static int drm_sched_main(void *param) drm_sched_fence_scheduled(s_fence); if (!IS_ERR_OR_NULL(fence)) { - s_fence->parent = dma_fence_get(fence); + drm_sched_fence_set_parent(s_fence, fence); /* Drop for original kref_init of the fence */ dma_fence_put(fence); diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h index 9db9e5e504ee..99584e457153 100644 --- a/include/drm/gpu_scheduler.h +++ b/include/drm/gpu_scheduler.h @@ -41,6 +41,15 @@ */ #define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS +/** + * DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT - A fence deadline hint has been set + * + * Because we could have a deadline hint can be set before the backing hw + * fence is created, we need to keep track of whether a deadline has already + * been set. + */ +#define DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT (DMA_FENCE_FLAG_USER_BITS + 1) + enum dma_resv_usage; struct dma_resv; struct drm_gem_object; @@ -280,6 +289,12 @@ struct drm_sched_fence { */ struct dma_fence finished; + /** + * @deadline: deadline set on &drm_sched_fence.finished which + * potentially needs to be propagated to &drm_sched_fence.parent + */ + ktime_t deadline; + /** * @parent: the fence returned by &drm_sched_backend_ops.run_job * when scheduling the job on hardware. We signal the @@ -568,6 +583,8 @@ void drm_sched_entity_set_priority(struct drm_sched_entity *entity, enum drm_sched_priority priority); bool drm_sched_entity_is_ready(struct drm_sched_entity *entity); +void drm_sched_fence_set_parent(struct drm_sched_fence *s_fence, + struct dma_fence *fence); struct drm_sched_fence *drm_sched_fence_alloc( struct drm_sched_entity *s_entity, void *owner); void drm_sched_fence_init(struct drm_sched_fence *fence, From patchwork Mon Feb 27 19:35:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61C8BC7EE30 for ; Mon, 27 Feb 2023 19:36:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2C10610E1E5; Mon, 27 Feb 2023 19:36:14 +0000 (UTC) Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by gabe.freedesktop.org (Postfix) with ESMTPS id EED1A10E3BC; Mon, 27 Feb 2023 19:36:10 +0000 (UTC) Received: by mail-pj1-x1032.google.com with SMTP id kb15so7357507pjb.1; Mon, 27 Feb 2023 11:36:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cu6g0TfYrSTdJ3EF+CxBkdeZg6jPtGlNDSXHqXU9Yls=; b=dvQxZENkTsoR+cK6wZ07leannCABnupAhtybapEh0f2qWB+XGAzDC3lNfWKpyJTllM VbNkhJHL3Uy12Tru7ZBQtzTQjoFOqRVOQdX9qtp68V/NdLeS7unTppclLU62bovrrVf5 SExIcG+wWIyD2QlR1/JhnDob1SCsk1bH0Pac2VRSeNMp8eGHsEDC9dDPz5xYKD+CBBse r+k9LMF3E1POw91RkBBLyQ0srrYcQkvkaI0TQPq6kPcr76/xQtVGIHYW/FECusJ8UIH2 Cs4dfwxil1euJ5h7A9G0tNwe6gI07m4aLWwuM46FN0Q+ND56Bk2n/g87GMSnd6Xx93bp X+8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cu6g0TfYrSTdJ3EF+CxBkdeZg6jPtGlNDSXHqXU9Yls=; b=8CWf4qwbsiTJCpmSGqzaS4CUNhP6siGDDICkJLN0HgKz5CAO5SiHxxYhwUgQD/wiTt 9HbmYGeghm7a0N8q2WezB2VI/Bq/CmvJUGGeRa/0xt6bLB0QxyPkf2wiY74Jk5yjW5ze SasxbRywvb7XCwTXvbKnItbmulp10X8+UEP1bVCQySZWjj0rCtAP0by+EA2Q3e8RZJ+O XV24ssRVgnKY5cz427WhT2fyhdwN6+4yPTQcPZW2nkWI/4eELiQovfjEYu/KCmCV3kK1 t5XLfytqIKjejjBl/EueBkrTJChg0XLoGxARs61OApvzfcLcKydqCCCQM2egACfPEKUl ojSQ== X-Gm-Message-State: AO0yUKW+c1RiDK5XT3C9IZjXxNiS7nUSJbZaQDELKph8MBb4D9jTcVRd ZBH2BzK8p9I1r9luWu5PHPOravmYp/Y= X-Google-Smtp-Source: AK7set952M4nc+UBqwEa14ViXV4D6izq7J6bohTkOixH0eieHoZtRNvyYYeK2og04vGNZWMXR6kDjA== X-Received: by 2002:a17:90b:1bc9:b0:237:30ef:e593 with SMTP id oa9-20020a17090b1bc900b0023730efe593mr311515pjb.24.1677526570374; Mon, 27 Feb 2023 11:36:10 -0800 (PST) Received: from localhost ([2a00:79e1:abd:4a00:61b:48ed:72ab:435b]) by smtp.gmail.com with ESMTPSA id q1-20020a17090a304100b002341c0ff245sm6472856pjl.19.2023.02.27.11.36.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 11:36:09 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 09/15] drm/syncobj: Add deadline support for syncobj waits Date: Mon, 27 Feb 2023 11:35:15 -0800 Message-Id: <20230227193535.2822389-10-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Thomas Zimmermann , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , open list , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Add a new flag to let userspace provide a deadline as a hint for syncobj and timeline waits. This gives a hint to the driver signaling the backing fences about how soon userspace needs it to compete work, so it can addjust GPU frequency accordingly. An immediate deadline can be given to provide something equivalent to i915 "wait boost". v2: Use absolute u64 ns value for deadline hint, drop cap and driver feature flag in favor of allowing count_handles==0 as a way for userspace to probe kernel for support of new flag v3: More verbose comments about UAPI Signed-off-by: Rob Clark --- drivers/gpu/drm/drm_syncobj.c | 64 ++++++++++++++++++++++++++++------- include/uapi/drm/drm.h | 17 ++++++++++ 2 files changed, 68 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c index 0c2be8360525..a85e9464f07b 100644 --- a/drivers/gpu/drm/drm_syncobj.c +++ b/drivers/gpu/drm/drm_syncobj.c @@ -126,6 +126,11 @@ * synchronize between the two. * This requirement is inherited from the Vulkan fence API. * + * If &DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE is set, the ioctl will also set + * a fence deadline hint on the backing fences before waiting, to provide the + * fence signaler with an appropriate sense of urgency. The deadline is + * specified as an absolute &CLOCK_MONOTONIC value in units of ns. + * * Similarly, &DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT takes an array of syncobj * handles as well as an array of u64 points and does a host-side wait on all * of syncobj fences at the given points simultaneously. @@ -973,7 +978,8 @@ static signed long drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs, uint32_t count, uint32_t flags, signed long timeout, - uint32_t *idx) + uint32_t *idx, + ktime_t *deadline) { struct syncobj_wait_entry *entries; struct dma_fence *fence; @@ -1053,6 +1059,15 @@ static signed long drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs, drm_syncobj_fence_add_wait(syncobjs[i], &entries[i]); } + if (deadline) { + for (i = 0; i < count; ++i) { + fence = entries[i].fence; + if (!fence) + continue; + dma_fence_set_deadline(fence, *deadline); + } + } + do { set_current_state(TASK_INTERRUPTIBLE); @@ -1151,7 +1166,8 @@ static int drm_syncobj_array_wait(struct drm_device *dev, struct drm_file *file_private, struct drm_syncobj_wait *wait, struct drm_syncobj_timeline_wait *timeline_wait, - struct drm_syncobj **syncobjs, bool timeline) + struct drm_syncobj **syncobjs, bool timeline, + ktime_t *deadline) { signed long timeout = 0; uint32_t first = ~0; @@ -1162,7 +1178,8 @@ static int drm_syncobj_array_wait(struct drm_device *dev, NULL, wait->count_handles, wait->flags, - timeout, &first); + timeout, &first, + deadline); if (timeout < 0) return timeout; wait->first_signaled = first; @@ -1172,7 +1189,8 @@ static int drm_syncobj_array_wait(struct drm_device *dev, u64_to_user_ptr(timeline_wait->points), timeline_wait->count_handles, timeline_wait->flags, - timeout, &first); + timeout, &first, + deadline); if (timeout < 0) return timeout; timeline_wait->first_signaled = first; @@ -1243,17 +1261,22 @@ drm_syncobj_wait_ioctl(struct drm_device *dev, void *data, { struct drm_syncobj_wait *args = data; struct drm_syncobj **syncobjs; + unsigned possible_flags; + ktime_t t, *tp = NULL; int ret = 0; if (!drm_core_check_feature(dev, DRIVER_SYNCOBJ)) return -EOPNOTSUPP; - if (args->flags & ~(DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL | - DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT)) + possible_flags = DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL | + DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT | + DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE; + + if (args->flags & ~possible_flags) return -EINVAL; if (args->count_handles == 0) - return -EINVAL; + return 0; ret = drm_syncobj_array_find(file_private, u64_to_user_ptr(args->handles), @@ -1262,8 +1285,13 @@ drm_syncobj_wait_ioctl(struct drm_device *dev, void *data, if (ret < 0) return ret; + if (args->flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE) { + t = ns_to_ktime(args->deadline_ns); + tp = &t; + } + ret = drm_syncobj_array_wait(dev, file_private, - args, NULL, syncobjs, false); + args, NULL, syncobjs, false, tp); drm_syncobj_array_free(syncobjs, args->count_handles); @@ -1276,18 +1304,23 @@ drm_syncobj_timeline_wait_ioctl(struct drm_device *dev, void *data, { struct drm_syncobj_timeline_wait *args = data; struct drm_syncobj **syncobjs; + unsigned possible_flags; + ktime_t t, *tp = NULL; int ret = 0; if (!drm_core_check_feature(dev, DRIVER_SYNCOBJ_TIMELINE)) return -EOPNOTSUPP; - if (args->flags & ~(DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL | - DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT | - DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE)) + possible_flags = DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL | + DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT | + DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE | + DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE; + + if (args->flags & ~possible_flags) return -EINVAL; if (args->count_handles == 0) - return -EINVAL; + return -0; ret = drm_syncobj_array_find(file_private, u64_to_user_ptr(args->handles), @@ -1296,8 +1329,13 @@ drm_syncobj_timeline_wait_ioctl(struct drm_device *dev, void *data, if (ret < 0) return ret; + if (args->flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE) { + t = ns_to_ktime(args->deadline_ns); + tp = &t; + } + ret = drm_syncobj_array_wait(dev, file_private, - NULL, args, syncobjs, true); + NULL, args, syncobjs, true, tp); drm_syncobj_array_free(syncobjs, args->count_handles); diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h index 642808520d92..bff0509ac8b6 100644 --- a/include/uapi/drm/drm.h +++ b/include/uapi/drm/drm.h @@ -887,6 +887,7 @@ struct drm_syncobj_transfer { #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0) #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1) #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point to become available */ +#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE (1 << 3) /* set fence deadline based to deadline_ns */ struct drm_syncobj_wait { __u64 handles; /* absolute timeout */ @@ -895,6 +896,14 @@ struct drm_syncobj_wait { __u32 flags; __u32 first_signaled; /* only valid when not waiting all */ __u32 pad; + /** + * @deadline_ns - fence deadline hint + * + * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing + * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is + * set. + */ + __u64 deadline_ns; }; struct drm_syncobj_timeline_wait { @@ -907,6 +916,14 @@ struct drm_syncobj_timeline_wait { __u32 flags; __u32 first_signaled; /* only valid when not waiting all */ __u32 pad; + /** + * @deadline_ns - fence deadline hint + * + * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing + * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is + * set. + */ + __u64 deadline_ns; }; From patchwork Mon Feb 27 19:35:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E91AC64ED6 for ; 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Mon, 27 Feb 2023 11:36:13 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 10/15] drm/vblank: Add helper to get next vblank time Date: Mon, 27 Feb 2023 11:35:16 -0800 Message-Id: <20230227193535.2822389-11-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Thomas Zimmermann , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , open list , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Will be used in the next commit to set a deadline on fences that an atomic update is waiting on. v2: Calculate time at *start* of vblank period, not end v3: Fix kbuild complaints Signed-off-by: Rob Clark Reviewed-by: Mario Kleiner --- drivers/gpu/drm/drm_vblank.c | 53 ++++++++++++++++++++++++++++++------ include/drm/drm_vblank.h | 1 + 2 files changed, 45 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c index 2ff31717a3de..299fa2a19a90 100644 --- a/drivers/gpu/drm/drm_vblank.c +++ b/drivers/gpu/drm/drm_vblank.c @@ -844,10 +844,9 @@ bool drm_crtc_vblank_helper_get_vblank_timestamp(struct drm_crtc *crtc, EXPORT_SYMBOL(drm_crtc_vblank_helper_get_vblank_timestamp); /** - * drm_get_last_vbltimestamp - retrieve raw timestamp for the most recent - * vblank interval - * @dev: DRM device - * @pipe: index of CRTC whose vblank timestamp to retrieve + * drm_crtc_get_last_vbltimestamp - retrieve raw timestamp for the most + * recent vblank interval + * @crtc: CRTC whose vblank timestamp to retrieve * @tvblank: Pointer to target time which should receive the timestamp * @in_vblank_irq: * True when called from drm_crtc_handle_vblank(). Some drivers @@ -865,10 +864,9 @@ EXPORT_SYMBOL(drm_crtc_vblank_helper_get_vblank_timestamp); * True if timestamp is considered to be very precise, false otherwise. */ static bool -drm_get_last_vbltimestamp(struct drm_device *dev, unsigned int pipe, - ktime_t *tvblank, bool in_vblank_irq) +drm_crtc_get_last_vbltimestamp(struct drm_crtc *crtc, ktime_t *tvblank, + bool in_vblank_irq) { - struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe); bool ret = false; /* Define requested maximum error on timestamps (nanoseconds). */ @@ -876,8 +874,6 @@ drm_get_last_vbltimestamp(struct drm_device *dev, unsigned int pipe, /* Query driver if possible and precision timestamping enabled. */ if (crtc && crtc->funcs->get_vblank_timestamp && max_error > 0) { - struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe); - ret = crtc->funcs->get_vblank_timestamp(crtc, &max_error, tvblank, in_vblank_irq); } @@ -891,6 +887,15 @@ drm_get_last_vbltimestamp(struct drm_device *dev, unsigned int pipe, return ret; } +static bool +drm_get_last_vbltimestamp(struct drm_device *dev, unsigned int pipe, + ktime_t *tvblank, bool in_vblank_irq) +{ + struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe); + + return drm_crtc_get_last_vbltimestamp(crtc, tvblank, in_vblank_irq); +} + /** * drm_crtc_vblank_count - retrieve "cooked" vblank counter value * @crtc: which counter to retrieve @@ -980,6 +985,36 @@ u64 drm_crtc_vblank_count_and_time(struct drm_crtc *crtc, } EXPORT_SYMBOL(drm_crtc_vblank_count_and_time); +/** + * drm_crtc_next_vblank_start - calculate the time of the next vblank + * @crtc: the crtc for which to calculate next vblank time + * @vblanktime: pointer to time to receive the next vblank timestamp. + * + * Calculate the expected time of the start of the next vblank period, + * based on time of previous vblank and frame duration + */ +int drm_crtc_next_vblank_start(struct drm_crtc *crtc, ktime_t *vblanktime) +{ + unsigned int pipe = drm_crtc_index(crtc); + struct drm_vblank_crtc *vblank = &crtc->dev->vblank[pipe]; + struct drm_display_mode *mode = &vblank->hwmode; + u64 vblank_start; + + if (!vblank->framedur_ns || !vblank->linedur_ns) + return -EINVAL; + + if (!drm_crtc_get_last_vbltimestamp(crtc, vblanktime, false)) + return -EINVAL; + + vblank_start = DIV_ROUND_DOWN_ULL( + (u64)vblank->framedur_ns * mode->crtc_vblank_start, + mode->crtc_vtotal); + *vblanktime = ktime_add(*vblanktime, ns_to_ktime(vblank_start)); + + return 0; +} +EXPORT_SYMBOL(drm_crtc_next_vblank_start); + static void send_vblank_event(struct drm_device *dev, struct drm_pending_vblank_event *e, u64 seq, ktime_t now) diff --git a/include/drm/drm_vblank.h b/include/drm/drm_vblank.h index 733a3e2d1d10..7f3957943dd1 100644 --- a/include/drm/drm_vblank.h +++ b/include/drm/drm_vblank.h @@ -230,6 +230,7 @@ bool drm_dev_has_vblank(const struct drm_device *dev); u64 drm_crtc_vblank_count(struct drm_crtc *crtc); u64 drm_crtc_vblank_count_and_time(struct drm_crtc *crtc, ktime_t *vblanktime); +int drm_crtc_next_vblank_start(struct drm_crtc *crtc, ktime_t *vblanktime); void drm_crtc_send_vblank_event(struct drm_crtc *crtc, struct drm_pending_vblank_event *e); void drm_crtc_arm_vblank_event(struct drm_crtc *crtc, From patchwork Mon Feb 27 19:35:17 2023 Content-Type: text/plain; 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Mon, 27 Feb 2023 11:36:15 -0800 (PST) Received: from localhost ([2a00:79e1:abd:4a00:61b:48ed:72ab:435b]) by smtp.gmail.com with ESMTPSA id j8-20020aa78008000000b00575d1ba0ecfsm4592396pfi.133.2023.02.27.11.36.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 11:36:15 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 11/15] drm/atomic-helper: Set fence deadline for vblank Date: Mon, 27 Feb 2023 11:35:17 -0800 Message-Id: <20230227193535.2822389-12-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , Thomas Zimmermann , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , open list , Daniel Vetter , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark For an atomic commit updating a single CRTC (ie. a pageflip) calculate the next vblank time, and inform the fence(s) of that deadline. v2: Comment typo fix (danvet) Signed-off-by: Rob Clark Reviewed-by: Daniel Vetter Signed-off-by: Rob Clark --- drivers/gpu/drm/drm_atomic_helper.c | 36 +++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index d579fd8f7cb8..d8ee98ce2fc5 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -1511,6 +1511,40 @@ void drm_atomic_helper_commit_modeset_enables(struct drm_device *dev, } EXPORT_SYMBOL(drm_atomic_helper_commit_modeset_enables); +/* + * For atomic updates which touch just a single CRTC, calculate the time of the + * next vblank, and inform all the fences of the deadline. + */ +static void set_fence_deadline(struct drm_device *dev, + struct drm_atomic_state *state) +{ + struct drm_crtc *crtc, *wait_crtc = NULL; + struct drm_crtc_state *new_crtc_state; + struct drm_plane *plane; + struct drm_plane_state *new_plane_state; + ktime_t vbltime; + int i; + + for_each_new_crtc_in_state (state, crtc, new_crtc_state, i) { + if (wait_crtc) + return; + wait_crtc = crtc; + } + + /* If no CRTCs updated, then nothing to do: */ + if (!wait_crtc) + return; + + if (drm_crtc_next_vblank_start(wait_crtc, &vbltime)) + return; + + for_each_new_plane_in_state (state, plane, new_plane_state, i) { + if (!new_plane_state->fence) + continue; + dma_fence_set_deadline(new_plane_state->fence, vbltime); + } +} + /** * drm_atomic_helper_wait_for_fences - wait for fences stashed in plane state * @dev: DRM device @@ -1540,6 +1574,8 @@ int drm_atomic_helper_wait_for_fences(struct drm_device *dev, struct drm_plane_state *new_plane_state; int i, ret; + set_fence_deadline(dev, state); + for_each_new_plane_in_state(state, plane, new_plane_state, i) { if (!new_plane_state->fence) continue; From patchwork Mon Feb 27 19:35:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5045BC64ED8 for ; Mon, 27 Feb 2023 19:36:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1DAB510E4BD; Mon, 27 Feb 2023 19:36:23 +0000 (UTC) Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4997310E4A6; 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Mon, 27 Feb 2023 11:36:19 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 12/15] drm/msm: Add deadline based boost support Date: Mon, 27 Feb 2023 11:35:18 -0800 Message-Id: <20230227193535.2822389-13-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sumit Semwal , Rob Clark , Luben Tuikov , "open list:DRM DRIVER FOR MSM ADRENO GPU" , "open list:DMA BUFFER SHARING FRAMEWORK" , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , Abhinav Kumar , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Alex Deucher , Pekka Paalanen , Rodrigo Vivi , Sean Paul , Tvrtko Ursulin , open list , Dmitry Baryshkov , freedreno@lists.freedesktop.org, =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Track the nearest deadline on a fence timeline and set a timer to expire shortly before to trigger boost if the fence has not yet been signaled. v2: rebase Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_fence.c | 74 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/msm/msm_fence.h | 20 +++++++++ 2 files changed, 94 insertions(+) diff --git a/drivers/gpu/drm/msm/msm_fence.c b/drivers/gpu/drm/msm/msm_fence.c index 56641408ea74..51b461f32103 100644 --- a/drivers/gpu/drm/msm/msm_fence.c +++ b/drivers/gpu/drm/msm/msm_fence.c @@ -8,6 +8,35 @@ #include "msm_drv.h" #include "msm_fence.h" +#include "msm_gpu.h" + +static struct msm_gpu *fctx2gpu(struct msm_fence_context *fctx) +{ + struct msm_drm_private *priv = fctx->dev->dev_private; + return priv->gpu; +} + +static enum hrtimer_restart deadline_timer(struct hrtimer *t) +{ + struct msm_fence_context *fctx = container_of(t, + struct msm_fence_context, deadline_timer); + + kthread_queue_work(fctx2gpu(fctx)->worker, &fctx->deadline_work); + + return HRTIMER_NORESTART; +} + +static void deadline_work(struct kthread_work *work) +{ + struct msm_fence_context *fctx = container_of(work, + struct msm_fence_context, deadline_work); + + /* If deadline fence has already passed, nothing to do: */ + if (msm_fence_completed(fctx, fctx->next_deadline_fence)) + return; + + msm_devfreq_boost(fctx2gpu(fctx), 2); +} struct msm_fence_context * @@ -36,6 +65,13 @@ msm_fence_context_alloc(struct drm_device *dev, volatile uint32_t *fenceptr, fctx->completed_fence = fctx->last_fence; *fctx->fenceptr = fctx->last_fence; + hrtimer_init(&fctx->deadline_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); + fctx->deadline_timer.function = deadline_timer; + + kthread_init_work(&fctx->deadline_work, deadline_work); + + fctx->next_deadline = ktime_get(); + return fctx; } @@ -62,6 +98,8 @@ void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence) spin_lock_irqsave(&fctx->spinlock, flags); if (fence_after(fence, fctx->completed_fence)) fctx->completed_fence = fence; + if (msm_fence_completed(fctx, fctx->next_deadline_fence)) + hrtimer_cancel(&fctx->deadline_timer); spin_unlock_irqrestore(&fctx->spinlock, flags); } @@ -92,10 +130,46 @@ static bool msm_fence_signaled(struct dma_fence *fence) return msm_fence_completed(f->fctx, f->base.seqno); } +static void msm_fence_set_deadline(struct dma_fence *fence, ktime_t deadline) +{ + struct msm_fence *f = to_msm_fence(fence); + struct msm_fence_context *fctx = f->fctx; + unsigned long flags; + ktime_t now; + + spin_lock_irqsave(&fctx->spinlock, flags); + now = ktime_get(); + + if (ktime_after(now, fctx->next_deadline) || + ktime_before(deadline, fctx->next_deadline)) { + fctx->next_deadline = deadline; + fctx->next_deadline_fence = + max(fctx->next_deadline_fence, (uint32_t)fence->seqno); + + /* + * Set timer to trigger boost 3ms before deadline, or + * if we are already less than 3ms before the deadline + * schedule boost work immediately. + */ + deadline = ktime_sub(deadline, ms_to_ktime(3)); + + if (ktime_after(now, deadline)) { + kthread_queue_work(fctx2gpu(fctx)->worker, + &fctx->deadline_work); + } else { + hrtimer_start(&fctx->deadline_timer, deadline, + HRTIMER_MODE_ABS); + } + } + + spin_unlock_irqrestore(&fctx->spinlock, flags); +} + static const struct dma_fence_ops msm_fence_ops = { .get_driver_name = msm_fence_get_driver_name, .get_timeline_name = msm_fence_get_timeline_name, .signaled = msm_fence_signaled, + .set_deadline = msm_fence_set_deadline, }; struct dma_fence * diff --git a/drivers/gpu/drm/msm/msm_fence.h b/drivers/gpu/drm/msm/msm_fence.h index 7f1798c54cd1..cdaebfb94f5c 100644 --- a/drivers/gpu/drm/msm/msm_fence.h +++ b/drivers/gpu/drm/msm/msm_fence.h @@ -52,6 +52,26 @@ struct msm_fence_context { volatile uint32_t *fenceptr; spinlock_t spinlock; + + /* + * TODO this doesn't really deal with multiple deadlines, like + * if userspace got multiple frames ahead.. OTOH atomic updates + * don't queue, so maybe that is ok + */ + + /** next_deadline: Time of next deadline */ + ktime_t next_deadline; + + /** + * next_deadline_fence: + * + * Fence value for next pending deadline. The deadline timer is + * canceled when this fence is signaled. + */ + uint32_t next_deadline_fence; + + struct hrtimer deadline_timer; + struct kthread_work deadline_work; }; struct msm_fence_context * msm_fence_context_alloc(struct drm_device *dev, From patchwork Mon Feb 27 19:35:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154132 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B40E4C64ED8 for ; Mon, 27 Feb 2023 19:36:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 21D4910E302; Mon, 27 Feb 2023 19:36:37 +0000 (UTC) Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9CEE710E4A6; Mon, 27 Feb 2023 19:36:23 +0000 (UTC) Received: by mail-pf1-x432.google.com with SMTP id n5so4236652pfv.11; Mon, 27 Feb 2023 11:36:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0EqwRq/t+KHhVrbIAD1sooBDZlG3nzxQWus7/my7j0s=; b=Ohm4qX62pfkC+TDoeherf/ovCUKtkTB2NZ8qoFno7AE7iz7x93T1tO2cavSDKilBF0 P0slS20KbsYARBD5IjBmANiqIJ3AyKXZT+Q7cZJoDsZ6OEsXG3RrETjKlmqAiPtZTFjo agIj+GvVUL7OsIuSHmZqAbFKzV8t3znXW7U3r+zsT9yNAahPSJMtNB/TYFM+3zh8Nno2 l6SVLWzMdf28OvHabaZJR9Ivdy+UiyHAJsxSCC7isQLSREoaoQZwsgQ2o9AdKwFLQ5ht 93RvRe7g653mTS6f8DroKAD2WBBpsMrCtZtc19cHQ0J83PJq9+xnbGjCMx+tvAIrtXHn dQIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0EqwRq/t+KHhVrbIAD1sooBDZlG3nzxQWus7/my7j0s=; b=EZJG2+vJwPkLe4v4v73s3AsGCSjwb1erJY0z8wAvXnIgqUjyJFgrTqct7D3+kRAO/U Y1/TPgnN3818VbQvcX+uCPqSz5NGp7FQtokjEQ6aZY9R220h0lnwa9bAlnEzACsv3/hP i5dW+hVPUXZCaX0dJ2G5bmNF9/zUBHHJtLbc7LcD+LFyisefnV/dlgAkQAzT0aD+o1jA JSiAIYlwwbYNTUekHr8+n35sc1LJbAr9lS6f5N/nwg2nYtjZ8xVqNDkUFQdob22lrjtJ /Kup0vw3WRIA+PN0vJBrVx1uvlQaMw5/gBOPiTm7+XJMSiDZ0/kNY6JaaHvfyRVqbLEi CF3w== X-Gm-Message-State: AO0yUKUqQzoAWJ452EVJVl3vKMdVeuveYsyMErSQmY9J+BHE0uf1FJCr rxNqzmitRd2sRkqQaLz20SSS4qDFUFM= X-Google-Smtp-Source: AK7set+Z3e0HCE2sXZ1gBKrBC7BjtQGSWU0HhVWsEWkUBQh5IUxsN0dhLIoPQxz1zlv9Gl0dttteoA== X-Received: by 2002:aa7:9e8a:0:b0:5db:ba34:36eb with SMTP id p10-20020aa79e8a000000b005dbba3436ebmr84421pfq.16.1677526582823; Mon, 27 Feb 2023 11:36:22 -0800 (PST) Received: from localhost ([2a00:79e1:abd:4a00:61b:48ed:72ab:435b]) by smtp.gmail.com with ESMTPSA id bm17-20020a056a00321100b005aa80fe8be7sm4540082pfb.67.2023.02.27.11.36.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 11:36:22 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 13/15] drm/msm: Add wait-boost support Date: Mon, 27 Feb 2023 11:35:19 -0800 Message-Id: <20230227193535.2822389-14-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , open list , Tvrtko Ursulin , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , Abhinav Kumar , Dmitry Baryshkov , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , Sean Paul , freedreno@lists.freedesktop.org, "open list:DRM DRIVER FOR MSM ADRENO GPU" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Add a way for various userspace waits to signal urgency. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_drv.c | 12 ++++++++---- drivers/gpu/drm/msm/msm_gem.c | 5 +++++ include/uapi/drm/msm_drm.h | 14 ++++++++++++-- 3 files changed, 25 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index aca48c868c14..f6764a86b2da 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -46,6 +46,7 @@ * - 1.8.0 - Add MSM_BO_CACHED_COHERENT for supported GPUs (a6xx) * - 1.9.0 - Add MSM_SUBMIT_FENCE_SN_IN * - 1.10.0 - Add MSM_SUBMIT_BO_NO_IMPLICIT + * - 1.11.0 - Add wait boost (MSM_WAIT_FENCE_BOOST, MSM_PREP_BOOST) */ #define MSM_VERSION_MAJOR 1 #define MSM_VERSION_MINOR 10 @@ -899,7 +900,7 @@ static int msm_ioctl_gem_info(struct drm_device *dev, void *data, } static int wait_fence(struct msm_gpu_submitqueue *queue, uint32_t fence_id, - ktime_t timeout) + ktime_t timeout, uint32_t flags) { struct dma_fence *fence; int ret; @@ -929,6 +930,9 @@ static int wait_fence(struct msm_gpu_submitqueue *queue, uint32_t fence_id, if (!fence) return 0; + if (flags & MSM_WAIT_FENCE_BOOST) + dma_fence_set_deadline(fence, ktime_get()); + ret = dma_fence_wait_timeout(fence, true, timeout_to_jiffies(&timeout)); if (ret == 0) { ret = -ETIMEDOUT; @@ -949,8 +953,8 @@ static int msm_ioctl_wait_fence(struct drm_device *dev, void *data, struct msm_gpu_submitqueue *queue; int ret; - if (args->pad) { - DRM_ERROR("invalid pad: %08x\n", args->pad); + if (args->flags & ~MSM_WAIT_FENCE_FLAGS) { + DRM_ERROR("invalid flags: %08x\n", args->flags); return -EINVAL; } @@ -961,7 +965,7 @@ static int msm_ioctl_wait_fence(struct drm_device *dev, void *data, if (!queue) return -ENOENT; - ret = wait_fence(queue, args->fence, to_ktime(args->timeout)); + ret = wait_fence(queue, args->fence, to_ktime(args->timeout), args->flags); msm_submitqueue_put(queue); diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index 1dee0d18abbb..dd4a0d773f6e 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -846,6 +846,11 @@ int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout) op & MSM_PREP_NOSYNC ? 0 : timeout_to_jiffies(timeout); long ret; + if (op & MSM_PREP_BOOST) { + dma_resv_set_deadline(obj->resv, dma_resv_usage_rw(write), + ktime_get()); + } + ret = dma_resv_wait_timeout(obj->resv, dma_resv_usage_rw(write), true, remain); if (ret == 0) diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h index 329100016e7c..dbf0d6f43fa9 100644 --- a/include/uapi/drm/msm_drm.h +++ b/include/uapi/drm/msm_drm.h @@ -151,8 +151,13 @@ struct drm_msm_gem_info { #define MSM_PREP_READ 0x01 #define MSM_PREP_WRITE 0x02 #define MSM_PREP_NOSYNC 0x04 +#define MSM_PREP_BOOST 0x08 -#define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC) +#define MSM_PREP_FLAGS (MSM_PREP_READ | \ + MSM_PREP_WRITE | \ + MSM_PREP_NOSYNC | \ + MSM_PREP_BOOST | \ + 0) struct drm_msm_gem_cpu_prep { __u32 handle; /* in */ @@ -286,6 +291,11 @@ struct drm_msm_gem_submit { }; +#define MSM_WAIT_FENCE_BOOST 0x00000001 +#define MSM_WAIT_FENCE_FLAGS ( \ + MSM_WAIT_FENCE_BOOST | \ + 0) + /* The normal way to synchronize with the GPU is just to CPU_PREP on * a buffer if you need to access it from the CPU (other cmdstream * submission from same or other contexts, PAGE_FLIP ioctl, etc, all @@ -295,7 +305,7 @@ struct drm_msm_gem_submit { */ struct drm_msm_wait_fence { __u32 fence; /* in */ - __u32 pad; + __u32 flags; /* in, bitmask of MSM_WAIT_FENCE_x */ struct drm_msm_timespec timeout; /* in */ __u32 queueid; /* in, submitqueue id */ }; From patchwork Mon Feb 27 19:35:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13154133 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9976C7EE2D for ; Mon, 27 Feb 2023 19:36:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2678210E47A; Mon, 27 Feb 2023 19:36:47 +0000 (UTC) Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by gabe.freedesktop.org (Postfix) with ESMTPS id BBE4E10E4A6; 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Mon, 27 Feb 2023 11:36:26 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v7 14/15] drm/msm/atomic: Switch to vblank_start helper Date: Mon, 27 Feb 2023 11:35:20 -0800 Message-Id: <20230227193535.2822389-15-robdclark@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230227193535.2822389-1-robdclark@gmail.com> References: <20230227193535.2822389-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: open list , Liu Shixin , Rob Clark , Vinod Polimera , Luben Tuikov , "open list:DRM DRIVER FOR MSM ADRENO GPU" , =?utf-8?q?Christian_K=C3=B6nig?= , =?utf-8?q?Michel_D=C3=A4nzer?= , Abhinav Kumar , Stephen Boyd , Alex Deucher , Pekka Paalanen , Rodrigo Vivi , Sean Paul , Tvrtko Ursulin , Douglas Anderson , Dmitry Baryshkov , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Drop our custom thing and switch to drm_crtc_next_vblank_start() for calculating the time of the start of the next vblank period. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 15 --------------- drivers/gpu/drm/msm/msm_atomic.c | 8 +++++--- drivers/gpu/drm/msm/msm_kms.h | 8 -------- 3 files changed, 5 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index a683bd9b5a04..43996aecaf8c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -411,20 +411,6 @@ static void dpu_kms_disable_commit(struct msm_kms *kms) pm_runtime_put_sync(&dpu_kms->pdev->dev); } -static ktime_t dpu_kms_vsync_time(struct msm_kms *kms, struct drm_crtc *crtc) -{ - struct drm_encoder *encoder; - - drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) { - ktime_t vsync_time; - - if (dpu_encoder_vsync_time(encoder, &vsync_time) == 0) - return vsync_time; - } - - return ktime_get(); -} - static void dpu_kms_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *state) { @@ -953,7 +939,6 @@ static const struct msm_kms_funcs kms_funcs = { .irq = dpu_core_irq, .enable_commit = dpu_kms_enable_commit, .disable_commit = dpu_kms_disable_commit, - .vsync_time = dpu_kms_vsync_time, .prepare_commit = dpu_kms_prepare_commit, .flush_commit = dpu_kms_flush_commit, .wait_flush = dpu_kms_wait_flush, diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c index 1686fbb611fd..de7ce17489cc 100644 --- a/drivers/gpu/drm/msm/msm_atomic.c +++ b/drivers/gpu/drm/msm/msm_atomic.c @@ -186,8 +186,7 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) struct msm_kms *kms = priv->kms; struct drm_crtc *async_crtc = NULL; unsigned crtc_mask = get_crtc_mask(state); - bool async = kms->funcs->vsync_time && - can_do_async(state, &async_crtc); + bool async = can_do_async(state, &async_crtc); trace_msm_atomic_commit_tail_start(async, crtc_mask); @@ -231,7 +230,9 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) kms->pending_crtc_mask |= crtc_mask; - vsync_time = kms->funcs->vsync_time(kms, async_crtc); + if (!drm_crtc_next_vblank_start(async_crtc, &vsync_time)) + goto fallback; + wakeup_time = ktime_sub(vsync_time, ms_to_ktime(1)); msm_hrtimer_queue_work(&timer->work, wakeup_time, @@ -253,6 +254,7 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) return; } +fallback: /* * If there is any async flush pending on updated crtcs, fold * them into the current flush. diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index f8ed7588928c..086a3f1ff956 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -59,14 +59,6 @@ struct msm_kms_funcs { void (*enable_commit)(struct msm_kms *kms); void (*disable_commit)(struct msm_kms *kms); - /** - * If the kms backend supports async commit, it should implement - * this method to return the time of the next vsync. This is - * used to determine a time slightly before vsync, for the async - * commit timer to run and complete an async commit. - */ - ktime_t (*vsync_time)(struct msm_kms *kms, struct drm_crtc *crtc); - /** * Prepare for atomic commit. This is called after any previous * (async or otherwise) commit has completed. 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I think probably track the nearest deadline in + * rq->timeline and set timer to trigger boost accordingly? + */ + + intel_rps_boost(rq); +} + static signed long i915_fence_wait(struct dma_fence *fence, bool interruptible, signed long timeout) @@ -182,6 +201,7 @@ const struct dma_fence_ops i915_fence_ops = { .signaled = i915_fence_signaled, .wait = i915_fence_wait, .release = i915_fence_release, + .set_deadline = i915_fence_set_deadline, }; static void irq_execute_cb(struct irq_work *wrk)