From patchwork Tue Feb 28 10:40:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F32DC64EC7 for ; Tue, 28 Feb 2023 10:42:27 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWxR5-0006lM-06; Tue, 28 Feb 2023 05:42:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxQy-0006gR-Rx; Tue, 28 Feb 2023 05:42:14 -0500 Received: from bg4.exmail.qq.com ([43.155.65.254]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxQw-0002Wu-Q4; Tue, 28 Feb 2023 05:42:12 -0500 X-QQ-mid: bizesmtp84t1677580910tzp7u9xr Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:41:47 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 X-QQ-FEAT: swyrzWPvyR0xhBIGI0mxwzcwGMwozZSOCn94FbeJZYiuSYO/Xp+Jqimw90vx/ T3BgCLWlBNQ5QCsbxKngPUQeqVCNS+rLu5U/7rE6D+iWd1Icb2MPc5kOjtlkmpL/vccfooP NcRq6f1fwUM53upSYD+N3wSKEbcGhAARKH+jDSCbVNBmT0gvdSN/SeZoDCrkiGanga/MqTp xCr9bkPzNzizY3RdzHmB7Z0+i8zmewDxG6N3kZL7VaWRGGaNTGWeysksZP9Fp/Ok7kh7Z/K 1rskgrN30iJA8mq5KEsA/itQ26v3kUNU+EEM6FpKIJJkgROYTQBv7PAZ4gNylAZJbkHlW9C n+/K0sT3xw/Z82pzdARGlH/BvvusmrE4o99hVn2MzBa3v1DgvM= X-QQ-GoodBg: 0 From: Bin Meng To: qemu-devel@nongnu.org Cc: Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 01/18] target/riscv: gdbstub: Check priv spec version before reporting CSR Date: Tue, 28 Feb 2023 18:40:17 +0800 Message-Id: <20230228104035.1879882-2-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.155.65.254; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The gdbstub CSR XML is dynamically generated according to the result of the CSR predicate() result. This has been working fine until commit 7100fe6c2441 ("target/riscv: Enable privileged spec version 1.12") introduced the privilege spec version check in riscv_csrrw_check(). When debugging the 'sifive_u' machine whose priv spec is at 1.10, gdbstub reports priv spec 1.12 CSRs like menvcfg in the XML, hence we see "remote failure reply 'E14'" message when examining all CSRs via "info register system" from gdb. Add the priv spec version check in the CSR XML generation logic to fix this issue. Fixes: 7100fe6c2441 ("target/riscv: Enable privileged spec version 1.12") Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/gdbstub.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 6e7bbdbd5e..e57372db38 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -290,6 +290,9 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int base_reg) g_string_append_printf(s, ""); for (i = 0; i < CSR_TABLE_SIZE; i++) { + if (env->priv_ver < csr_ops[i].min_priv_ver) { + continue; + } predicate = csr_ops[i].predicate; if (predicate && (predicate(env, i) == RISCV_EXCP_NONE)) { if (csr_ops[i].name) { From patchwork Tue Feb 28 10:40:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154678 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E03D8C64EC7 for ; Tue, 28 Feb 2023 10:43:34 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWxS3-0000Kn-UN; Tue, 28 Feb 2023 05:43:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxRz-0000Js-BK; Tue, 28 Feb 2023 05:43:16 -0500 Received: from bg4.exmail.qq.com ([43.155.65.254]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxRv-0002hk-DJ; Tue, 28 Feb 2023 05:43:13 -0500 X-QQ-mid: bizesmtp75t1677580974tlrhbd44 Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:42:53 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 X-QQ-FEAT: ILHsT53NKPiUQCgNiBTgegFpxCkBwghMFOA/s+MvGmwhppJEhmfz7xSQzbiUi f80wu4S73G2cl/43O0VSTdlSsCDi+lE5TJ5i887ujAAfglDpiTp5rZkPJrZdB4KCslV3WeD yv3Bk9OPzHWHqcnCLTjFo0iW6NudrGgoMBqANFKhOxUYIW4eCKAUMwy5VMBoAGX8ny4IoeZ zoU+VVcJYycciTKJjlD44cUIJkMFWkOsRvRQz09EbMaliu9P1t2R6DMB2utwq32Vq7XKRSD PibYCE8A5fm7FBrSrN6zffwSLaNsBEuVC4+oko3vtStGSLb9oNI8fm2wnMVYAD0qO5yuBpX QNSklVZ3IY0oDmkW9kCuVW19p6GHK4/sQCEccAW0ebLzgFRdx0= X-QQ-GoodBg: 0 From: Bin Meng To: qemu-devel@nongnu.org Cc: Alistair Francis , Bin Meng , Daniel Henrique Barboza , Liu Zhiwei , Palmer Dabbelt , Weiwei Li , qemu-riscv@nongnu.org Subject: [PATCH v2 02/18] target/riscv: Add some comments to clarify the priority policy of riscv_csrrw_check() Date: Tue, 28 Feb 2023 18:40:18 +0800 Message-Id: <20230228104035.1879882-3-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.155.65.254; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The priority policy of riscv_csrrw_check() was once adjusted in commit eacaf4401956 ("target/riscv: Fix priority of csr related check in riscv_csrrw_check") whose commit message says the CSR existence check should come before the access control check, but the code changes did not agree with the commit message, that the predicate() check actually came after the read / write check. In fact this was intentional. Add some comments there so that people won't bother trying to change it without a solid reason. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- Changes in v2: - Keep the original priority policy, instead add some comments for clarification target/riscv/csr.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 75a540bfcb..4cc2c6370f 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -3776,11 +3776,12 @@ static inline RISCVException riscv_csrrw_check(CPURISCVState *env, int read_only = get_field(csrno, 0xC00) == 3; int csr_min_priv = csr_ops[csrno].min_priv_ver; - /* ensure the CSR extension is enabled. */ + /* ensure the CSR extension is enabled */ if (!cpu->cfg.ext_icsr) { return RISCV_EXCP_ILLEGAL_INST; } + /* privileged spec version check */ if (env->priv_ver < csr_min_priv) { return RISCV_EXCP_ILLEGAL_INST; } @@ -3790,10 +3791,18 @@ static inline RISCVException riscv_csrrw_check(CPURISCVState *env, return RISCV_EXCP_ILLEGAL_INST; } + /* read / write check */ if (write_mask && read_only) { return RISCV_EXCP_ILLEGAL_INST; } + /* + * The predicate() not only does existence check but also does some + * access control check which triggers for example virtual instruction + * exception in some cases. When writing read-only CSRs in those cases + * illegal instruction exception should be triggered instead of virtual + * instruction exception. Hence this comes after the read / write check. + */ RISCVException ret = csr_ops[csrno].predicate(env, csrno); if (ret != RISCV_EXCP_NONE) { return ret; From patchwork Tue Feb 28 10:40:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154679 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5AF9FC64ED6 for ; Tue, 28 Feb 2023 10:44:44 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWxT8-0001dp-Hb; Tue, 28 Feb 2023 05:44:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxT6-0001cx-Bf; Tue, 28 Feb 2023 05:44:24 -0500 Received: from bg4.exmail.qq.com ([43.154.221.58]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxT3-0002tI-J9; Tue, 28 Feb 2023 05:44:24 -0500 X-QQ-mid: bizesmtp84t1677581040t1m2frpy Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:43:57 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 X-QQ-FEAT: ILHsT53NKPjIAYFLn137NrqjAJubMJnmnFZLU9rTEdohw6iN/tKw3ke0FPK27 qVCkjCgvRXTXE5hIXB9122jac2qBXOIhbS7eHEqgtOOOuIKJaGeCaJksTn8CxNo95F+rFNY MJDeCWer+BXS7wpe2GMhwAohV5K9C3jqasvuOMntaaBoOobqW8Ax36GqWQOKy/3YLVa3xSc 8GhrWc0rkDG/WhnbRR/3+w9rQDWHxuCwd6Pu3c3QYZtKPwQHrIg1jGMwoFpkvcA8VN4VrIT fSU42B4VZV/jITPcNVjPYhv9aD7x3hCKmfsxMQMvZvVFW8GQZp/DSGIQmvD6R9ubaT7ILLs vCXqoOY16tvFCBqSEcAN3ERu3ARGH5ofDQ4Q+XO X-QQ-GoodBg: 0 From: Bin Meng To: qemu-devel@nongnu.org Cc: Alistair Francis , Bin Meng , Daniel Henrique Barboza , Liu Zhiwei , Palmer Dabbelt , Weiwei Li , qemu-riscv@nongnu.org Subject: [PATCH v2 03/18] target/riscv: Use g_assert() for the predicate() NULL check Date: Tue, 28 Feb 2023 18:40:19 +0800 Message-Id: <20230228104035.1879882-4-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.154.221.58; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org At present riscv_csrrw_check() checks the CSR predicate() against NULL and throws RISCV_EXCP_ILLEGAL_INST if it is NULL. But this is a pure software check, and has nothing to do with the emulation of the hardware behavior, thus it is inappropriate to return illegal instruction exception when software forgets to install the hook. Change to use g_assert() instead. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- Changes in v2: - new patch: Use assert() for the predicate() NULL check target/riscv/csr.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 4cc2c6370f..cfd7ffc5c2 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -3786,11 +3786,6 @@ static inline RISCVException riscv_csrrw_check(CPURISCVState *env, return RISCV_EXCP_ILLEGAL_INST; } - /* check predicate */ - if (!csr_ops[csrno].predicate) { - return RISCV_EXCP_ILLEGAL_INST; - } - /* read / write check */ if (write_mask && read_only) { return RISCV_EXCP_ILLEGAL_INST; @@ -3803,6 +3798,7 @@ static inline RISCVException riscv_csrrw_check(CPURISCVState *env, * illegal instruction exception should be triggered instead of virtual * instruction exception. Hence this comes after the read / write check. */ + g_assert(csr_ops[csrno].predicate != NULL); RISCVException ret = csr_ops[csrno].predicate(env, csrno); if (ret != RISCV_EXCP_NONE) { return ret; From patchwork Tue Feb 28 10:40:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4768AC64EC7 for ; Tue, 28 Feb 2023 10:45:48 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWxU4-0002gr-8a; Tue, 28 Feb 2023 05:45:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxU1-0002gO-RB; Tue, 28 Feb 2023 05:45:22 -0500 Received: from bg4.exmail.qq.com ([43.154.221.58]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxTz-0003KC-Vo; Tue, 28 Feb 2023 05:45:21 -0500 X-QQ-mid: bizesmtp66t1677581104teejqsck Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:45:03 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 X-QQ-FEAT: XBN7tc9DADIiKnjL71AgyfMs9KlQQOCupLSUV5+hZnNfGXc2yZaSpfu+wsShP EAl/mrdKriC37CGV5KnbruUXnVqWdQKNQ3zq6e6SuzOmShCV003zduKD2eqt/qp+OTnnqML wbzD3fF1RHn6f7+ed7+89X3heTLGIDlheLM4FEuR2ycA9asd+ED3sbNZDnqACwAZ0xCRd6M /xrS4Sfn1aqg6DZ/lSwEDbEUiu/50x1I4aKTrBPfnu2LZKM0lqdnkJndZdBU6uoevWdBbXN QYrL+QVYvGx0aV3IYowIgUDD65Gmmoy2JCmHsll0GYHspa9cmLfbLaChDsbarJkgwxE5ohW C29yfuYhxFjYH1PpZ/Vtj4OG4M+5qOdxAjo4uz428liNNFC+xk= X-QQ-GoodBg: 0 From: Bin Meng To: qemu-devel@nongnu.org Cc: Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 04/18] target/riscv: gdbstub: Minor change for better readability Date: Tue, 28 Feb 2023 18:40:20 +0800 Message-Id: <20230228104035.1879882-5-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.154.221.58; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use a variable 'base_reg' to represent cs->gdb_num_regs so that the call to ricsv_gen_dynamic_vector_xml() can be placed in one single line for better readability. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/gdbstub.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index e57372db38..704f3d6922 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -385,9 +385,9 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs) 32, "riscv-32bit-fpu.xml", 0); } if (env->misa_ext & RVV) { + int base_reg = cs->gdb_num_regs; gdb_register_coprocessor(cs, riscv_gdb_get_vector, riscv_gdb_set_vector, - ricsv_gen_dynamic_vector_xml(cs, - cs->gdb_num_regs), + ricsv_gen_dynamic_vector_xml(cs, base_reg), "riscv-vector.xml", 0); } switch (env->misa_mxl_max) { From patchwork Tue Feb 28 10:40:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154681 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE4E1C64ED6 for ; Tue, 28 Feb 2023 10:46:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWxVD-0003ii-LA; Tue, 28 Feb 2023 05:46:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxV9-0003Xf-Rr; Tue, 28 Feb 2023 05:46:32 -0500 Received: from bg4.exmail.qq.com ([43.155.65.254]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxV5-0003XV-W9; Tue, 28 Feb 2023 05:46:31 -0500 X-QQ-mid: bizesmtp85t1677581170tr84l4mw Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:46:07 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 X-QQ-FEAT: D2GZf6M6C/g6LR3Qn4xUcm+tmJy7LNIag81tPF45BkWK48pdQer2uuQhYkpja WuQfocvkZ33n4LKFaBQXl2G13jv+/iOZRKPprpzw8yZb8Ry72jYy9/jnN87DmDGYooZ6g/v xTafHOgRxUMbtUbbMZelTHxywjEs7+SdC8Vv78+a76u/0FhAAr5xZvUcmn/qfqAGnz0UUhA aXtppBh89YYdmrSkh5NLKkga8PjY51ryfqza5rvENVnrLQMiJMpV+gc7TlqAD2PmM/vvyAP VMvWy6X/EIsxUYbHYS6mbe3o39/LT20ZW1J5aW5rz8zlXJqHdOcWTdGmAxXWonaVzrxB45l atAJSMp18o4jRWmk6ZA/eT0U8jWaYuKvYraTFXvMY6siu4dz0o= X-QQ-GoodBg: 0 From: Bin Meng To: qemu-devel@nongnu.org Cc: Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 05/18] target/riscv: gdbstub: Do not generate CSR XML if Zicsr is disabled Date: Tue, 28 Feb 2023 18:40:21 +0800 Message-Id: <20230228104035.1879882-6-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.155.65.254; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org There is no need to generate the CSR XML if the Zicsr extension is not enabled. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/gdbstub.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 704f3d6922..294f0ceb1c 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -406,7 +406,10 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs) g_assert_not_reached(); } - gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr, - riscv_gen_dynamic_csr_xml(cs, cs->gdb_num_regs), - "riscv-csr.xml", 0); + if (cpu->cfg.ext_icsr) { + int base_reg = cs->gdb_num_regs; + gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr, + riscv_gen_dynamic_csr_xml(cs, base_reg), + "riscv-csr.xml", 0); + } } From patchwork Tue Feb 28 10:40:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154682 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94AF5C7EE2E for ; Tue, 28 Feb 2023 10:47:59 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWxWA-0005LA-4U; Tue, 28 Feb 2023 05:47:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxW8-0005Ki-Lz; Tue, 28 Feb 2023 05:47:32 -0500 Received: from bg4.exmail.qq.com ([43.155.65.254]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWxW6-0003xe-EI; Tue, 28 Feb 2023 05:47:32 -0500 X-QQ-mid: bizesmtp71t1677581234teljenir Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:47:12 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 X-QQ-FEAT: nA8mzCjPbKgVHkwH6S450zcro+Wuzi0qx+B7gHciUvrnZOdIujWNnHEt+BGYs AsZYPNydL9UA77txphqXAcbkt0V/rA7qj1kqCP4BI29G9d/27HPPhTdwOOTwQo/ChsYbTJN 1N8JC+zRIlmdby3tImqS4eXJtKAr/gxQmg7ZpmWGTuRje5keJDEx+pUcnbizWTFdQjIH7xZ lUHXKM9b/kxlelYnycoiel0j8EpCK2TSpNPt7eASHB3vUdw85D/qzxmPZLQ9DpxrtHtXtMI M+HUEvBCEDktGmE/jMQliKet/OsiU2cUv4VhrBNW0NfmILN05lNjzvB/OWJBpqOW/OHcUx8 rVU0iGmIuWxANLsJEBd2OympwyqQSVtL2tt7hS8l8hm0j2xJQc= X-QQ-GoodBg: 0 From: Bin Meng To: qemu-devel@nongnu.org Cc: Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 06/18] target/riscv: Coding style fixes in csr.c Date: Tue, 28 Feb 2023 18:40:22 +0800 Message-Id: <20230228104035.1879882-7-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.155.65.254; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Fix various places that violate QEMU coding style: - correct multi-line comment format - indent to opening parenthesis Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/csr.c | 62 ++++++++++++++++++++++++---------------------- 1 file changed, 32 insertions(+), 30 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index cfd7ffc5c2..6a82628749 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -963,7 +963,7 @@ static RISCVException sstc_32(CPURISCVState *env, int csrno) } static RISCVException read_vstimecmp(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val = env->vstimecmp; @@ -971,7 +971,7 @@ static RISCVException read_vstimecmp(CPURISCVState *env, int csrno, } static RISCVException read_vstimecmph(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val = env->vstimecmp >> 32; @@ -979,7 +979,7 @@ static RISCVException read_vstimecmph(CPURISCVState *env, int csrno, } static RISCVException write_vstimecmp(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { RISCVCPU *cpu = env_archcpu(env); @@ -996,7 +996,7 @@ static RISCVException write_vstimecmp(CPURISCVState *env, int csrno, } static RISCVException write_vstimecmph(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { RISCVCPU *cpu = env_archcpu(env); @@ -1020,7 +1020,7 @@ static RISCVException read_stimecmp(CPURISCVState *env, int csrno, } static RISCVException read_stimecmph(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { if (riscv_cpu_virt_enabled(env)) { *val = env->vstimecmp >> 32; @@ -1032,7 +1032,7 @@ static RISCVException read_stimecmph(CPURISCVState *env, int csrno, } static RISCVException write_stimecmp(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { RISCVCPU *cpu = env_archcpu(env); @@ -1055,7 +1055,7 @@ static RISCVException write_stimecmp(CPURISCVState *env, int csrno, } static RISCVException write_stimecmph(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { RISCVCPU *cpu = env_archcpu(env); @@ -1342,7 +1342,8 @@ static RISCVException write_misa(CPURISCVState *env, int csrno, /* 'E' excludes all other extensions */ if (val & RVE) { - /* when we support 'E' we can do "val = RVE;" however + /* + * when we support 'E' we can do "val = RVE;" however * for now we just drop writes if 'E' is present. */ return RISCV_EXCP_NONE; @@ -1361,7 +1362,8 @@ static RISCVException write_misa(CPURISCVState *env, int csrno, val &= ~RVD; } - /* Suppress 'C' if next instruction is not aligned + /* + * Suppress 'C' if next instruction is not aligned * TODO: this should check next_pc */ if ((val & RVC) && (GETPC() & ~3) != 0) { @@ -1830,28 +1832,28 @@ static RISCVException write_mscratch(CPURISCVState *env, int csrno, } static RISCVException read_mepc(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val = env->mepc; return RISCV_EXCP_NONE; } static RISCVException write_mepc(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { env->mepc = val; return RISCV_EXCP_NONE; } static RISCVException read_mcause(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val = env->mcause; return RISCV_EXCP_NONE; } static RISCVException write_mcause(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { env->mcause = val; return RISCV_EXCP_NONE; @@ -1873,14 +1875,14 @@ static RISCVException write_mtval(CPURISCVState *env, int csrno, /* Execution environment configuration setup */ static RISCVException read_menvcfg(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val = env->menvcfg; return RISCV_EXCP_NONE; } static RISCVException write_menvcfg(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask = MENVCFG_FIOM | MENVCFG_CBIE | MENVCFG_CBCFE | MENVCFG_CBZE; @@ -1893,14 +1895,14 @@ static RISCVException write_menvcfg(CPURISCVState *env, int csrno, } static RISCVException read_menvcfgh(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val = env->menvcfg >> 32; return RISCV_EXCP_NONE; } static RISCVException write_menvcfgh(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask = MENVCFG_PBMTE | MENVCFG_STCE; uint64_t valh = (uint64_t)val << 32; @@ -1911,7 +1913,7 @@ static RISCVException write_menvcfgh(CPURISCVState *env, int csrno, } static RISCVException read_senvcfg(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { RISCVException ret; @@ -1925,7 +1927,7 @@ static RISCVException read_senvcfg(CPURISCVState *env, int csrno, } static RISCVException write_senvcfg(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask = SENVCFG_FIOM | SENVCFG_CBIE | SENVCFG_CBCFE | SENVCFG_CBZE; RISCVException ret; @@ -1940,7 +1942,7 @@ static RISCVException write_senvcfg(CPURISCVState *env, int csrno, } static RISCVException read_henvcfg(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { RISCVException ret; @@ -1954,7 +1956,7 @@ static RISCVException read_henvcfg(CPURISCVState *env, int csrno, } static RISCVException write_henvcfg(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask = HENVCFG_FIOM | HENVCFG_CBIE | HENVCFG_CBCFE | HENVCFG_CBZE; RISCVException ret; @@ -1974,7 +1976,7 @@ static RISCVException write_henvcfg(CPURISCVState *env, int csrno, } static RISCVException read_henvcfgh(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { RISCVException ret; @@ -1988,7 +1990,7 @@ static RISCVException read_henvcfgh(CPURISCVState *env, int csrno, } static RISCVException write_henvcfgh(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask = HENVCFG_PBMTE | HENVCFG_STCE; uint64_t valh = (uint64_t)val << 32; @@ -2031,13 +2033,13 @@ static RISCVException write_mstateen0(CPURISCVState *env, int csrno, } static RISCVException write_mstateen_1_3(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { return write_mstateen(env, csrno, SMSTATEEN_STATEEN, new_val); } static RISCVException read_mstateenh(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val = env->mstateen[csrno - CSR_MSTATEEN0H] >> 32; @@ -2058,7 +2060,7 @@ static RISCVException write_mstateenh(CPURISCVState *env, int csrno, } static RISCVException write_mstateen0h(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { uint64_t wr_mask = SMSTATEEN_STATEEN | SMSTATEEN0_HSENVCFG; @@ -2066,7 +2068,7 @@ static RISCVException write_mstateen0h(CPURISCVState *env, int csrno, } static RISCVException write_mstateenh_1_3(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { return write_mstateenh(env, csrno, SMSTATEEN_STATEEN, new_val); } @@ -2103,7 +2105,7 @@ static RISCVException write_hstateen0(CPURISCVState *env, int csrno, } static RISCVException write_hstateen_1_3(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { return write_hstateen(env, csrno, SMSTATEEN_STATEEN, new_val); } @@ -2142,7 +2144,7 @@ static RISCVException write_hstateen0h(CPURISCVState *env, int csrno, } static RISCVException write_hstateenh_1_3(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { return write_hstateenh(env, csrno, SMSTATEEN_STATEEN, new_val); } @@ -3335,7 +3337,7 @@ static RISCVException read_mseccfg(CPURISCVState *env, int csrno, } static RISCVException write_mseccfg(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { mseccfg_csr_write(env, val); return RISCV_EXCP_NONE; From patchwork Tue Feb 28 10:40:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154846 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7D1F7C64EC7 for ; Tue, 28 Feb 2023 12:16:29 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWytw-00069C-DT; Tue, 28 Feb 2023 07:16:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWytt-00068p-NE; Tue, 28 Feb 2023 07:16:09 -0500 Received: from bg4.exmail.qq.com ([43.154.221.58]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWytq-0006r1-Se; Tue, 28 Feb 2023 07:16:09 -0500 X-QQ-Spam: true X-QQ-mid: bizesmtp84t1677581300tbk8dzk2 Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:48:17 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 From: Bin Meng To: qemu-devel@nongnu.org Cc: Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 07/18] target/riscv: Use 'bool' type for read_only Date: Tue, 28 Feb 2023 18:40:23 +0800 Message-Id: <20230228104035.1879882-8-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.154.221.58; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, PP_MIME_FAKE_ASCII_TEXT=0.001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The read_only variable is currently declared as an 'int', but it should really be a 'bool'. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/csr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 6a82628749..9264db6110 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -3775,7 +3775,7 @@ static inline RISCVException riscv_csrrw_check(CPURISCVState *env, RISCVCPU *cpu) { /* check privileges and return RISCV_EXCP_ILLEGAL_INST if check fails */ - int read_only = get_field(csrno, 0xC00) == 3; + bool read_only = get_field(csrno, 0xC00) == 3; int csr_min_priv = csr_ops[csrno].min_priv_ver; /* ensure the CSR extension is enabled */ From patchwork Tue Feb 28 10:40:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154849 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9B6AC7EE2E for ; Tue, 28 Feb 2023 12:17:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWyu0-0006AL-1t; Tue, 28 Feb 2023 07:16:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWytx-00069i-Gt; Tue, 28 Feb 2023 07:16:15 -0500 Received: from bg4.exmail.qq.com ([43.154.221.58]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWytv-0006t5-7y; Tue, 28 Feb 2023 07:16:12 -0500 X-QQ-Spam: true X-QQ-mid: bizesmtp75t1677581364tvua4szi Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:49:22 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 From: Bin Meng To: qemu-devel@nongnu.org Cc: Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 08/18] target/riscv: Simplify {read, write}_pmpcfg() a little bit Date: Tue, 28 Feb 2023 18:40:24 +0800 Message-Id: <20230228104035.1879882-9-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.154.221.58; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use the register index that has already been calculated in the pmpcfg_csr_{read,write} call. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/csr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 9264db6110..a3e0e5755c 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -3360,7 +3360,7 @@ static RISCVException read_pmpcfg(CPURISCVState *env, int csrno, if (!check_pmp_reg_index(env, reg_index)) { return RISCV_EXCP_ILLEGAL_INST; } - *val = pmpcfg_csr_read(env, csrno - CSR_PMPCFG0); + *val = pmpcfg_csr_read(env, reg_index); return RISCV_EXCP_NONE; } @@ -3372,7 +3372,7 @@ static RISCVException write_pmpcfg(CPURISCVState *env, int csrno, if (!check_pmp_reg_index(env, reg_index)) { return RISCV_EXCP_ILLEGAL_INST; } - pmpcfg_csr_write(env, csrno - CSR_PMPCFG0, val); + pmpcfg_csr_write(env, reg_index, val); return RISCV_EXCP_NONE; } From patchwork Tue Feb 28 10:40:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E205C64EC7 for ; Tue, 28 Feb 2023 12:17:44 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWyuE-0006Gj-0N; Tue, 28 Feb 2023 07:16:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWyuC-0006Ct-6B; Tue, 28 Feb 2023 07:16:28 -0500 Received: from bg4.exmail.qq.com ([43.154.221.58]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWyuA-0006vB-1k; Tue, 28 Feb 2023 07:16:27 -0500 X-QQ-Spam: true X-QQ-mid: bizesmtp78t1677581429tzmg1wgm Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:50:26 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 From: Bin Meng To: qemu-devel@nongnu.org Cc: Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 09/18] target/riscv: Simplify getting RISCVCPU pointer from env Date: Tue, 28 Feb 2023 18:40:25 +0800 Message-Id: <20230228104035.1879882-10-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.154.221.58; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use env_archcpu() to get RISCVCPU pointer from env directly. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/csr.c | 36 ++++++++++++------------------------ 1 file changed, 12 insertions(+), 24 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index a3e0e5755c..8e827362cc 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -46,8 +46,7 @@ static RISCVException smstateen_acc_ok(CPURISCVState *env, int index, uint64_t bit) { bool virt = riscv_cpu_virt_enabled(env); - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); if (env->priv == PRV_M || !cpu->cfg.ext_smstateen) { return RISCV_EXCP_NONE; @@ -90,8 +89,7 @@ static RISCVException fs(CPURISCVState *env, int csrno) static RISCVException vs(CPURISCVState *env, int csrno) { - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); if (env->misa_ext & RVV || cpu->cfg.ext_zve32f || cpu->cfg.ext_zve64f) { @@ -108,8 +106,7 @@ static RISCVException vs(CPURISCVState *env, int csrno) static RISCVException ctr(CPURISCVState *env, int csrno) { #if !defined(CONFIG_USER_ONLY) - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); int ctr_index; target_ulong ctr_mask; int base_csrno = CSR_CYCLE; @@ -166,8 +163,7 @@ static RISCVException ctr32(CPURISCVState *env, int csrno) #if !defined(CONFIG_USER_ONLY) static RISCVException mctr(CPURISCVState *env, int csrno) { - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); int ctr_index; int base_csrno = CSR_MHPMCOUNTER3; @@ -195,8 +191,7 @@ static RISCVException mctr32(CPURISCVState *env, int csrno) static RISCVException sscofpmf(CPURISCVState *env, int csrno) { - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); if (!cpu->cfg.ext_sscofpmf) { return RISCV_EXCP_ILLEGAL_INST; @@ -321,8 +316,7 @@ static RISCVException umode32(CPURISCVState *env, int csrno) static RISCVException mstateen(CPURISCVState *env, int csrno) { - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); if (!cpu->cfg.ext_smstateen) { return RISCV_EXCP_ILLEGAL_INST; @@ -333,8 +327,7 @@ static RISCVException mstateen(CPURISCVState *env, int csrno) static RISCVException hstateen_pred(CPURISCVState *env, int csrno, int base) { - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); if (!cpu->cfg.ext_smstateen) { return RISCV_EXCP_ILLEGAL_INST; @@ -363,8 +356,7 @@ static RISCVException sstateen(CPURISCVState *env, int csrno) { bool virt = riscv_cpu_virt_enabled(env); int index = csrno - CSR_SSTATEEN0; - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); if (!cpu->cfg.ext_smstateen) { return RISCV_EXCP_ILLEGAL_INST; @@ -918,8 +910,7 @@ static RISCVException read_timeh(CPURISCVState *env, int csrno, static RISCVException sstc(CPURISCVState *env, int csrno) { - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); bool hmode_check = false; if (!cpu->cfg.ext_sstc || !env->rdtime_fn) { @@ -1152,8 +1143,7 @@ static RISCVException write_ignore(CPURISCVState *env, int csrno, static RISCVException read_mvendorid(CPURISCVState *env, int csrno, target_ulong *val) { - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); *val = cpu->cfg.mvendorid; return RISCV_EXCP_NONE; @@ -1162,8 +1152,7 @@ static RISCVException read_mvendorid(CPURISCVState *env, int csrno, static RISCVException read_marchid(CPURISCVState *env, int csrno, target_ulong *val) { - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); *val = cpu->cfg.marchid; return RISCV_EXCP_NONE; @@ -1172,8 +1161,7 @@ static RISCVException read_marchid(CPURISCVState *env, int csrno, static RISCVException read_mimpid(CPURISCVState *env, int csrno, target_ulong *val) { - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); *val = cpu->cfg.mimpid; return RISCV_EXCP_NONE; From patchwork Tue Feb 28 10:40:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154847 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 55BCFC64EC7 for ; Tue, 28 Feb 2023 12:16:54 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWyuL-0006Ks-P4; Tue, 28 Feb 2023 07:16:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWyuK-0006J3-F0; Tue, 28 Feb 2023 07:16:36 -0500 Received: from bg4.exmail.qq.com ([43.154.221.58]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWyuI-0006xI-Au; Tue, 28 Feb 2023 07:16:35 -0500 X-QQ-Spam: true X-QQ-mid: bizesmtp68t1677581494t0y4o8vr Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:51:32 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 From: Bin Meng To: qemu-devel@nongnu.org Cc: Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 10/18] target/riscv: Avoid reporting odd-numbered pmpcfgX in the CSR XML for RV64 Date: Tue, 28 Feb 2023 18:40:26 +0800 Message-Id: <20230228104035.1879882-11-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.154.221.58; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org At present the odd-numbered PMP configuration registers for RV64 are reported in the CSR XML by QEMU gdbstub. However these registers do not exist on RV64 so trying to access them from gdb results in 'E14'. Move the pmpcfgX index check from the actual read/write routine to the PMP CSR predicate() routine, so that non-existent pmpcfgX won't be reported in the CSR XML for RV64. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- Changes in v2: - keep the 'RV128 restriction check' todo comment target/riscv/csr.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 8e827362cc..7284fd8a0d 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -412,6 +412,15 @@ static int aia_hmode32(CPURISCVState *env, int csrno) static RISCVException pmp(CPURISCVState *env, int csrno) { if (riscv_cpu_cfg(env)->pmp) { + if (csrno <= CSR_PMPCFG3) { + uint32_t reg_index = csrno - CSR_PMPCFG0; + + /* TODO: RV128 restriction check */ + if ((reg_index & 1) && (riscv_cpu_mxl(env) == MXL_RV64)) { + return RISCV_EXCP_ILLEGAL_INST; + } + } + return RISCV_EXCP_NONE; } @@ -3331,23 +3340,11 @@ static RISCVException write_mseccfg(CPURISCVState *env, int csrno, return RISCV_EXCP_NONE; } -static bool check_pmp_reg_index(CPURISCVState *env, uint32_t reg_index) -{ - /* TODO: RV128 restriction check */ - if ((reg_index & 1) && (riscv_cpu_mxl(env) == MXL_RV64)) { - return false; - } - return true; -} - static RISCVException read_pmpcfg(CPURISCVState *env, int csrno, target_ulong *val) { uint32_t reg_index = csrno - CSR_PMPCFG0; - if (!check_pmp_reg_index(env, reg_index)) { - return RISCV_EXCP_ILLEGAL_INST; - } *val = pmpcfg_csr_read(env, reg_index); return RISCV_EXCP_NONE; } @@ -3357,9 +3354,6 @@ static RISCVException write_pmpcfg(CPURISCVState *env, int csrno, { uint32_t reg_index = csrno - CSR_PMPCFG0; - if (!check_pmp_reg_index(env, reg_index)) { - return RISCV_EXCP_ILLEGAL_INST; - } pmpcfg_csr_write(env, reg_index, val); return RISCV_EXCP_NONE; } From patchwork Tue Feb 28 10:40:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154848 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 857F7C64ED6 for ; Tue, 28 Feb 2023 12:17:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWyue-0006Zj-TV; Tue, 28 Feb 2023 07:16:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWyuZ-0006R5-B4; Tue, 28 Feb 2023 07:16:52 -0500 Received: from bg4.exmail.qq.com ([43.154.221.58]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWyuX-0006zc-7M; Tue, 28 Feb 2023 07:16:51 -0500 X-QQ-Spam: true X-QQ-mid: bizesmtp78t1677581559tdv8kvki Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 28 Feb 2023 18:52:36 +0800 (CST) X-QQ-SSF: 01200000000000D0E000000A0000000 From: Bin Meng To: qemu-devel@nongnu.org Cc: Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 11/18] target/riscv: gdbstub: Turn on debugger mode before calling CSR predicate() Date: Tue, 28 Feb 2023 18:40:27 +0800 Message-Id: <20230228104035.1879882-12-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-1-bmeng@tinylab.org> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass client-ip=43.154.221.58; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Since commit 94452ac4cf26 ("target/riscv: remove fflags, frm, and fcsr from riscv-*-fpu.xml") the 3 FPU CSRs are removed from the XML target decription. The original intent of that commit was based on the assumption that the 3 FPU CSRs will show up in the riscv-csr.xml so the ones in riscv-*-fpu.xml are redundant. But unforuantely that is not true. As the FPU CSR predicate() has a run-time check on MSTATUS.FS, at the time when CSR XML is generated MSTATUS.FS is unset, hence no FPU CSRs will be reported. The FPU CSR predicate() already considered such a case of being accessed by a debugger. All we need to do is to turn on debugger mode before calling predicate(). Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/gdbstub.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 294f0ceb1c..ef52f41460 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -280,6 +280,10 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int base_reg) int bitsize = 16 << env->misa_mxl_max; int i; +#if !defined(CONFIG_USER_ONLY) + env->debugger = true; +#endif + /* Until gdb knows about 128-bit registers */ if (bitsize > 64) { bitsize = 64; @@ -308,6 +312,11 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int base_reg) g_string_append_printf(s, ""); cpu->dyn_csr_xml = g_string_free(s, false); + +#if !defined(CONFIG_USER_ONLY) + env->debugger = false; +#endif + return CSR_TABLE_SIZE; } From patchwork Tue Feb 28 13:45:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154899 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1A52C64EC7 for ; Tue, 28 Feb 2023 13:46:43 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pX0Ip-0001IV-RM; Tue, 28 Feb 2023 08:45:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pX0Ig-0000ud-0q; Tue, 28 Feb 2023 08:45:50 -0500 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pX0Id-00031L-DP; Tue, 28 Feb 2023 08:45:48 -0500 Received: by mail-pl1-x629.google.com with SMTP id v11so6936894plz.8; Tue, 28 Feb 2023 05:45:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ev2CVyKGsCzMKHUvLG0iHRpibO1vkQP9ZxUX3Vfk3Ao=; b=POapXY1ccbaJRiv+Q98IlkPbzlu6mP+ecZDqBzD8XmQX1YwZxSLLoAXe2jaH1EHivI kd4gKCfC0IuzXwMxzkp7o6VjFj3S4fIRT1U7rAFwCqG+NAU+iV5sKLl8prxdsX8M+HiH ZYrp9uuqopa12BT8kDji2VvH/PIeM/pdhq/aOqBcfdhMyGMoCHnqK9ZwVEGiyuxpP6QX xGQI4lMXjz2KR9AqVCUvYSmVFo9yDSlEljSFAa21O49VHl6aXIuDgGixyXkzyMOSmDxS xSKnhNxNGY6OvC10QnaVwREPOG/Mi18yxCXcgZtcpJ2769fTSO/vLbSi/3YrMypv8JDy l+nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ev2CVyKGsCzMKHUvLG0iHRpibO1vkQP9ZxUX3Vfk3Ao=; b=mWb3oi8eLh3NGmhFX3VJxcCoztCclhWN8hCNkWq9AX/3MBdlo3TVdqJNfNMJvZ/N1a 0HxxynMVtiacq0WR3EnWWx2QKu3QL3/Iz6BSAl/MMIvDl4kBwu/smES6aFWdw5D5g8T6 s74tPHV5w5B/NdVq9bbuFZv1C6CbLhx6/2gOiXm8vSmTMZbRM82Gnl+kRTkLMJxkK79o PVn3g+hxU7xxAkZw96ldK6jUg70VlvxE/p6qO0QehjcLCJcHFXdbKV9s7vQMFmBDXoGd l4p4D0MHxi7gOtjBs4meUaojYTJxZrsV8i7qOpmDZcknlIxPLAIlpsHWpZY0kNG6JvDi uCbw== X-Gm-Message-State: AO0yUKWROWc4JFkYUVdWSKX/vMYItLyqMal5ovsN0e9vu/bOP5pP3tBG BtTNu9aKjMgzGFQtM1REPpks9CxJYuE= X-Google-Smtp-Source: AK7set+H3N0ha7BWntU9uEHgBWaEUIUaPMj23WZfrL8DC2TiKRogo9Hn08/BT1fiwUFI0OnwB5qmPw== X-Received: by 2002:a17:902:e54c:b0:19d:121a:6795 with SMTP id n12-20020a170902e54c00b0019d121a6795mr3547144plf.55.1677591941026; Tue, 28 Feb 2023 05:45:41 -0800 (PST) Received: from ubuntu.. (144.168.56.201.16clouds.com. [144.168.56.201]) by smtp.gmail.com with ESMTPSA id j2-20020a170902758200b0019b06263bcasm1556896pll.247.2023.02.28.05.45.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:45:40 -0800 (PST) From: Bin Meng To: qemu-devel@nongnu.org Cc: Bin Meng , Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 12/18] target/riscv: gdbstub: Drop the vector CSRs in riscv-vector.xml Date: Tue, 28 Feb 2023 21:45:29 +0800 Message-Id: <20230228104035.1879882-13-bmeng@tinylab.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=bmeng.cn@gmail.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bin Meng It's worth noting that the vector CSR predicate() has a similar run-time check logic to the FPU CSR. With the previous patch our gdbstub can correctly report these vector CSRs via the CSR xml. Commit 719d3561b269 ("target/riscv: gdb: support vector registers for rv64 & rv32") inserted these vector CSRs in an ad-hoc, non-standard way in the riscv-vector.xml. Now we can treat these CSRs no different from other CSRs. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/gdbstub.c | 75 ------------------------------------------ 1 file changed, 75 deletions(-) diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index ef52f41460..6048541606 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -127,40 +127,6 @@ static int riscv_gdb_set_fpu(CPURISCVState *env, uint8_t *mem_buf, int n) return 0; } -/* - * Convert register index number passed by GDB to the correspond - * vector CSR number. Vector CSRs are defined after vector registers - * in dynamic generated riscv-vector.xml, thus the starting register index - * of vector CSRs is 32. - * Return 0 if register index number is out of range. - */ -static int riscv_gdb_vector_csrno(int num_regs) -{ - /* - * The order of vector CSRs in the switch case - * should match with the order defined in csr_ops[]. - */ - switch (num_regs) { - case 32: - return CSR_VSTART; - case 33: - return CSR_VXSAT; - case 34: - return CSR_VXRM; - case 35: - return CSR_VCSR; - case 36: - return CSR_VL; - case 37: - return CSR_VTYPE; - case 38: - return CSR_VLENB; - default: - /* Unknown register. */ - return 0; - } -} - static int riscv_gdb_get_vector(CPURISCVState *env, GByteArray *buf, int n) { uint16_t vlenb = env_archcpu(env)->cfg.vlen >> 3; @@ -174,19 +140,6 @@ static int riscv_gdb_get_vector(CPURISCVState *env, GByteArray *buf, int n) return cnt; } - int csrno = riscv_gdb_vector_csrno(n); - - if (!csrno) { - return 0; - } - - target_ulong val = 0; - int result = riscv_csrrw_debug(env, csrno, &val, 0, 0); - - if (result == RISCV_EXCP_NONE) { - return gdb_get_regl(buf, val); - } - return 0; } @@ -201,19 +154,6 @@ static int riscv_gdb_set_vector(CPURISCVState *env, uint8_t *mem_buf, int n) return vlenb; } - int csrno = riscv_gdb_vector_csrno(n); - - if (!csrno) { - return 0; - } - - target_ulong val = ldtul_p(mem_buf); - int result = riscv_csrrw_debug(env, csrno, NULL, val, -1); - - if (result == RISCV_EXCP_NONE) { - return sizeof(target_ulong); - } - return 0; } @@ -361,21 +301,6 @@ static int ricsv_gen_dynamic_vector_xml(CPUState *cs, int base_reg) num_regs++; } - /* Define vector CSRs */ - const char *vector_csrs[7] = { - "vstart", "vxsat", "vxrm", "vcsr", - "vl", "vtype", "vlenb" - }; - - for (i = 0; i < 7; i++) { - g_string_append_printf(s, - "", - vector_csrs[i], TARGET_LONG_BITS, base_reg++); - num_regs++; - } - g_string_append_printf(s, ""); cpu->dyn_vreg_xml = g_string_free(s, false); From patchwork Tue Feb 28 13:45:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154898 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CF484C64EC7 for ; Tue, 28 Feb 2023 13:46:29 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pX0Il-00012T-Ll; Tue, 28 Feb 2023 08:45:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pX0Ig-0000uc-0s; Tue, 28 Feb 2023 08:45:50 -0500 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pX0Id-00030O-DM; Tue, 28 Feb 2023 08:45:48 -0500 Received: by mail-pl1-x636.google.com with SMTP id y11so6322575plg.1; Tue, 28 Feb 2023 05:45:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+JQ8rEzvJy2Hr5RXjOLFBE9vHB7yL2eNsfyaqnmJxNA=; b=eoCpnsHO0L0n8035E9IvdDG9FHFeyEbTdosQxw2ytM3XWdUiwyBjF5qGcUsxjirU2s Vjf8l5RSgDRmwsrp7whB1HVTOm18ynUAJU2NNE/LHBj/lYsafILU5ZUedpZOqj9cjOR5 6XvMEbGan6613WWqp3m5fb68c9yhMgE2VlHUYMQyzwhuS/6e42iUmtD8jke8l4MTQgBt AyYm9vj+URlK9DHpjzx7cPVXGw9cvQGDo8mmotNSLe5VZh0Iizzwh24wBqbiivXPiAzb uEQiDf0ylDqwofTlivV3KZo42/SJ/AVC+fs+zlrqAaMP+hFzzroL2vHGBCaDOL8XUutD xmUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+JQ8rEzvJy2Hr5RXjOLFBE9vHB7yL2eNsfyaqnmJxNA=; b=G0IDJUTEUL715TrepAODqB8wY3PQK6tWBajXL+CXvngAd2LrW9n+S/3gEu2intmKxG VVipTBr2WDEvPED/TLSFIiX+C1dnW53BDqEfuJFHK54vBxrH4x1yJ8EN7j37ueabCvx3 T+0B19oN+pvu/VwKy+WdE4gCnjVmd4Pmv6aE6eJ2FnsSN5RGditmLObUM6lsiuoDuqAG U34xfc+kvRRf+S4kghNUxpznZPrlG8eVQdsWb3t8uYx3UmipuQf5o4JOnn5XHRW5fzHm Q9kR9AbYzjYcRqNou5/qJ+ORdDvBZuuN/taA6Qoh7LT5kt9PhSgaRslxNZwalurjgQtj apyA== X-Gm-Message-State: AO0yUKWudrVdxEZX7k6MGR855GnPZgVK8HBVvaC/xtfdqePqvZk6cRSn aBXs9bxZliPIE1EbAAxTE+8UOx0IicE= X-Google-Smtp-Source: AK7set+GtsH07DwCd2HZkr8Dcy5sljZ8Nn3x4a8+vVfKzPShsp0JqBdxjpvRc2a7DKhpH0WNe5oQFQ== X-Received: by 2002:a17:902:e888:b0:19c:df17:b724 with SMTP id w8-20020a170902e88800b0019cdf17b724mr3186049plg.58.1677591944665; Tue, 28 Feb 2023 05:45:44 -0800 (PST) Received: from ubuntu.. (144.168.56.201.16clouds.com. [144.168.56.201]) by smtp.gmail.com with ESMTPSA id j2-20020a170902758200b0019b06263bcasm1556896pll.247.2023.02.28.05.45.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:45:43 -0800 (PST) From: Bin Meng To: qemu-devel@nongnu.org Cc: Bin Meng , Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 13/18] target/riscv: Allow debugger to access user timer and counter CSRs Date: Tue, 28 Feb 2023 21:45:30 +0800 Message-Id: <20230228104035.1879882-14-bmeng@tinylab.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-13-bmeng@tinylab.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=bmeng.cn@gmail.com; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bin Meng At present user timer and counter CSRs are not reported in the CSR XML hence gdb cannot access them. Fix it by adding a debugger check in their predicate() routine. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/csr.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 7284fd8a0d..10ae5df5e6 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -131,6 +131,10 @@ static RISCVException ctr(CPURISCVState *env, int csrno) skip_ext_pmu_check: + if (env->debugger) { + return RISCV_EXCP_NONE; + } + if (env->priv < PRV_M && !get_field(env->mcounteren, ctr_mask)) { return RISCV_EXCP_ILLEGAL_INST; } From patchwork Tue Feb 28 13:45:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154902 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DEA84C64EC7 for ; Tue, 28 Feb 2023 13:47:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pX0Iq-0001Jq-0E; Tue, 28 Feb 2023 08:46:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pX0Ih-0000ui-Gs; Tue, 28 Feb 2023 08:45:51 -0500 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pX0Ig-000333-1s; Tue, 28 Feb 2023 08:45:51 -0500 Received: by mail-pj1-x1034.google.com with SMTP id kb15so9888929pjb.1; Tue, 28 Feb 2023 05:45:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MXGNi2tLHwZAenMcO4/YfQUnHO4lOiCQcI1eieMiol0=; b=bNnbHpHyyI2xqw1cJVADCObmakJa5DRHJu1lzB7TqCppvl/omQHL/iFhoEPlDJMN6z Tj/EpAE0LQDPZgbSj2gRvkTr9txd2IvrXaU7D+CJbgKa0kXlMkRqGA5zHfYjcVBL3OB+ MeGblLXhjDg4hMIqXIzjjapa95WX+auHVl2bkwGXtvCatuWySnbbX9zufk8xeHYqFNBP Lf+d0Ch9J7yTrbbeQ2cnjVQ28wcN7a92ye6TDI247rZOd7GMpdTBVwtFVeFhg+pAqxNp oZ19bBwiK+fblWhWLUzwzwAVCldN9O8TzKPFViqdTDRHA2UQIjU1qeiTkuinKgFfEmyz TfXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MXGNi2tLHwZAenMcO4/YfQUnHO4lOiCQcI1eieMiol0=; b=kr1mwEvb/1XcM8hd3UVvYe83VAevNrpb4RiO4zgtBoL+jN7mCkmyYTg9GGHxiOKnKC 9ynLqstjkJ4a90x5OKiB9jMID7TWB7nGs7jvDIRjCnaAtRaLmR4gOAwMU/Bk4SSDDGUV ImnNPZwJ/Xftv/co/DqQtV/V/I5kGkW9b7bC238n+uD9xd2VXN84Y35oB8nCA4iL8WSd zL66tuar2NFQ47Fpp6TlybFyv+e4BbL3GXpcW271KU7N/azZ0FvFRKse7fszCZMgFXMP 3USfi1J/IEUqyRH35uMYRaZF4D7D9FGGHS+YCrxXOgW/7XDLW9gpSa51BakpNK43Ysue 7M/A== X-Gm-Message-State: AO0yUKUb92Gc3qCXbM7mTzpGecB4uSAdDLVFudSnzdri70vPILE7KVuU Vx0up5das/TDaRKmb7KFtr//vMXRowE= X-Google-Smtp-Source: AK7set/UG7BajDOYOZ1abtdDOvO5cQsZXPsBIfvGIucmMypOGaL5Hxz9p/E8KLdg6So3Yh8XgEBMzw== X-Received: by 2002:a17:903:684:b0:19d:90f:6c2a with SMTP id ki4-20020a170903068400b0019d090f6c2amr2139930plb.6.1677591947893; Tue, 28 Feb 2023 05:45:47 -0800 (PST) Received: from ubuntu.. (144.168.56.201.16clouds.com. [144.168.56.201]) by smtp.gmail.com with ESMTPSA id j2-20020a170902758200b0019b06263bcasm1556896pll.247.2023.02.28.05.45.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:45:47 -0800 (PST) From: Bin Meng To: qemu-devel@nongnu.org Cc: Bin Meng , Weiwei Li , LIU Zhiwei , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 14/18] target/riscv: Allow debugger to access seed CSR Date: Tue, 28 Feb 2023 21:45:31 +0800 Message-Id: <20230228104035.1879882-15-bmeng@tinylab.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-13-bmeng@tinylab.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=bmeng.cn@gmail.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bin Meng At present seed CSR is not reported in the CSR XML hence gdb cannot access it. Fix it by adding a debugger check in its predicate() routine. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/csr.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 10ae5df5e6..15b23b9b5a 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -459,6 +459,10 @@ static RISCVException seed(CPURISCVState *env, int csrno) } #if !defined(CONFIG_USER_ONLY) + if (env->debugger) { + return RISCV_EXCP_NONE; + } + /* * With a CSR read-write instruction: * 1) The seed CSR is always available in machine mode as normal. From patchwork Tue Feb 28 13:45:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154903 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CF010C64EC7 for ; Tue, 28 Feb 2023 13:47:44 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pX0It-0001QD-Lw; Tue, 28 Feb 2023 08:46:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pX0Il-00013L-EV; Tue, 28 Feb 2023 08:45:55 -0500 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pX0Ij-00033w-4y; Tue, 28 Feb 2023 08:45:54 -0500 Received: by mail-pl1-x633.google.com with SMTP id z2so10432876plf.12; Tue, 28 Feb 2023 05:45:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NXpahm61NdsjIRSTpCN3GHFbnIivzdv2HgYB2NsPiRg=; b=OsNbmKLFCXctTvgAg1n1W+FpXZDqTn7F2cNHetBUK1Tnpc7UVCmCgOBn3ef8oheS1h kU0eWlQdFc3mgFTpvTH8G71GaNavbfj2Mlj/vIL3md/v6fEhVv7LOUMeL467YzWh9p6Y rOxsmIZW0MrdxamVsfPiedrQdlSbCLM5nR7GD+ht4dMi8F7SxYAz8c311R5QQKObbZm3 /oT7yV1/H+qq+Oqz4teYZrByOsErRKhHcmMcK/qBk6TTS7nYS7Au69kP8kG2pgyyVj12 +0ul9kGRuB3xEsqH7VwzDUCpLy8KxlwbKD+yvRGdmV1nbdqCy9tjCQv6l8CS+NKMRbm6 J+Eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NXpahm61NdsjIRSTpCN3GHFbnIivzdv2HgYB2NsPiRg=; b=xQ0lOF1Bxn+vmKhrI7JY/EMSqmNFBu7dQnYBvNORyxYjKI83MTBHaiehd7ck7IMDfx 7IJyCk06IZfBIdRpusELB5K42h2KPShH6PO3kihsURP/kS8fySpwpolZRE281onWvGQp 7E9EeXz+VjOExriWOjvW6rv460inm6Ciy9l1URs8SyhJm/UbJYbA2VmjqQXV+OgXWTF8 jfRkdaQImTONhjpqojlW2exWodPAUT4UFtlth1dU1SrAwgWkys/KJWWtmuJyGVVk0sAV +EcWQhRF/fkN2knjA3upopIOcDDfJhSg15Ona0s2qjGFVSjs5iQMCUJjyPqGUyH0hi8w cA9A== X-Gm-Message-State: AO0yUKVZOeoHsjDRDh3juWBsKtwwGlu3n1wEIdEUlNVkrJWocRr4Lyq8 iFO6aI/OnfavlYycaRACEu8IbohffGs= X-Google-Smtp-Source: AK7set9Cmcyl5eTode/MaO321bQg0h6cyny506paWWac6xGjJH3bcmPlQyPnOmMQovHfIMEOxrAbeQ== X-Received: by 2002:a17:903:32d0:b0:199:4a00:9788 with SMTP id i16-20020a17090332d000b001994a009788mr3311717plr.19.1677591951280; Tue, 28 Feb 2023 05:45:51 -0800 (PST) Received: from ubuntu.. (144.168.56.201.16clouds.com. [144.168.56.201]) by smtp.gmail.com with ESMTPSA id j2-20020a170902758200b0019b06263bcasm1556896pll.247.2023.02.28.05.45.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:45:50 -0800 (PST) From: Bin Meng To: qemu-devel@nongnu.org Cc: Bin Meng , Weiwei Li , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Liu Zhiwei , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 15/18] target/riscv: Allow debugger to access {h, s}stateen CSRs Date: Tue, 28 Feb 2023 21:45:32 +0800 Message-Id: <20230228104035.1879882-16-bmeng@tinylab.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-13-bmeng@tinylab.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=bmeng.cn@gmail.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bin Meng At present {h,s}stateen CSRs are not reported in the CSR XML hence gdb cannot access them. Fix it by adjusting their predicate() routine logic so that the static config check comes before the run-time check, as well as adding a debugger check. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/csr.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 15b23b9b5a..a0e70f5ba0 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -337,13 +337,22 @@ static RISCVException hstateen_pred(CPURISCVState *env, int csrno, int base) return RISCV_EXCP_ILLEGAL_INST; } + RISCVException ret = hmode(env, csrno); + if (ret != RISCV_EXCP_NONE) { + return ret; + } + + if (env->debugger) { + return RISCV_EXCP_NONE; + } + if (env->priv < PRV_M) { if (!(env->mstateen[csrno - base] & SMSTATEEN_STATEEN)) { return RISCV_EXCP_ILLEGAL_INST; } } - return hmode(env, csrno); + return RISCV_EXCP_NONE; } static RISCVException hstateen(CPURISCVState *env, int csrno) @@ -366,6 +375,15 @@ static RISCVException sstateen(CPURISCVState *env, int csrno) return RISCV_EXCP_ILLEGAL_INST; } + RISCVException ret = smode(env, csrno); + if (ret != RISCV_EXCP_NONE) { + return ret; + } + + if (env->debugger) { + return RISCV_EXCP_NONE; + } + if (env->priv < PRV_M) { if (!(env->mstateen[index] & SMSTATEEN_STATEEN)) { return RISCV_EXCP_ILLEGAL_INST; @@ -378,7 +396,7 @@ static RISCVException sstateen(CPURISCVState *env, int csrno) } } - return smode(env, csrno); + return RISCV_EXCP_NONE; } /* Checks if PointerMasking registers could be accessed */ From patchwork Tue Feb 28 13:45:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154904 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A627BC64ED6 for ; Tue, 28 Feb 2023 13:48:02 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pX0Ji-0001vb-7k; Tue, 28 Feb 2023 08:46:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pX0Io-0001Gj-D9; Tue, 28 Feb 2023 08:45:59 -0500 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pX0Im-00034g-Nu; Tue, 28 Feb 2023 08:45:58 -0500 Received: by mail-pl1-x62a.google.com with SMTP id z2so10433046plf.12; Tue, 28 Feb 2023 05:45:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=krM7XBys7hcjFwcAcxMxurvd7OZFSrf8ZIXZkVpxAuw=; b=bXaWnBgrh+zIstiMmNggvFK2s2T6LbBoqWlPcvX4T1nqDZxqFgDeMrlZpzTIrFQQW/ JZiKAqJf0b8NLHhEoxy/PC19QC9iYJ6vr8NAZkUnOB283DtFA2Zwf9RY7RkZqQcsDWQn JJ9CJ+TxDPwaiCUmt+84Xxgo/JdlKSUU6cM6Rt5kzwKjHB/AVNKFq7FTmDC2upEaXcdS Lca0CBNuPy1UsVd79tBULomt+kfpnIKw8aaoJ+8DGPO8ESR8dYxyMIQrmEVHlwf5k3B2 +3xuBZmu0vfTUIYxItZEpnaSP/HQO7Z+AFUnqbKNa9sPSFQmjkxpPNCDMbg9caZrRXpD GciQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=krM7XBys7hcjFwcAcxMxurvd7OZFSrf8ZIXZkVpxAuw=; b=0/n/azXEBPo51CbkbwzM7AlsIl2X6j9nelwztQLTLCKat416ZSnwB4YK6yMT82RwVU Su0xEq5oF7WVlqC/shZGclKzBaC2Ftx/DUUZNze1W3b+gbE+jNgFCE403ncI36VdN4O7 MMhGuqyGtAwN16HCPUGAfigLQpi+jwaCV2z1sLpzF/t1a3tCJXfHs6t0IEJsuj6sPW0a jEsqhyS866uIYcrBYuDPH+rBn4mLUSBPb7gf16A8SZ57/VA0t3uW6NZ1CMMg/XzRh8Jx kWLKid/BQUyQ3R+oH0WequQXDhHK/chuUu9j2EAZaNN4uNc03klq/aWYf7rPLPz35CEM CmoA== X-Gm-Message-State: AO0yUKWvNtVxDbMp499r8F+tgfnSkJQQ4ZFgVBU2kabWjvo9ZqNO9Pkw bES64xTE4sKLiChmZD1tEaCmKMmlVbg= X-Google-Smtp-Source: AK7set/9MQCq8zjWXDEatl9qTdTi3C1kcUeIIUXhh8gPqt80Io9QrmP5+lsvOamJC6FtQLsragzwLw== X-Received: by 2002:a17:902:e84a:b0:19e:4173:38b3 with SMTP id t10-20020a170902e84a00b0019e417338b3mr729490plg.46.1677591954628; Tue, 28 Feb 2023 05:45:54 -0800 (PST) Received: from ubuntu.. (144.168.56.201.16clouds.com. [144.168.56.201]) by smtp.gmail.com with ESMTPSA id j2-20020a170902758200b0019b06263bcasm1556896pll.247.2023.02.28.05.45.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:45:54 -0800 (PST) From: Bin Meng To: qemu-devel@nongnu.org Cc: Bin Meng , Weiwei Li , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Liu Zhiwei , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 16/18] target/riscv: Allow debugger to access sstc CSRs Date: Tue, 28 Feb 2023 21:45:33 +0800 Message-Id: <20230228104035.1879882-17-bmeng@tinylab.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-13-bmeng@tinylab.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=bmeng.cn@gmail.com; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bin Meng At present with a debugger attached sstc CSRs can only be accssed when CPU is in M-mode, or configured correctly. Fix it by adjusting their predicate() routine logic so that the static config check comes before the run-time check, as well as adding a debugger check. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/csr.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index a0e70f5ba0..020c3f524f 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -952,6 +952,19 @@ static RISCVException sstc(CPURISCVState *env, int csrno) return RISCV_EXCP_ILLEGAL_INST; } + if ((csrno == CSR_VSTIMECMP) || (csrno == CSR_VSTIMECMPH)) { + hmode_check = true; + } + + RISCVException ret = hmode_check ? hmode(env, csrno) : smode(env, csrno); + if (ret != RISCV_EXCP_NONE) { + return ret; + } + + if (env->debugger) { + return RISCV_EXCP_NONE; + } + if (env->priv == PRV_M) { return RISCV_EXCP_NONE; } @@ -972,11 +985,7 @@ static RISCVException sstc(CPURISCVState *env, int csrno) } } - if ((csrno == CSR_VSTIMECMP) || (csrno == CSR_VSTIMECMPH)) { - hmode_check = true; - } - - return hmode_check ? hmode(env, csrno) : smode(env, csrno); + return RISCV_EXCP_NONE; } static RISCVException sstc_32(CPURISCVState *env, int csrno) From patchwork Tue Feb 28 13:45:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB2BEC64EC7 for ; Tue, 28 Feb 2023 13:47:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pX0Je-0001Ya-44; Tue, 28 Feb 2023 08:46:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pX0It-0001Op-91; Tue, 28 Feb 2023 08:46:03 -0500 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pX0Iq-00036a-4m; Tue, 28 Feb 2023 08:46:02 -0500 Received: by mail-pj1-x1032.google.com with SMTP id 6-20020a17090a190600b00237c5b6ecd7so9222214pjg.4; Tue, 28 Feb 2023 05:45:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7AbYMa4P8VqoNbeG3pHXiplcC1cufg42KOa2qGB8uoI=; b=dGU77MAT/fL4UYY8ln4zt+e+EPJ3CtVyZo93RLuxZcFtOQgE+8FVCv1M8Zmdr3vCMT mA01TZ9eJeJ3OYNgOU44pokI1l0RTkZ+4QDEsmOWCXozzCtcce9ycnQ0Og73C8uQ+egR ifT+oXrGfRWA32VMiqeEQHCiWWfjwDaJ6Wf4oAZeukCWAS8NDbPQlijSsw1eiXG0c5kc xO9wNdMEyuHxWN/x0uN8/RBQmxn2uRF8kMbJGnxvZ61+6AufV4lorQIrzl5CE4J3+wnQ qgIZTOciv0XvHKmJcCaNlYzoy2P/SFVr1av6ioguQ03+GVEjfZ9F86oDhwiXZvkZmGqo LeSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7AbYMa4P8VqoNbeG3pHXiplcC1cufg42KOa2qGB8uoI=; b=0yh/dzKcn0Dg2rVsX6z6pGVWpRqobwG6oBcQjgGgc4zihORDAl/KHI4ya+do2RbsU9 2md9w8eBCEmGWKJio4uT+04tslyXBGIG1aPg86QpV+p3BtUODKEIbtUEx43ZTDzXhJQz kbE0nVRBoaX8DNw1XvVeJQRgQsdD7ErWbgRMqPdNPhsSgd4u2nFHVdwOxCt+TJsnmSoC zflVPmiUkzxjBk2rmadeG3UWgFiODgrXTmMLue0mDwQBnEyVB2UXgs/YGM5zZ7Nkk+AJ z7ZFRh097h68Y2Fiv2GqY2kj7uvyTRh+HneldzfkFsfVYwOzITKVDJsav0xXiEnZHWeq qwDA== X-Gm-Message-State: AO0yUKW7QRqbfhgie4Wv3FnGLoj218SywSb0Yk3VBofvfmo3KLo3Nblm qieXEC+Lh0NqeNN0ylSjEvnSkwr4ceQ= X-Google-Smtp-Source: AK7set85qKbOYtR7SDK5tKu94oFG2LMaC6HlJbt1mnqyzSA2l6skpdJYP/mxJO3fEkx8bXnlTzJEdg== X-Received: by 2002:a17:902:f70a:b0:19c:da68:337b with SMTP id h10-20020a170902f70a00b0019cda68337bmr2979189plo.16.1677591957863; Tue, 28 Feb 2023 05:45:57 -0800 (PST) Received: from ubuntu.. (144.168.56.201.16clouds.com. [144.168.56.201]) by smtp.gmail.com with ESMTPSA id j2-20020a170902758200b0019b06263bcasm1556896pll.247.2023.02.28.05.45.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:45:57 -0800 (PST) From: Bin Meng To: qemu-devel@nongnu.org Cc: Bin Meng , Weiwei Li , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Liu Zhiwei , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 17/18] target/riscv: Drop priv level check in mseccfg predicate() Date: Tue, 28 Feb 2023 21:45:34 +0800 Message-Id: <20230228104035.1879882-18-bmeng@tinylab.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-13-bmeng@tinylab.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=bmeng.cn@gmail.com; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bin Meng riscv_csrrw_check() already does the generic privilege level check hence there is no need to do the specific M-mode access check in the mseccfg predicate(). With this change debugger can access the mseccfg CSR anytime. Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- (no changes since v1) target/riscv/csr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 020c3f524f..785f6f4d45 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -451,7 +451,7 @@ static RISCVException pmp(CPURISCVState *env, int csrno) static RISCVException epmp(CPURISCVState *env, int csrno) { - if (env->priv == PRV_M && riscv_cpu_cfg(env)->epmp) { + if (riscv_cpu_cfg(env)->epmp) { return RISCV_EXCP_NONE; } From patchwork Tue Feb 28 13:45:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 13154901 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 03FEAC64EC7 for ; Tue, 28 Feb 2023 13:47:18 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pX0Jj-00027R-Qe; Tue, 28 Feb 2023 08:46:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pX0JW-0001bP-MU; Tue, 28 Feb 2023 08:46:49 -0500 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pX0It-00037J-Dc; Tue, 28 Feb 2023 08:46:05 -0500 Received: by mail-pj1-x102f.google.com with SMTP id q31-20020a17090a17a200b0023750b69614so9618628pja.5; Tue, 28 Feb 2023 05:46:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=otWsX41iRsIY6OZPoyaUciarsaYd6KuMLFC54xyPvzM=; b=qkz+4107rXXKqFOoPazFXAhtJYyvT20rdtVXlIFxL03RIOblkYhsH5ZlkUgodg7ccP ygDJR8rIKyd1jqz62MXtOzrjupstQ2M4rwISVL7jIX/pMIFUk4HyGrqSEzdHW0qZfJ2t pFXKOLl6n2gqSqQf+YMV5Xri9bcGcxIGReTCQUwDvL38gGWIhsev0XGCRGb53YWQzFCv 0JARY3BncCyY35BiPdLChZ7g+6LwpBXs2E3MOn1i/5fb+KGQGxhb/46zkHB3PlZrx3Xe p0KftybSNbTNH0p1Y4s1X9kAwMF9kZ8mkV7taHkbw+WSiXR8NAbyUIDwXYA0E94P1Wjt iLtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=otWsX41iRsIY6OZPoyaUciarsaYd6KuMLFC54xyPvzM=; b=1MQUAHTCWXbj+5neWlRWH2dj755gqb4m2HZV2LjtB8VjbD3jg4jeOP19W76IkJC6eo YBDlvrmGkmVcVPVyNOEi+kx5tfUy3SbXChd401NpmDSUU/qgNEhTNR1ZG2e1kKwYc/TC Oafo7TtuvhEPECsShZOzqsAldzEIY30NVm8gmQpSCR58idQNtudwC18J/9WPb4isah5y o48F052YoJSXi+Usuod3h1F44193AKeYtoQDNQTRapngXvk7SIM1jVG78IItYuO91U3u x2E8GB8+P28L4+ZgIU6NlQ/QmE4qLFATRdinuwz0QE9jG//QqjQzM2iFp+gtinbpyXFE RWEA== X-Gm-Message-State: AO0yUKWnA2CaJ3D40YXlosegMW5OCrxd0piNqllvIt11tmGm3722uG4o ZZ8yNXPp1e8BjrezpB3OLNih0bGJu0U= X-Google-Smtp-Source: AK7set/FIeku3iwn1Y+Qd06xWiJl8ETWH5LWT29l3Arg+AegyZjpoL7sl076vtRw8acJ05fJpeVMUA== X-Received: by 2002:a17:902:e886:b0:19a:ad2f:2df9 with SMTP id w6-20020a170902e88600b0019aad2f2df9mr3473933plg.55.1677591961327; Tue, 28 Feb 2023 05:46:01 -0800 (PST) Received: from ubuntu.. (144.168.56.201.16clouds.com. [144.168.56.201]) by smtp.gmail.com with ESMTPSA id j2-20020a170902758200b0019b06263bcasm1556896pll.247.2023.02.28.05.45.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:46:00 -0800 (PST) From: Bin Meng To: qemu-devel@nongnu.org Cc: Bin Meng , Weiwei Li , Alistair Francis , Bin Meng , Daniel Henrique Barboza , Liu Zhiwei , Palmer Dabbelt , qemu-riscv@nongnu.org Subject: [PATCH v2 18/18] target/riscv: Group all predicate() routines together Date: Tue, 28 Feb 2023 21:45:35 +0800 Message-Id: <20230228104035.1879882-19-bmeng@tinylab.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230228104035.1879882-1-bmeng@tinylab.org> References: <20230228104035.1879882-13-bmeng@tinylab.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=bmeng.cn@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bin Meng Move sstc()/sstc32() to where all predicate() routines live, and smstateen_acc_ok() to near {read,write}_xenvcfg(). Signed-off-by: Bin Meng Reviewed-by: Weiwei Li Reviewed-by: LIU Zhiwei --- Changes in v2: - move smstateen_acc_ok() to near {read,write}_xenvcfg() target/riscv/csr.c | 177 ++++++++++++++++++++++----------------------- 1 file changed, 87 insertions(+), 90 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 785f6f4d45..3a7e0217e2 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -40,42 +40,6 @@ void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops) csr_ops[csrno & (CSR_TABLE_SIZE - 1)] = *ops; } -/* Predicates */ -#if !defined(CONFIG_USER_ONLY) -static RISCVException smstateen_acc_ok(CPURISCVState *env, int index, - uint64_t bit) -{ - bool virt = riscv_cpu_virt_enabled(env); - RISCVCPU *cpu = env_archcpu(env); - - if (env->priv == PRV_M || !cpu->cfg.ext_smstateen) { - return RISCV_EXCP_NONE; - } - - if (!(env->mstateen[index] & bit)) { - return RISCV_EXCP_ILLEGAL_INST; - } - - if (virt) { - if (!(env->hstateen[index] & bit)) { - return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; - } - - if (env->priv == PRV_U && !(env->sstateen[index] & bit)) { - return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; - } - } - - if (env->priv == PRV_U && riscv_has_ext(env, RVS)) { - if (!(env->sstateen[index] & bit)) { - return RISCV_EXCP_ILLEGAL_INST; - } - } - - return RISCV_EXCP_NONE; -} -#endif - static RISCVException fs(CPURISCVState *env, int csrno) { #if !defined(CONFIG_USER_ONLY) @@ -399,6 +363,60 @@ static RISCVException sstateen(CPURISCVState *env, int csrno) return RISCV_EXCP_NONE; } +static RISCVException sstc(CPURISCVState *env, int csrno) +{ + RISCVCPU *cpu = env_archcpu(env); + bool hmode_check = false; + + if (!cpu->cfg.ext_sstc || !env->rdtime_fn) { + return RISCV_EXCP_ILLEGAL_INST; + } + + if ((csrno == CSR_VSTIMECMP) || (csrno == CSR_VSTIMECMPH)) { + hmode_check = true; + } + + RISCVException ret = hmode_check ? hmode(env, csrno) : smode(env, csrno); + if (ret != RISCV_EXCP_NONE) { + return ret; + } + + if (env->debugger) { + return RISCV_EXCP_NONE; + } + + if (env->priv == PRV_M) { + return RISCV_EXCP_NONE; + } + + /* + * No need of separate function for rv32 as menvcfg stores both menvcfg + * menvcfgh for RV32. + */ + if (!(get_field(env->mcounteren, COUNTEREN_TM) && + get_field(env->menvcfg, MENVCFG_STCE))) { + return RISCV_EXCP_ILLEGAL_INST; + } + + if (riscv_cpu_virt_enabled(env)) { + if (!(get_field(env->hcounteren, COUNTEREN_TM) && + get_field(env->henvcfg, HENVCFG_STCE))) { + return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; + } + } + + return RISCV_EXCP_NONE; +} + +static RISCVException sstc_32(CPURISCVState *env, int csrno) +{ + if (riscv_cpu_mxl(env) != MXL_RV32) { + return RISCV_EXCP_ILLEGAL_INST; + } + + return sstc(env, csrno); +} + /* Checks if PointerMasking registers could be accessed */ static RISCVException pointer_masking(CPURISCVState *env, int csrno) { @@ -943,60 +961,6 @@ static RISCVException read_timeh(CPURISCVState *env, int csrno, return RISCV_EXCP_NONE; } -static RISCVException sstc(CPURISCVState *env, int csrno) -{ - RISCVCPU *cpu = env_archcpu(env); - bool hmode_check = false; - - if (!cpu->cfg.ext_sstc || !env->rdtime_fn) { - return RISCV_EXCP_ILLEGAL_INST; - } - - if ((csrno == CSR_VSTIMECMP) || (csrno == CSR_VSTIMECMPH)) { - hmode_check = true; - } - - RISCVException ret = hmode_check ? hmode(env, csrno) : smode(env, csrno); - if (ret != RISCV_EXCP_NONE) { - return ret; - } - - if (env->debugger) { - return RISCV_EXCP_NONE; - } - - if (env->priv == PRV_M) { - return RISCV_EXCP_NONE; - } - - /* - * No need of separate function for rv32 as menvcfg stores both menvcfg - * menvcfgh for RV32. - */ - if (!(get_field(env->mcounteren, COUNTEREN_TM) && - get_field(env->menvcfg, MENVCFG_STCE))) { - return RISCV_EXCP_ILLEGAL_INST; - } - - if (riscv_cpu_virt_enabled(env)) { - if (!(get_field(env->hcounteren, COUNTEREN_TM) && - get_field(env->henvcfg, HENVCFG_STCE))) { - return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; - } - } - - return RISCV_EXCP_NONE; -} - -static RISCVException sstc_32(CPURISCVState *env, int csrno) -{ - if (riscv_cpu_mxl(env) != MXL_RV32) { - return RISCV_EXCP_ILLEGAL_INST; - } - - return sstc(env, csrno); -} - static RISCVException read_vstimecmp(CPURISCVState *env, int csrno, target_ulong *val) { @@ -1944,6 +1908,39 @@ static RISCVException write_menvcfgh(CPURISCVState *env, int csrno, return RISCV_EXCP_NONE; } +static RISCVException smstateen_acc_ok(CPURISCVState *env, int index, + uint64_t bit) +{ + bool virt = riscv_cpu_virt_enabled(env); + RISCVCPU *cpu = env_archcpu(env); + + if (env->priv == PRV_M || !cpu->cfg.ext_smstateen) { + return RISCV_EXCP_NONE; + } + + if (!(env->mstateen[index] & bit)) { + return RISCV_EXCP_ILLEGAL_INST; + } + + if (virt) { + if (!(env->hstateen[index] & bit)) { + return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; + } + + if (env->priv == PRV_U && !(env->sstateen[index] & bit)) { + return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; + } + } + + if (env->priv == PRV_U && riscv_has_ext(env, RVS)) { + if (!(env->sstateen[index] & bit)) { + return RISCV_EXCP_ILLEGAL_INST; + } + } + + return RISCV_EXCP_NONE; +} + static RISCVException read_senvcfg(CPURISCVState *env, int csrno, target_ulong *val) {