From patchwork Thu Mar 2 06:21:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mukunda,Vijendar" X-Patchwork-Id: 13156749 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6FF9C678D4 for ; Thu, 2 Mar 2023 06:19:47 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 7E08120F; Thu, 2 Mar 2023 07:18:55 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 7E08120F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1677737985; bh=yp8RLSmw3aI1IVHzEmhfg90finRqfsFgLM2AbnpTh4I=; h=From:To:Subject:Date:In-Reply-To:References:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=RgPsvW5+g+t2zap0PsMHYj0sWyLVGeFyKtSsuKCNLb0+dO89pl3SyCCg0XUka2tJ9 +OrMKZTlJDifEQIuOkhlLxzgjcOknuEPJBESgIwsryLLgu6GZD+R2YObCDiL1nICpW Hhdz66zHKym9kdm0wk/BjWqIUHn5kXPp7azhE6II= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 7EDB3F80520; Thu, 2 Mar 2023 07:18:45 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 10988F80520; Thu, 2 Mar 2023 07:18:42 +0100 (CET) Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on20626.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe5b::626]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 0DCACF804FE for ; Thu, 2 Mar 2023 07:18:36 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 0DCACF804FE Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key, unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=2Nvotz9D ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=I8/o3FKnWXx5/gI0oP6XqTVVRgGMpTKgIB8WrGY6zGQMdSw4uFURjYdbs8f3WIu2vUO40UowyTz96E/Sl5iQA2Uud3lrNG25c0iZJVe/q1mwmf+j2jNt5dg+ahEjTZD6CJ5txucqK3GIFM9wY6vrm03gu7EIKUkgErTDXWorI+TIhobnpWnCZgDJTltidM60AP80iJJXJVprsXLMKHSfz5yxo1M3YKT6ZdFdpI5Rxx7f5dDwONzyDAs9m3gGQZX/kRZdppXuRSjWlgzZtLuJzCpT+Nq0TI3Hxowv1xaFv8unnqGqLABTaaLYxkB0U5p6TQQGMCdFGzdGrHwWIQ/GVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=WUrMAhuQVof+ju/n9q/rmSwMNJzF/yYd0v9PWitn7Oc=; b=ce1VSyT2Q9up/aXyu2vSwrPm+hIlSQwZlSQWQmOqqm91DlH1jDalInQfHUUn45VBf1aYrX1OQqlOAmxhFmNiKZivjXsYWNKwlpcioUt+GX034keTVYao3Ym7vtxhMcpl+IxZCPZ0gxDexYvxGEY08M13/ola6aJavhKYXCw0G/o/Amzvfb3+F68krmkyMKZEpxd38eyH4UXGbKWKv9VxRl6b0LSfbYyIlCDcwGPNLStMGH0poUdXuia79J+xYENU5NzTMMpYMlQ9cIzmXDq2pkOWQEmYSxbecM2jkVN+nnuTl/Pvxo7OaqCmo6BJFfvx9xedTCAieWBH7X7nFBcEeQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WUrMAhuQVof+ju/n9q/rmSwMNJzF/yYd0v9PWitn7Oc=; b=2Nvotz9DI0fZaiWt1GjkcpZ5hNrfGaSD92jLycSrYmN+ifEkkNoqCGW73WZ7M0RwgESQ1shAxJg/TeKhsFaH5mESsRCxwK0sXCcbbjRhI3UEMQxjezhaZj5yEv5p+3j/p4LZSs0xkM6RxR3Wfzf3d1UdjeCnPWqNtHKv3R37P2c= Received: from MW4PR04CA0212.namprd04.prod.outlook.com (2603:10b6:303:87::7) by SN7PR12MB6768.namprd12.prod.outlook.com (2603:10b6:806:268::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.21; Thu, 2 Mar 2023 06:18:32 +0000 Received: from CO1NAM11FT026.eop-nam11.prod.protection.outlook.com (2603:10b6:303:87:cafe::f2) by MW4PR04CA0212.outlook.office365.com (2603:10b6:303:87::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.19 via Frontend Transport; Thu, 2 Mar 2023 06:18:32 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT026.mail.protection.outlook.com (10.13.175.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6156.18 via Frontend Transport; Thu, 2 Mar 2023 06:18:31 +0000 Received: from SATLEXMB07.amd.com (10.181.41.45) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 2 Mar 2023 00:17:38 -0600 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB07.amd.com (10.181.41.45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 1 Mar 2023 22:17:04 -0800 Received: from vijendar-X570-GAMING-X.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 2 Mar 2023 00:17:01 -0600 From: Vijendar Mukunda To: Subject: [PATCH V5 1/8] soundwire: export sdw_compute_slave_ports() function Date: Thu, 2 Mar 2023 11:51:00 +0530 Message-ID: <20230302062107.207845-2-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> References: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT026:EE_|SN7PR12MB6768:EE_ X-MS-Office365-Filtering-Correlation-Id: 13818eaf-fc3d-446b-a42f-08db1ae5f27e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 372cou+41Ly5IcMLl9bZ0rXn0/GDBFPhTL82QKY8/mfGGgJk7xN63aP90ga6IpugglkUupZ/1F+ChMcoSFuvNmpD+5kSe4+kS9ailjC5pGPOi3ltxyxw13V5YdM+qCx3+24j0/QHVk76GY5qWIrW3e8CWjj6sY9YkWx/dVuCJKUIT8uv1wmnLoTiJp8MraI4zjL5rDpieCoV/mjfQ2hCwy8t6csygAsWbQbkFhyzZ8O/sOXSOg5tY/QftHql9UcRmKS72ardyU8onyKNt9alvCRInfocW2NNBbwRZjq56ByEQJ26L7tv3nctLCOixzGcmTzxiObIOIrkgVCnN45Nylu0HNScTH57MT2D/bj5ay/2d/nPpSp7cgCpA45UdePEj9HKdz5PDA1ZN0bEVt9T3MUuvhsPd9N5c4kFBNoqi5TmDBRt2PJssXAXYORwtc2D0dnPw4eKg03X1qle43KrfMedStOk46UIgrCrKXARz7UPDbKRZ7y1KQhE4KQyQfWoniH+Bvjx+/FnNKTLMkWlwdorVGzrRdl7cWbvpntRQokXVNNxpzCtKVBw0WEzWsaZKVVNjRdHgo8on3ytcPo2+Bh4Xqs7Ajr9J2kFCBE8WvfU9Leag4CGB3np2zF3hzgIJZMBsCnRTxeyfbwGOpZNdHPOgfG3vZoyMphRmgH2YRJhMDdsSD2KBV0/pfLMF1MK4f9H4jzMweyMwZGbNzfJ0FtgFok1+vRLCt8CZIluAsY= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(346002)(396003)(136003)(376002)(39860400002)(451199018)(40470700004)(46966006)(36840700001)(1076003)(26005)(40460700003)(70206006)(41300700001)(8676002)(7696005)(356005)(82310400005)(70586007)(6916009)(40480700001)(4326008)(8936002)(36756003)(86362001)(5660300002)(2616005)(966005)(82740400003)(186003)(336012)(81166007)(47076005)(426003)(54906003)(316002)(2906002)(478600001)(83380400001)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2023 06:18:31.9713 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 13818eaf-fc3d-446b-a42f-08db1ae5f27e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT026.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6768 Message-ID-Hash: OZ52VCJCTB4KWFLQLP5EOCEO7TNGNIED X-Message-ID-Hash: OZ52VCJCTB4KWFLQLP5EOCEO7TNGNIED X-MailFrom: Vijendar.Mukunda@amd.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org, pierre-louis.bossart@linux.intel.com, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, Mario.Limonciello@amd.com, amadeuszx.slawinski@linux.intel.com, Mastan.Katragadda@amd.com, Arungopal.kondaveeti@amd.com, Vijendar Mukunda , Bard Liao , Sanyog Kale , open list X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Export sdw_compute_slave_ports() function to use it in another soundwire manager module. Move sdw_transport_data structure to bus header file to export sdw_compute_slave_ports() function. Signed-off-by: Vijendar Mukunda Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/lkml/20230201165944.3169125-1-Vijendar.Mukunda@amd.com --- drivers/soundwire/bus.h | 9 +++++++++ drivers/soundwire/generic_bandwidth_allocation.c | 12 +++--------- 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/soundwire/bus.h b/drivers/soundwire/bus.h index 96927a143796..0ea0412842c5 100644 --- a/drivers/soundwire/bus.h +++ b/drivers/soundwire/bus.h @@ -144,6 +144,13 @@ struct sdw_master_runtime { struct list_head bus_node; }; +struct sdw_transport_data { + int hstart; + int hstop; + int block_offset; + int sub_block_offset; +}; + struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave, enum sdw_data_direction direction, unsigned int port_num); @@ -212,5 +219,7 @@ int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 val void sdw_clear_slave_status(struct sdw_bus *bus, u32 request); int sdw_slave_modalias(const struct sdw_slave *slave, char *buf, size_t size); +void sdw_compute_slave_ports(struct sdw_master_runtime *m_rt, + struct sdw_transport_data *t_data); #endif /* __SDW_BUS_H */ diff --git a/drivers/soundwire/generic_bandwidth_allocation.c b/drivers/soundwire/generic_bandwidth_allocation.c index f7c66083a4dd..39543048baa7 100644 --- a/drivers/soundwire/generic_bandwidth_allocation.c +++ b/drivers/soundwire/generic_bandwidth_allocation.c @@ -28,15 +28,8 @@ struct sdw_group { unsigned int *rates; }; -struct sdw_transport_data { - int hstart; - int hstop; - int block_offset; - int sub_block_offset; -}; - -static void sdw_compute_slave_ports(struct sdw_master_runtime *m_rt, - struct sdw_transport_data *t_data) +void sdw_compute_slave_ports(struct sdw_master_runtime *m_rt, + struct sdw_transport_data *t_data) { struct sdw_slave_runtime *s_rt = NULL; struct sdw_port_runtime *p_rt; @@ -85,6 +78,7 @@ static void sdw_compute_slave_ports(struct sdw_master_runtime *m_rt, } } } +EXPORT_SYMBOL(sdw_compute_slave_ports); static void sdw_compute_master_ports(struct sdw_master_runtime *m_rt, struct sdw_group_params *params, From patchwork Thu Mar 2 06:21:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mukunda,Vijendar" X-Patchwork-Id: 13156751 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC278C678D4 for ; Thu, 2 Mar 2023 06:20:17 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 7F212836; Thu, 2 Mar 2023 07:19:25 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 7F212836 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1677738015; bh=VViTi8QMQrGLYdYRFZ5lCeOVmZvY7Z25sbfEOxuMed8=; h=From:To:Subject:Date:In-Reply-To:References:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=NWszrY21jiZm+8BreQ/TG+sPDxwb0Uro4P7GhT7jYdtxQVt+p6STvx8aM1+UYbNfB +cvUIJxYmRuDR3wlgbdNu1JRGm+DH74knXBlWVsO3JXL5lVuymUlNq3Ok0MbdSmboL aoYFo2oGvw6XHK8u4KrvCNei854xZR5gnSxuNgus= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 48401F80527; Thu, 2 Mar 2023 07:19:23 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id C069FF80533; Thu, 2 Mar 2023 07:19:18 +0100 (CET) Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2060e.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe5a::60e]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id EB84FF80310 for ; Thu, 2 Mar 2023 07:18:56 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz EB84FF80310 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key, unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=EoveOIUn ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=nX5GtOcp4BaVdoDKFC0XC/w57cTZi2Riwgka9x6KKGegayuppn64HsTw7o/UxK0xxy6w0uWbyL46dN5tC7ss00YzaZivtqDfgUm79LeG89+tcjd6Lrcp9UT2BgbDNxcV1yPsaTYpaLa60GjVWRxFW59oCnC+Xf112JERTnucZ7rs8kH9U7xG3wqNj9re/jje/hHw8V+xTQjps/EKXa5+kfo4k9LklCRMIohHzZVO5leEEu0wWp3vhYul9CPcY4lOxYEGoUIt0Laom28ilB/okLcC/EJSO3UHL/8g86kgloJt69SkfWVLGalqXCyaisufuL/IAVNv7KjpsjlyRFC3AA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=pFrRn2OKsmWybz70u+W503UnxnGJ3xqVwYbus6+6UyE=; b=k/VAPkMXNBcoxQf/0ku0VNRui9MaGtxdBDS+u9OQNh4KcdIYNEyp2PS3CdrSYV6MQQ80SvDiObmE6MHdvfPWzgi5iGWIMAWcizXRTn6ETi+xqr+zvcCdWsGuKmU3XoymQcZ+uLZikJkUcDVJ2w9XIfb4jBMmybnqDs8mcZvuCyi2QsbjSbuqPrXe95AE/vDkrUhvL57JCCU/dhHKU3OH7GMx9r4azzU3UYvTe9bnLtee2VfM3RMFK/p4wDLN+mhMJNUFAePilaH9cOrSeeWX/U5byxxcWXAtgauhngUpmbB4SvQlgukd5/ugW3cSlF9mGLd+GlhAFLRVn0OMDVPyxg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=pFrRn2OKsmWybz70u+W503UnxnGJ3xqVwYbus6+6UyE=; b=EoveOIUnASACsZES3mb9GpG69U5NHHtvJILAXj7sgvJOzQEE39jm6Zg8mk2CEDRFj0oGLfD67T8IIC1u5E+oV1pG1OuKFT2Q9uNiYVVVVcXU9k9TveBKv1WdBhfC0Ve8knLmeEPJznls/dK1f31a2TvLCGHDn90e4F/vVWkEhhc= Received: from BN0PR04CA0080.namprd04.prod.outlook.com (2603:10b6:408:ea::25) by CY5PR12MB6383.namprd12.prod.outlook.com (2603:10b6:930:3d::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.27; Thu, 2 Mar 2023 06:18:50 +0000 Received: from BN8NAM11FT090.eop-nam11.prod.protection.outlook.com (2603:10b6:408:ea:cafe::41) by BN0PR04CA0080.outlook.office365.com (2603:10b6:408:ea::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.18 via Frontend Transport; Thu, 2 Mar 2023 06:18:50 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT090.mail.protection.outlook.com (10.13.177.105) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6156.19 via Frontend Transport; Thu, 2 Mar 2023 06:18:50 +0000 Received: from SATLEXMB06.amd.com (10.181.40.147) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 2 Mar 2023 00:18:30 -0600 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB06.amd.com (10.181.40.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 2 Mar 2023 00:17:43 -0600 Received: from vijendar-X570-GAMING-X.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 2 Mar 2023 00:17:39 -0600 From: Vijendar Mukunda To: Subject: [PATCH V5 2/8] soundwire: amd: Add support for AMD Manager driver Date: Thu, 2 Mar 2023 11:51:01 +0530 Message-ID: <20230302062107.207845-3-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> References: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT090:EE_|CY5PR12MB6383:EE_ X-MS-Office365-Filtering-Correlation-Id: 71cb1ad5-4f02-4045-f3d7-08db1ae5fd64 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: C8wt4BrIUt3dE2JfF5Ot0mqqbtSJH4r/lLS7qeEAZe4aOs1yLJoAlLmmOgUdCTe23qWzluUKzq/OVsOKtmIUWJwOEAAD6FyDkyhj/Rpgr+EUl8eZS3QbMFZ8Qkf8CC3LnkDakxsW7PICUyb+mYYdtuNGqr/7bxR3WXHi8HzMz/x+IriwQUCjisa+ghh3vZBTlNpKVaBrqbbAsVlaLl5VLAdIksTOT4MgImKQ5mmG82HXZEw7ZltfIRY6PEHUm2eOMJxPxrNCidb/2EnQRsUBUKlaVVae3nn6cYMO3zNNwatGCg1IAoWEwUOpYmwVLnsCcv441By4HH0KU0GtJgvhJFiC+/cwp3edga4do07H8txXHRxZVIVVdjBiKNo9FsIchJnU2kImfzeXAxgs+2BDgDjvUW5SA6ba/sP4BgdBSOhbhTJfeDMauT1jsOYZtYGDJlz+aYWBkgh/tuCuXMUw4H0vHcJs9YQwYTvvHfIMsAi8YKI8mYRqnrwNiIoei54MHK5cBAgAysvyYYVpqnEF9WwWVbBo3vnHuekjdYRl7xB+itmu+oeADDQlHey4ilwO5FGnZ44Ffpdvy+jD92MzvRsIGUQfErLZABZRP+oOB/TQ6RdsDgFYDSw/DyZIYuJxysaHpvvAcMmfzp+e7/cVTBNeWvWUIDB6Xmx/SSLXCUGWbg0Nl4b2ltSbwqYi5VT5D0VkqjLDz+qm8yIHLo0trwLuKR5Ek94v5IKneqjrAI0= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(376002)(396003)(346002)(39860400002)(136003)(451199018)(40470700004)(36840700001)(46966006)(36756003)(40460700003)(86362001)(6666004)(1076003)(478600001)(26005)(70586007)(336012)(186003)(54906003)(2616005)(41300700001)(6916009)(4326008)(2906002)(70206006)(7696005)(316002)(5660300002)(82740400003)(81166007)(40480700001)(356005)(426003)(82310400005)(8936002)(47076005)(36860700001)(30864003)(8676002)(83380400001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2023 06:18:50.3829 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 71cb1ad5-4f02-4045-f3d7-08db1ae5fd64 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT090.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6383 Message-ID-Hash: YEIM2Z3VSCURGJBQB45UF7NMTYURDPPG X-Message-ID-Hash: YEIM2Z3VSCURGJBQB45UF7NMTYURDPPG X-MailFrom: Vijendar.Mukunda@amd.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org, pierre-louis.bossart@linux.intel.com, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, Mario.Limonciello@amd.com, amadeuszx.slawinski@linux.intel.com, Mastan.Katragadda@amd.com, Arungopal.kondaveeti@amd.com, Vijendar Mukunda , Bard Liao , Sanyog Kale , open list X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: AMD ACP(v6.x) IP block has two SoundWire manager devices. Add support for - Manager driver probe & remove sequence - Helper functions to enable/disable interrupts, Initialize sdw manager, enable sdw pads - Manager driver sdw_master_ops & port_ops callbacks Signed-off-by: Vijendar Mukunda --- drivers/soundwire/amd_manager.c | 756 ++++++++++++++++++++++++++++++ drivers/soundwire/amd_manager.h | 252 ++++++++++ include/linux/soundwire/sdw_amd.h | 67 +++ 3 files changed, 1075 insertions(+) create mode 100644 drivers/soundwire/amd_manager.c create mode 100644 drivers/soundwire/amd_manager.h create mode 100644 include/linux/soundwire/sdw_amd.h diff --git a/drivers/soundwire/amd_manager.c b/drivers/soundwire/amd_manager.c new file mode 100644 index 000000000000..32fb17df465a --- /dev/null +++ b/drivers/soundwire/amd_manager.c @@ -0,0 +1,756 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * SoundWire AMD Manager driver + * + * Copyright 2023 Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "bus.h" +#include "amd_manager.h" + +#define DRV_NAME "amd_sdw_manager" + +#define to_amd_sdw(b) container_of(b, struct amd_sdw_manager, bus) + +static void amd_enable_sdw_pads(struct amd_sdw_manager *amd_manager) +{ + u32 sw_pad_pulldown_val; + u32 val; + + mutex_lock(amd_manager->acp_sdw_lock); + val = acp_reg_readl(amd_manager->acp_mmio + ACP_SW_PAD_KEEPER_EN); + val |= amd_manager->reg_mask->sw_pad_enable_mask; + acp_reg_writel(val, amd_manager->acp_mmio + ACP_SW_PAD_KEEPER_EN); + usleep_range(1000, 1500); + + sw_pad_pulldown_val = acp_reg_readl(amd_manager->acp_mmio + ACP_PAD_PULLDOWN_CTRL); + sw_pad_pulldown_val &= amd_manager->reg_mask->sw_pad_pulldown_mask; + acp_reg_writel(sw_pad_pulldown_val, amd_manager->acp_mmio + ACP_PAD_PULLDOWN_CTRL); + mutex_unlock(amd_manager->acp_sdw_lock); +} + +static int amd_init_sdw_manager(struct amd_sdw_manager *amd_manager) +{ + u32 val; + u32 timeout = 0; + u32 retry_count = 0; + + acp_reg_writel(AMD_SDW_ENABLE, amd_manager->mmio + ACP_SW_EN); + do { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_EN_STATUS); + if (val) + break; + usleep_range(10, 20); + } while (retry_count++ < AMD_SDW_STAT_MAX_RETRY_COUNT); + + if (retry_count > AMD_SDW_STAT_MAX_RETRY_COUNT) + return -ETIMEDOUT; + + /* SoundWire manager bus reset */ + acp_reg_writel(AMD_SDW_BUS_RESET_REQ, amd_manager->mmio + ACP_SW_BUS_RESET_CTRL); + val = acp_reg_readl(amd_manager->mmio + ACP_SW_BUS_RESET_CTRL); + while (!(val & AMD_SDW_BUS_RESET_DONE)) { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_BUS_RESET_CTRL); + if (timeout > AMD_DELAY_LOOP_ITERATION) + break; + usleep_range(1, 5); + timeout++; + } + if (timeout > AMD_DELAY_LOOP_ITERATION) + return -ETIMEDOUT; + + timeout = 0; + acp_reg_writel(AMD_SDW_BUS_RESET_CLEAR_REQ, amd_manager->mmio + ACP_SW_BUS_RESET_CTRL); + val = acp_reg_readl(amd_manager->mmio + ACP_SW_BUS_RESET_CTRL); + while (val) { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_BUS_RESET_CTRL); + if (timeout > AMD_DELAY_LOOP_ITERATION) + break; + usleep_range(1, 5); + timeout++; + } + if (timeout > AMD_DELAY_LOOP_ITERATION) { + dev_err(amd_manager->dev, "Failed to reset SoundWire manager instance%d\n", + amd_manager->instance); + return -ETIMEDOUT; + } + + retry_count = 0; + acp_reg_writel(AMD_SDW_DISABLE, amd_manager->mmio + ACP_SW_EN); + do { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_EN_STATUS); + if (!val) + break; + usleep_range(10, 20); + } while (retry_count++ < AMD_SDW_STAT_MAX_RETRY_COUNT); + + if (retry_count > AMD_SDW_STAT_MAX_RETRY_COUNT) + return -ETIMEDOUT; + return 0; +} + +static int amd_enable_sdw_manager(struct amd_sdw_manager *amd_manager) +{ + u32 val; + u32 retry_count = 0; + + acp_reg_writel(AMD_SDW_ENABLE, amd_manager->mmio + ACP_SW_EN); + do { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_EN_STATUS); + if (val) + break; + usleep_range(10, 20); + } while (retry_count++ < AMD_SDW_STAT_MAX_RETRY_COUNT); + + if (retry_count > AMD_SDW_STAT_MAX_RETRY_COUNT) + return -ETIMEDOUT; + return 0; +} + +static int amd_disable_sdw_manager(struct amd_sdw_manager *amd_manager) +{ + u32 val; + u32 retry_count = 0; + + acp_reg_writel(AMD_SDW_DISABLE, amd_manager->mmio + ACP_SW_EN); + /* + * After invoking manager disable sequence, check whether + * manager has executed clock stop sequence. In this case, + * manager should ignore checking enable status register. + */ + val = acp_reg_readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + if (val) + return 0; + + do { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_EN_STATUS); + if (!val) + break; + usleep_range(10, 20); + } while (retry_count++ < AMD_SDW_STAT_MAX_RETRY_COUNT); + + if (retry_count > AMD_SDW_STAT_MAX_RETRY_COUNT) + return -ETIMEDOUT; + return 0; +} + +static void amd_enable_sdw_interrupts(struct amd_sdw_manager *amd_manager) +{ + struct sdw_manager_reg_mask *reg_mask = amd_manager->reg_mask; + u32 val; + + mutex_lock(amd_manager->acp_sdw_lock); + val = acp_reg_readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance)); + val |= reg_mask->acp_sdw_intr_mask; + acp_reg_writel(val, amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance)); + mutex_unlock(amd_manager->acp_sdw_lock); + + acp_reg_writel(AMD_SDW_IRQ_MASK_0TO7, amd_manager->mmio + + ACP_SW_STATE_CHANGE_STATUS_MASK_0TO7); + acp_reg_writel(AMD_SDW_IRQ_MASK_8TO11, amd_manager->mmio + + ACP_SW_STATE_CHANGE_STATUS_MASK_8TO11); + acp_reg_writel(AMD_SDW_IRQ_ERROR_MASK, amd_manager->mmio + ACP_SW_ERROR_INTR_MASK); +} + +static void amd_disable_sdw_interrupts(struct amd_sdw_manager *amd_manager) +{ + struct sdw_manager_reg_mask *reg_mask = amd_manager->reg_mask; + u32 val; + + mutex_lock(amd_manager->acp_sdw_lock); + val = acp_reg_readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance)); + val &= ~reg_mask->acp_sdw_intr_mask; + acp_reg_writel(val, amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance)); + mutex_unlock(amd_manager->acp_sdw_lock); + + acp_reg_writel(0x00, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_MASK_0TO7); + acp_reg_writel(0x00, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_MASK_8TO11); + acp_reg_writel(0x00, amd_manager->mmio + ACP_SW_ERROR_INTR_MASK); +} + +static void amd_sdw_set_frameshape(struct amd_sdw_manager *amd_manager) +{ + u32 frame_size; + + frame_size = (amd_manager->rows_index << 3) | amd_manager->cols_index; + acp_reg_writel(frame_size, amd_manager->mmio + ACP_SW_FRAMESIZE); +} + +static void amd_sdw_ctl_word_prep(u32 *lower_word, u32 *upper_word, u32 cmd_type, + struct sdw_msg *msg, int cmd_offset) +{ + u32 upper_data; + u32 lower_data = 0; + u16 addr; + u8 addr_upper, addr_lower; + u8 data = 0; + + addr = msg->addr + cmd_offset; + addr_upper = (addr & 0xFF00) >> 8; + addr_lower = addr & 0xFF; + + if (cmd_type == AMD_SDW_CMD_WRITE) + data = msg->buf[cmd_offset]; + + upper_data = FIELD_PREP(AMD_SDW_MCP_CMD_DEV_ADDR, msg->dev_num); + upper_data |= FIELD_PREP(AMD_SDW_MCP_CMD_COMMAND, cmd_type); + upper_data |= FIELD_PREP(AMD_SDW_MCP_CMD_REG_ADDR_HIGH, addr_upper); + lower_data |= FIELD_PREP(AMD_SDW_MCP_CMD_REG_ADDR_LOW, addr_lower); + lower_data |= FIELD_PREP(AMD_SDW_MCP_CMD_REG_DATA, data); + + *upper_word = upper_data; + *lower_word = lower_data; +} + +static u64 amd_sdw_send_cmd_get_resp(struct amd_sdw_manager *amd_manager, u32 lower_word, + u32 upper_word) +{ + u64 resp; + u32 resp_lower, resp_upper; + u32 sts; + u32 timeout = 0; + + sts = acp_reg_readl(amd_manager->mmio + ACP_SW_IMM_CMD_STS); + while (sts & AMD_SDW_IMM_CMD_BUSY) { + if (timeout++ > AMD_SDW_RETRY_COUNT) { + dev_err(amd_manager->dev, "SDW%x previous cmd status clear failed\n", + amd_manager->instance); + return -ETIMEDOUT; + } + usleep_range(5, 10); + sts = acp_reg_readl(amd_manager->mmio + ACP_SW_IMM_CMD_STS); + } + + timeout = 0; + if (sts & AMD_SDW_IMM_RES_VALID) { + dev_err(amd_manager->dev, "SDW%x manager is in bad state\n", amd_manager->instance); + acp_reg_writel(0x00, amd_manager->mmio + ACP_SW_IMM_CMD_STS); + } + acp_reg_writel(upper_word, amd_manager->mmio + ACP_SW_IMM_CMD_UPPER_WORD); + acp_reg_writel(lower_word, amd_manager->mmio + ACP_SW_IMM_CMD_LOWER_QWORD); + + sts = acp_reg_readl(amd_manager->mmio + ACP_SW_IMM_CMD_STS); + while (!(sts & AMD_SDW_IMM_RES_VALID)) { + if (timeout++ > AMD_SDW_RETRY_COUNT) { + dev_err(amd_manager->dev, "SDW%x cmd response timeout occurred\n", + amd_manager->instance); + return -ETIMEDOUT; + } + usleep_range(5, 10); + sts = acp_reg_readl(amd_manager->mmio + ACP_SW_IMM_CMD_STS); + } + resp_upper = acp_reg_readl(amd_manager->mmio + ACP_SW_IMM_RESP_UPPER_WORD); + resp_lower = acp_reg_readl(amd_manager->mmio + ACP_SW_IMM_RESP_LOWER_QWORD); + + timeout = 0; + acp_reg_writel(AMD_SDW_IMM_RES_VALID, amd_manager->mmio + ACP_SW_IMM_CMD_STS); + sts = acp_reg_readl(amd_manager->mmio + ACP_SW_IMM_CMD_STS); + while ((sts & AMD_SDW_IMM_RES_VALID)) { + if (timeout++ > AMD_SDW_RETRY_COUNT) { + dev_err(amd_manager->dev, "SDW%x cmd status retry failed\n", + amd_manager->instance); + return -ETIMEDOUT; + } + usleep_range(5, 10); + sts = acp_reg_readl(amd_manager->mmio + ACP_SW_IMM_CMD_STS); + } + resp = resp_upper; + resp = (resp << 32) | resp_lower; + return resp; +} + +static enum sdw_command_response +amd_program_scp_addr(struct amd_sdw_manager *amd_manager, struct sdw_msg *msg) +{ + struct sdw_msg scp_msg = {0}; + u64 response_buf[2] = {0}; + u32 upper_word = 0, lower_word = 0; + int nack = 0, no_ack = 0; + int index, timeout = 0; + + scp_msg.dev_num = msg->dev_num; + scp_msg.addr = SDW_SCP_ADDRPAGE1; + scp_msg.buf = &msg->addr_page1; + amd_sdw_ctl_word_prep(&lower_word, &upper_word, AMD_SDW_CMD_WRITE, &scp_msg, 0); + response_buf[0] = amd_sdw_send_cmd_get_resp(amd_manager, lower_word, upper_word); + scp_msg.addr = SDW_SCP_ADDRPAGE2; + scp_msg.buf = &msg->addr_page2; + amd_sdw_ctl_word_prep(&lower_word, &upper_word, AMD_SDW_CMD_WRITE, &scp_msg, 0); + response_buf[1] = amd_sdw_send_cmd_get_resp(amd_manager, lower_word, upper_word); + + for (index = 0; index < 2; index++) { + if (response_buf[index] == -ETIMEDOUT) { + dev_err(amd_manager->dev, "Program SCP cmd timeout\n"); + timeout = 1; + } else if (!(response_buf[index] & AMD_SDW_MCP_RESP_ACK)) { + no_ack = 1; + if (response_buf[index] & AMD_SDW_MCP_RESP_NACK) { + nack = 1; + dev_err(amd_manager->dev, "Program SCP NACK received\n"); + } + } + } + + if (timeout) { + dev_err_ratelimited(amd_manager->dev, + "SCP_addrpage command timeout for Slave %d\n", msg->dev_num); + return SDW_CMD_TIMEOUT; + } + + if (nack) { + dev_err_ratelimited(amd_manager->dev, + "SCP_addrpage NACKed for Slave %d\n", msg->dev_num); + return SDW_CMD_FAIL; + } + + if (no_ack) { + dev_dbg_ratelimited(amd_manager->dev, + "SCP_addrpage ignored for Slave %d\n", msg->dev_num); + return SDW_CMD_IGNORED; + } + return SDW_CMD_OK; +} + +static int amd_prep_msg(struct amd_sdw_manager *amd_manager, struct sdw_msg *msg, int *cmd) +{ + int ret; + + if (msg->page) { + ret = amd_program_scp_addr(amd_manager, msg); + if (ret) { + msg->len = 0; + return ret; + } + } + switch (msg->flags) { + case SDW_MSG_FLAG_READ: + *cmd = AMD_SDW_CMD_READ; + break; + case SDW_MSG_FLAG_WRITE: + *cmd = AMD_SDW_CMD_WRITE; + break; + default: + dev_err(amd_manager->dev, "Invalid msg cmd: %d\n", msg->flags); + return -EINVAL; + } + return 0; +} + +static enum sdw_command_response amd_sdw_fill_msg_resp(struct amd_sdw_manager *amd_manager, + struct sdw_msg *msg, u64 response, + int offset) +{ + int nack = 0, no_ack = 0; + int timeout = 0; + + if (response & AMD_SDW_MCP_RESP_ACK) { + if (msg->flags == SDW_MSG_FLAG_READ) + msg->buf[offset] = FIELD_GET(AMD_SDW_MCP_RESP_RDATA, response); + } else { + no_ack = 1; + if (response == -ETIMEDOUT) { + timeout = 1; + } else if (response & AMD_SDW_MCP_RESP_NACK) { + nack = 1; + dev_err(amd_manager->dev, "Program SCP NACK received\n"); + } + } + + if (timeout) { + dev_err_ratelimited(amd_manager->dev, "command timeout for Slave %d\n", + msg->dev_num); + return SDW_CMD_TIMEOUT; + } + if (nack) { + dev_err_ratelimited(amd_manager->dev, + "command response NACK received for Slave %d\n", msg->dev_num); + return SDW_CMD_FAIL; + } + + if (no_ack) { + dev_err_ratelimited(amd_manager->dev, "command is ignored for Slave %d\n", + msg->dev_num); + return SDW_CMD_IGNORED; + } + return SDW_CMD_OK; +} + +static unsigned int _amd_sdw_xfer_msg(struct amd_sdw_manager *amd_manager, struct sdw_msg *msg, + int cmd, int cmd_offset) +{ + u64 response; + u32 upper_word = 0, lower_word = 0; + + amd_sdw_ctl_word_prep(&lower_word, &upper_word, cmd, msg, cmd_offset); + response = amd_sdw_send_cmd_get_resp(amd_manager, lower_word, upper_word); + return amd_sdw_fill_msg_resp(amd_manager, msg, response, cmd_offset); +} + +static enum sdw_command_response amd_sdw_xfer_msg(struct sdw_bus *bus, struct sdw_msg *msg) +{ + struct amd_sdw_manager *amd_manager = to_amd_sdw(bus); + int ret, i; + int cmd = 0; + + ret = amd_prep_msg(amd_manager, msg, &cmd); + if (ret) + return SDW_CMD_FAIL_OTHER; + for (i = 0; i < msg->len; i++) { + ret = _amd_sdw_xfer_msg(amd_manager, msg, cmd, i); + if (ret) + return ret; + } + return SDW_CMD_OK; +} + +static u32 amd_sdw_read_ping_status(struct sdw_bus *bus) +{ + struct amd_sdw_manager *amd_manager = to_amd_sdw(bus); + u64 response; + u32 slave_stat; + + response = amd_sdw_send_cmd_get_resp(amd_manager, 0, 0); + /* slave status from ping response */ + slave_stat = FIELD_GET(AMD_SDW_MCP_SLAVE_STAT_0_3, response); + slave_stat |= FIELD_GET(AMD_SDW_MCP_SLAVE_STAT_4_11, response) << 8; + dev_dbg(amd_manager->dev, "slave_stat:0x%x\n", slave_stat); + return slave_stat; +} + +static int amd_sdw_compute_params(struct sdw_bus *bus) +{ + struct sdw_transport_data t_data = {0}; + struct sdw_master_runtime *m_rt; + struct sdw_port_runtime *p_rt; + struct sdw_bus_params *b_params = &bus->params; + int port_bo, hstart, hstop, sample_int; + unsigned int rate, bps; + + port_bo = 0; + hstart = 1; + hstop = bus->params.col - 1; + t_data.hstop = hstop; + t_data.hstart = hstart; + + list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) { + rate = m_rt->stream->params.rate; + bps = m_rt->stream->params.bps; + sample_int = (bus->params.curr_dr_freq / rate); + list_for_each_entry(p_rt, &m_rt->port_list, port_node) { + port_bo = (p_rt->num * 64) + 1; + dev_dbg(bus->dev, "p_rt->num=%d hstart=%d hstop=%d port_bo=%d\n", + p_rt->num, hstart, hstop, port_bo); + sdw_fill_xport_params(&p_rt->transport_params, p_rt->num, + false, SDW_BLK_GRP_CNT_1, sample_int, + port_bo, port_bo >> 8, hstart, hstop, + SDW_BLK_PKG_PER_PORT, 0x0); + + sdw_fill_port_params(&p_rt->port_params, + p_rt->num, bps, + SDW_PORT_FLOW_MODE_ISOCH, + b_params->m_data_mode); + t_data.hstart = hstart; + t_data.hstop = hstop; + t_data.block_offset = port_bo; + t_data.sub_block_offset = 0; + } + sdw_compute_slave_ports(m_rt, &t_data); + } + return 0; +} + +static int amd_sdw_port_params(struct sdw_bus *bus, struct sdw_port_params *p_params, + unsigned int bank) +{ + struct amd_sdw_manager *amd_manager = to_amd_sdw(bus); + u32 frame_fmt_reg, dpn_frame_fmt; + + dev_dbg(amd_manager->dev, "p_params->num:0x%x\n", p_params->num); + switch (amd_manager->instance) { + case ACP_SDW0: + frame_fmt_reg = sdw0_manager_dp_reg[p_params->num].frame_fmt_reg; + break; + case ACP_SDW1: + frame_fmt_reg = sdw1_manager_dp_reg[p_params->num].frame_fmt_reg; + break; + default: + return -EINVAL; + } + + dpn_frame_fmt = acp_reg_readl(amd_manager->mmio + frame_fmt_reg); + u32p_replace_bits(&dpn_frame_fmt, p_params->flow_mode, AMD_DPN_FRAME_FMT_PFM); + u32p_replace_bits(&dpn_frame_fmt, p_params->data_mode, AMD_DPN_FRAME_FMT_PDM); + u32p_replace_bits(&dpn_frame_fmt, p_params->bps - 1, AMD_DPN_FRAME_FMT_WORD_LEN); + acp_reg_writel(dpn_frame_fmt, amd_manager->mmio + frame_fmt_reg); + return 0; +} + +static int amd_sdw_transport_params(struct sdw_bus *bus, + struct sdw_transport_params *params, + enum sdw_reg_bank bank) +{ + struct amd_sdw_manager *amd_manager = to_amd_sdw(bus); + u32 dpn_frame_fmt; + u32 dpn_sampleinterval; + u32 dpn_hctrl; + u32 dpn_offsetctrl; + u32 dpn_lanectrl; + u32 frame_fmt_reg, sample_int_reg, hctrl_dp0_reg; + u32 offset_reg, lane_ctrl_ch_en_reg; + + switch (amd_manager->instance) { + case ACP_SDW0: + frame_fmt_reg = sdw0_manager_dp_reg[params->port_num].frame_fmt_reg; + sample_int_reg = sdw0_manager_dp_reg[params->port_num].sample_int_reg; + hctrl_dp0_reg = sdw0_manager_dp_reg[params->port_num].hctrl_dp0_reg; + offset_reg = sdw0_manager_dp_reg[params->port_num].offset_reg; + lane_ctrl_ch_en_reg = sdw0_manager_dp_reg[params->port_num].lane_ctrl_ch_en_reg; + break; + case ACP_SDW1: + frame_fmt_reg = sdw1_manager_dp_reg[params->port_num].frame_fmt_reg; + sample_int_reg = sdw1_manager_dp_reg[params->port_num].sample_int_reg; + hctrl_dp0_reg = sdw1_manager_dp_reg[params->port_num].hctrl_dp0_reg; + offset_reg = sdw1_manager_dp_reg[params->port_num].offset_reg; + lane_ctrl_ch_en_reg = sdw1_manager_dp_reg[params->port_num].lane_ctrl_ch_en_reg; + break; + default: + return -EINVAL; + } + acp_reg_writel(AMD_SDW_SSP_COUNTER_VAL, amd_manager->mmio + ACP_SW_SSP_COUNTER); + + dpn_frame_fmt = acp_reg_readl(amd_manager->mmio + frame_fmt_reg); + u32p_replace_bits(&dpn_frame_fmt, params->blk_pkg_mode, AMD_DPN_FRAME_FMT_BLK_PKG_MODE); + u32p_replace_bits(&dpn_frame_fmt, params->blk_grp_ctrl, AMD_DPN_FRAME_FMT_BLK_GRP_CTRL); + u32p_replace_bits(&dpn_frame_fmt, SDW_STREAM_PCM, AMD_DPN_FRAME_FMT_PCM_OR_PDM); + acp_reg_writel(dpn_frame_fmt, amd_manager->mmio + frame_fmt_reg); + + dpn_sampleinterval = params->sample_interval - 1; + acp_reg_writel(dpn_sampleinterval, amd_manager->mmio + sample_int_reg); + + dpn_hctrl = FIELD_PREP(AMD_DPN_HCTRL_HSTOP, params->hstop); + dpn_hctrl |= FIELD_PREP(AMD_DPN_HCTRL_HSTART, params->hstart); + acp_reg_writel(dpn_hctrl, amd_manager->mmio + hctrl_dp0_reg); + + dpn_offsetctrl = FIELD_PREP(AMD_DPN_OFFSET_CTRL_1, params->offset1); + dpn_offsetctrl |= FIELD_PREP(AMD_DPN_OFFSET_CTRL_2, params->offset2); + acp_reg_writel(dpn_offsetctrl, amd_manager->mmio + offset_reg); + + /* + * lane_ctrl_ch_en_reg will be used to program lane_ctrl and ch_mask + * parameters. + */ + dpn_lanectrl = acp_reg_readl(amd_manager->mmio + lane_ctrl_ch_en_reg); + u32p_replace_bits(&dpn_lanectrl, params->lane_ctrl, AMD_DPN_CH_EN_LCTRL); + acp_reg_writel(dpn_lanectrl, amd_manager->mmio + lane_ctrl_ch_en_reg); + return 0; +} + +static int amd_sdw_port_enable(struct sdw_bus *bus, + struct sdw_enable_ch *enable_ch, + unsigned int bank) +{ + struct amd_sdw_manager *amd_manager = to_amd_sdw(bus); + u32 dpn_ch_enable; + u32 lane_ctrl_ch_en_reg; + + switch (amd_manager->instance) { + case ACP_SDW0: + lane_ctrl_ch_en_reg = sdw0_manager_dp_reg[enable_ch->port_num].lane_ctrl_ch_en_reg; + break; + case ACP_SDW1: + lane_ctrl_ch_en_reg = sdw1_manager_dp_reg[enable_ch->port_num].lane_ctrl_ch_en_reg; + break; + default: + return -EINVAL; + } + + /* + * lane_ctrl_ch_en_reg will be used to program lane_ctrl and ch_mask + * parameters. + */ + dpn_ch_enable = acp_reg_readl(amd_manager->mmio + lane_ctrl_ch_en_reg); + u32p_replace_bits(&dpn_ch_enable, enable_ch->ch_mask, AMD_DPN_CH_EN_CHMASK); + if (enable_ch->enable) + acp_reg_writel(dpn_ch_enable, amd_manager->mmio + lane_ctrl_ch_en_reg); + else + acp_reg_writel(0, amd_manager->mmio + lane_ctrl_ch_en_reg); + return 0; +} + +static int sdw_master_read_amd_prop(struct sdw_bus *bus) +{ + struct amd_sdw_manager *amd_manager = to_amd_sdw(bus); + struct fwnode_handle *link; + struct sdw_master_prop *prop; + u32 quirk_mask = 0; + u32 wake_en_mask = 0; + u32 power_mode_mask = 0; + char name[32]; + + prop = &bus->prop; + /* Find manager handle */ + snprintf(name, sizeof(name), "mipi-sdw-link-%d-subproperties", bus->link_id); + link = device_get_named_child_node(bus->dev, name); + if (!link) { + dev_err(bus->dev, "Manager node %s not found\n", name); + return -EIO; + } + fwnode_property_read_u32(link, "amd-sdw-enable", &quirk_mask); + if (!(quirk_mask & AMD_SDW_QUIRK_MASK_BUS_ENABLE)) + prop->hw_disabled = true; + prop->quirks = SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH | + SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY; + + fwnode_property_read_u32(link, "amd-sdw-wakeup-enable", &wake_en_mask); + amd_manager->wake_en_mask = wake_en_mask; + fwnode_property_read_u32(link, "amd-sdw-power-mode", &power_mode_mask); + amd_manager->power_mode_mask = power_mode_mask; + return 0; +} + +static int amd_prop_read(struct sdw_bus *bus) +{ + sdw_master_read_prop(bus); + sdw_master_read_amd_prop(bus); + return 0; +} + +static const struct sdw_master_port_ops amd_sdw_port_ops = { + .dpn_set_port_params = amd_sdw_port_params, + .dpn_set_port_transport_params = amd_sdw_transport_params, + .dpn_port_enable_ch = amd_sdw_port_enable, +}; + +static const struct sdw_master_ops amd_sdw_ops = { + .read_prop = amd_prop_read, + .xfer_msg = amd_sdw_xfer_msg, + .read_ping_status = amd_sdw_read_ping_status, +}; + +static void amd_sdw_probe_work(struct work_struct *work) +{ + struct amd_sdw_manager *amd_manager = container_of(work, struct amd_sdw_manager, + probe_work); + struct sdw_master_prop *prop; + int ret; + + prop = &amd_manager->bus.prop; + if (!prop->hw_disabled) { + amd_enable_sdw_pads(amd_manager); + ret = amd_init_sdw_manager(amd_manager); + if (ret) + return; + amd_enable_sdw_interrupts(amd_manager); + ret = amd_enable_sdw_manager(amd_manager); + if (ret) + return; + amd_sdw_set_frameshape(amd_manager); + } +} + +static int amd_sdw_manager_probe(struct platform_device *pdev) +{ + const struct acp_sdw_pdata *pdata = pdev->dev.platform_data; + struct resource *res; + struct device *dev = &pdev->dev; + struct sdw_master_prop *prop; + struct sdw_bus_params *params; + struct amd_sdw_manager *amd_manager; + int ret; + + amd_manager = devm_kzalloc(dev, sizeof(struct amd_sdw_manager), GFP_KERNEL); + if (!amd_manager) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENOMEM; + + amd_manager->acp_mmio = devm_ioremap(dev, res->start, resource_size(res)); + if (IS_ERR(amd_manager->mmio)) { + dev_err(dev, "mmio not found\n"); + return PTR_ERR(amd_manager->mmio); + } + amd_manager->instance = pdata->instance; + amd_manager->mmio = amd_manager->acp_mmio + + (amd_manager->instance * SDW_MANAGER_REG_OFFSET); + amd_manager->acp_sdw_lock = pdata->acp_sdw_lock; + amd_manager->cols_index = sdw_find_col_index(AMD_SDW_DEFAULT_COLUMNS); + amd_manager->rows_index = sdw_find_row_index(AMD_SDW_DEFAULT_ROWS); + amd_manager->dev = dev; + amd_manager->bus.ops = &amd_sdw_ops; + amd_manager->bus.port_ops = &amd_sdw_port_ops; + amd_manager->bus.compute_params = &amd_sdw_compute_params; + amd_manager->bus.clk_stop_timeout = 200; + amd_manager->bus.link_id = amd_manager->instance; + switch (amd_manager->instance) { + case ACP_SDW0: + amd_manager->num_dout_ports = AMD_SDW0_MAX_TX_PORTS; + amd_manager->num_din_ports = AMD_SDW0_MAX_RX_PORTS; + break; + case ACP_SDW1: + amd_manager->num_dout_ports = AMD_SDW1_MAX_TX_PORTS; + amd_manager->num_din_ports = AMD_SDW1_MAX_RX_PORTS; + break; + default: + return -EINVAL; + } + amd_manager->reg_mask = &sdw_manager_reg_mask_array[amd_manager->instance]; + params = &amd_manager->bus.params; + params->max_dr_freq = AMD_SDW_DEFAULT_CLK_FREQ * 2; + params->curr_dr_freq = AMD_SDW_DEFAULT_CLK_FREQ * 2; + params->col = AMD_SDW_DEFAULT_COLUMNS; + params->row = AMD_SDW_DEFAULT_ROWS; + prop = &amd_manager->bus.prop; + prop->clk_freq = &amd_sdw_freq_tbl[0]; + prop->mclk_freq = AMD_SDW_BUS_BASE_FREQ; + + ret = sdw_bus_master_add(&amd_manager->bus, dev, dev->fwnode); + if (ret) { + dev_err(dev, "Failed to register SoundWire manager(%d)\n", ret); + return ret; + } + dev_set_drvdata(dev, amd_manager); + INIT_WORK(&amd_manager->probe_work, amd_sdw_probe_work); + /* + * Instead of having lengthy probe sequence, use deferred probe. + */ + schedule_work(&amd_manager->probe_work); + return 0; +} + +static int amd_sdw_manager_remove(struct platform_device *pdev) +{ + struct amd_sdw_manager *amd_manager = dev_get_drvdata(&pdev->dev); + + cancel_work_sync(&amd_manager->probe_work); + amd_disable_sdw_interrupts(amd_manager); + sdw_bus_master_delete(&amd_manager->bus); + return amd_disable_sdw_manager(amd_manager); +} + +static struct platform_driver amd_sdw_driver = { + .probe = &amd_sdw_manager_probe, + .remove = &amd_sdw_manager_remove, + .driver = { + .name = "amd_sdw_manager", + } +}; +module_platform_driver(amd_sdw_driver); + +MODULE_AUTHOR("Vijendar.Mukunda@amd.com"); +MODULE_DESCRIPTION("AMD SoundWire driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/drivers/soundwire/amd_manager.h b/drivers/soundwire/amd_manager.h new file mode 100644 index 000000000000..811ed9ee3d86 --- /dev/null +++ b/drivers/soundwire/amd_manager.h @@ -0,0 +1,252 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. + */ + +#ifndef __AMD_MANAGER_H +#define __AMD_MANAGER_H + +#include + +#define SDW_MANAGER_REG_OFFSET 0xC00 +#define AMD_SDW_DEFAULT_ROWS 50 +#define AMD_SDW_DEFAULT_COLUMNS 10 +#define ACP_PAD_PULLDOWN_CTRL 0x0001448 +#define ACP_SW_PAD_KEEPER_EN 0x0001454 +#define ACP_SW0_WAKE_EN 0x0001458 +#define ACP_EXTERNAL_INTR_CNTL0 0x0001A04 +#define ACP_EXTERNAL_INTR_STAT0 0x0001A0C +#define ACP_EXTERNAL_INTR_CNTL(i) (ACP_EXTERNAL_INTR_CNTL0 + ((i) * 4)) +#define ACP_EXTERNAL_INTR_STAT(i) (ACP_EXTERNAL_INTR_STAT0 + ((i) * 4)) +#define ACP_SW_WAKE_EN(i) (ACP_SW0_WAKE_EN + ((i) * 8)) + +#define ACP_SW_EN 0x0003000 +#define ACP_SW_EN_STATUS 0x0003004 +#define ACP_SW_FRAMESIZE 0x0003008 +#define ACP_SW_SSP_COUNTER 0x000300C +#define ACP_SW_AUDIO0_TX_EN 0x0003010 +#define ACP_SW_AUDIO0_TX_EN_STATUS 0x0003014 +#define ACP_SW_AUDIO0_TX_FRAME_FORMAT 0x0003018 +#define ACP_SW_AUDIO0_TX_SAMPLEINTERVAL 0x000301C +#define ACP_SW_AUDIO0_TX_HCTRL_DP0 0x0003020 +#define ACP_SW_AUDIO0_TX_HCTRL_DP1 0x0003024 +#define ACP_SW_AUDIO0_TX_HCTRL_DP2 0x0003028 +#define ACP_SW_AUDIO0_TX_HCTRL_DP3 0x000302C +#define ACP_SW_AUDIO0_TX_OFFSET_DP0 0x0003030 +#define ACP_SW_AUDIO0_TX_OFFSET_DP1 0x0003034 +#define ACP_SW_AUDIO0_TX_OFFSET_DP2 0x0003038 +#define ACP_SW_AUDIO0_TX_OFFSET_DP3 0x000303C +#define ACP_SW_AUDIO0_TX_CHANNEL_ENABLE_DP0 0x0003040 +#define ACP_SW_AUDIO0_TX_CHANNEL_ENABLE_DP1 0x0003044 +#define ACP_SW_AUDIO0_TX_CHANNEL_ENABLE_DP2 0x0003048 +#define ACP_SW_AUDIO0_TX_CHANNEL_ENABLE_DP3 0x000304C +#define ACP_SW_AUDIO1_TX_EN 0x0003050 +#define ACP_SW_AUDIO1_TX_EN_STATUS 0x0003054 +#define ACP_SW_AUDIO1_TX_FRAME_FORMAT 0x0003058 +#define ACP_SW_AUDIO1_TX_SAMPLEINTERVAL 0x000305C +#define ACP_SW_AUDIO1_TX_HCTRL 0x0003060 +#define ACP_SW_AUDIO1_TX_OFFSET 0x0003064 +#define ACP_SW_AUDIO1_TX_CHANNEL_ENABLE_DP0 0x0003068 +#define ACP_SW_AUDIO2_TX_EN 0x000306C +#define ACP_SW_AUDIO2_TX_EN_STATUS 0x0003070 +#define ACP_SW_AUDIO2_TX_FRAME_FORMAT 0x0003074 +#define ACP_SW_AUDIO2_TX_SAMPLEINTERVAL 0x0003078 +#define ACP_SW_AUDIO2_TX_HCTRL 0x000307C +#define ACP_SW_AUDIO2_TX_OFFSET 0x0003080 +#define ACP_SW_AUDIO2_TX_CHANNEL_ENABLE_DP0 0x0003084 +#define ACP_SW_AUDIO0_RX_EN 0x0003088 +#define ACP_SW_AUDIO0_RX_EN_STATUS 0x000308C +#define ACP_SW_AUDIO0_RX_FRAME_FORMAT 0x0003090 +#define ACP_SW_AUDIO0_RX_SAMPLEINTERVAL 0x0003094 +#define ACP_SW_AUDIO0_RX_HCTRL_DP0 0x0003098 +#define ACP_SW_AUDIO0_RX_HCTRL_DP1 0x000309C +#define ACP_SW_AUDIO0_RX_HCTRL_DP2 0x0003100 +#define ACP_SW_AUDIO0_RX_HCTRL_DP3 0x0003104 +#define ACP_SW_AUDIO0_RX_OFFSET_DP0 0x0003108 +#define ACP_SW_AUDIO0_RX_OFFSET_DP1 0x000310C +#define ACP_SW_AUDIO0_RX_OFFSET_DP2 0x0003110 +#define ACP_SW_AUDIO0_RX_OFFSET_DP3 0x0003114 +#define ACP_SW_AUDIO0_RX_CHANNEL_ENABLE_DP0 0x0003118 +#define ACP_SW_AUDIO0_RX_CHANNEL_ENABLE_DP1 0x000311C +#define ACP_SW_AUDIO0_RX_CHANNEL_ENABLE_DP2 0x0003120 +#define ACP_SW_AUDIO0_RX_CHANNEL_ENABLE_DP3 0x0003124 +#define ACP_SW_AUDIO1_RX_EN 0x0003128 +#define ACP_SW_AUDIO1_RX_EN_STATUS 0x000312C +#define ACP_SW_AUDIO1_RX_FRAME_FORMAT 0x0003130 +#define ACP_SW_AUDIO1_RX_SAMPLEINTERVAL 0x0003134 +#define ACP_SW_AUDIO1_RX_HCTRL 0x0003138 +#define ACP_SW_AUDIO1_RX_OFFSET 0x000313C +#define ACP_SW_AUDIO1_RX_CHANNEL_ENABLE_DP0 0x0003140 +#define ACP_SW_AUDIO2_RX_EN 0x0003144 +#define ACP_SW_AUDIO2_RX_EN_STATUS 0x0003148 +#define ACP_SW_AUDIO2_RX_FRAME_FORMAT 0x000314C +#define ACP_SW_AUDIO2_RX_SAMPLEINTERVAL 0x0003150 +#define ACP_SW_AUDIO2_RX_HCTRL 0x0003154 +#define ACP_SW_AUDIO2_RX_OFFSET 0x0003158 +#define ACP_SW_AUDIO2_RX_CHANNEL_ENABLE_DP0 0x000315C +#define ACP_SW_BPT_PORT_EN 0x0003160 +#define ACP_SW_BPT_PORT_EN_STATUS 0x0003164 +#define ACP_SW_BPT_PORT_FRAME_FORMAT 0x0003168 +#define ACP_SW_BPT_PORT_SAMPLEINTERVAL 0x000316C +#define ACP_SW_BPT_PORT_HCTRL 0x0003170 +#define ACP_SW_BPT_PORT_OFFSET 0x0003174 +#define ACP_SW_BPT_PORT_CHANNEL_ENABLE 0x0003178 +#define ACP_SW_BPT_PORT_FIRST_BYTE_ADDR 0x000317C +#define ACP_SW_CLK_RESUME_CTRL 0x0003180 +#define ACP_SW_CLK_RESUME_DELAY_CNTR 0x0003184 +#define ACP_SW_BUS_RESET_CTRL 0x0003188 +#define ACP_SW_PRBS_ERR_STATUS 0x000318C +#define ACP_SW_IMM_CMD_UPPER_WORD 0x0003230 +#define ACP_SW_IMM_CMD_LOWER_QWORD 0x0003234 +#define ACP_SW_IMM_RESP_UPPER_WORD 0x0003238 +#define ACP_SW_IMM_RESP_LOWER_QWORD 0x000323C +#define ACP_SW_IMM_CMD_STS 0x0003240 +#define ACP_SW_BRA_BASE_ADDRESS 0x0003244 +#define ACP_SW_BRA_TRANSFER_SIZE 0x0003248 +#define ACP_SW_BRA_DMA_BUSY 0x000324C +#define ACP_SW_BRA_RESP 0x0003250 +#define ACP_SW_BRA_RESP_FRAME_ADDR 0x0003254 +#define ACP_SW_BRA_CURRENT_TRANSFER_SIZE 0x0003258 +#define ACP_SW_STATE_CHANGE_STATUS_0TO7 0x000325C +#define ACP_SW_STATE_CHANGE_STATUS_8TO11 0x0003260 +#define ACP_SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003264 +#define ACP_SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003268 +#define ACP_SW_CLK_FREQUENCY_CTRL 0x000326C +#define ACP_SW_ERROR_INTR_MASK 0x0003270 +#define ACP_SW_PHY_TEST_MODE_DATA_OFF 0x0003274 + +#define AMD_DELAY_LOOP_ITERATION 1000 +#define AMD_SDW_DEFAULT_CLK_FREQ 12000000 +#define AMD_SDW_RETRY_COUNT 1000 + +#define AMD_SDW_MCP_RESP_ACK BIT(0) +#define AMD_SDW_MCP_RESP_NACK BIT(1) +#define AMD_SDW_MCP_RESP_RDATA GENMASK(14, 7) + +#define AMD_SDW_MCP_CMD_SSP_TAG BIT(31) +#define AMD_SDW_MCP_CMD_COMMAND GENMASK(14, 12) +#define AMD_SDW_MCP_CMD_DEV_ADDR GENMASK(11, 8) +#define AMD_SDW_MCP_CMD_REG_ADDR_HIGH GENMASK(7, 0) +#define AMD_SDW_MCP_CMD_REG_ADDR_LOW GENMASK(31, 24) +#define AMD_SDW_MCP_CMD_REG_DATA GENMASK(14, 7) +#define AMD_SDW_MCP_SLAVE_STAT_0_3 GENMASK(14, 7) +#define AMD_SDW_MCP_SLAVE_STAT_4_11 GENMASK_ULL(39, 24) +#define AMD_SDW_MCP_SLAVE_STATUS_MASK GENMASK(1, 0) +#define AMD_SDW_MCP_SLAVE_STATUS_BITS GENMASK(3, 2) +#define AMD_SDW_MCP_SLAVE_STATUS_8TO_11 GENMASK_ULL(15, 0) +#define AMD_SDW_MCP_SLAVE_STATUS_VALID_MASK(x) BIT(((x) * 4)) +#define AMD_SDW_MCP_SLAVE_STAT_SHIFT_MASK(x) (((x) * 4) + 1) + +#define AMD_SDW_MASTER_SUSPEND_DELAY_MS 2000 +#define AMD_SDW_CLK_STOP_MAX_RETRY_COUNT 100 +#define AMD_SDW_QUIRK_MASK_BUS_ENABLE BIT(0) + +#define AMD_SDW_IMM_RES_VALID 1 +#define AMD_SDW_IMM_CMD_BUSY 2 +#define AMD_SDW_ENABLE 1 +#define AMD_SDW_DISABLE 0 +#define AMD_SDW_BUS_RESET_CLEAR_REQ 0 +#define AMD_SDW_BUS_RESET_REQ 1 +#define AMD_SDW_BUS_RESET_DONE 2 +#define AMD_SDW_BUS_BASE_FREQ 24000000 + +#define AMD_SDW0_EXT_INTR_MASK 0x200000 +#define AMD_SDW1_EXT_INTR_MASK 4 +#define AMD_SDW_IRQ_MASK_0TO7 0x77777777 +#define AMD_SDW_IRQ_MASK_8TO11 0x000D7777 +#define AMD_SDW_IRQ_ERROR_MASK 0xFF +#define AMD_SDW_MAX_FREQ_NUM 1 +#define AMD_SDW0_MAX_TX_PORTS 3 +#define AMD_SDW0_MAX_RX_PORTS 3 +#define AMD_SDW1_MAX_TX_PORTS 1 +#define AMD_SDW1_MAX_RX_PORTS 1 +#define AMD_SDW0_MAX_DAI 6 +#define AMD_SDW1_MAX_DAI 2 +#define AMD_SDW_SLAVE_0_ATTACHED 5 +#define AMD_SDW_SSP_COUNTER_VAL 3 + +#define AMD_DPN_FRAME_FMT_PFM GENMASK(1, 0) +#define AMD_DPN_FRAME_FMT_PDM GENMASK(3, 2) +#define AMD_DPN_FRAME_FMT_BLK_PKG_MODE BIT(4) +#define AMD_DPN_FRAME_FMT_BLK_GRP_CTRL GENMASK(6, 5) +#define AMD_DPN_FRAME_FMT_WORD_LEN GENMASK(12, 7) +#define AMD_DPN_FRAME_FMT_PCM_OR_PDM BIT(13) +#define AMD_DPN_HCTRL_HSTOP GENMASK(3, 0) +#define AMD_DPN_HCTRL_HSTART GENMASK(7, 4) +#define AMD_DPN_OFFSET_CTRL_1 GENMASK(7, 0) +#define AMD_DPN_OFFSET_CTRL_2 GENMASK(15, 8) +#define AMD_DPN_CH_EN_LCTRL GENMASK(2, 0) +#define AMD_DPN_CH_EN_CHMASK GENMASK(10, 3) +#define AMD_SDW_STAT_MAX_RETRY_COUNT 100 +#define AMD_SDW0_PAD_PULLDOWN_CTRL_ENABLE_MASK 0x7F9F +#define AMD_SDW1_PAD_PULLDOWN_CTRL_ENABLE_MASK 0x7FFA +#define AMD_SDW0_PAD_PULLDOWN_CTRL_DISABLE_MASK 0x60 +#define AMD_SDW1_PAD_PULLDOWN_CTRL_DISABLE_MASK 5 +#define AMD_SDW0_PAD_KEEPER_EN_MASK 1 +#define AMD_SDW1_PAD_KEEPER_EN_MASK 0x10 +#define AMD_SDW0_PAD_KEEPER_DISABLE_MASK 0x1E +#define AMD_SDW1_PAD_KEEPER_DISABLE_MASK 0xF + +enum amd_sdw_cmd_type { + AMD_SDW_CMD_PING = 0, + AMD_SDW_CMD_READ = 2, + AMD_SDW_CMD_WRITE = 3, +}; + +static u32 amd_sdw_freq_tbl[AMD_SDW_MAX_FREQ_NUM] = { + AMD_SDW_DEFAULT_CLK_FREQ, +}; + +struct sdw_manager_dp_reg { + u32 frame_fmt_reg; + u32 sample_int_reg; + u32 hctrl_dp0_reg; + u32 offset_reg; + u32 lane_ctrl_ch_en_reg; +}; + +static struct sdw_manager_dp_reg sdw0_manager_dp_reg[AMD_SDW0_MAX_DAI] = { + {ACP_SW_AUDIO0_TX_FRAME_FORMAT, ACP_SW_AUDIO0_TX_SAMPLEINTERVAL, ACP_SW_AUDIO0_TX_HCTRL_DP0, + ACP_SW_AUDIO0_TX_OFFSET_DP0, ACP_SW_AUDIO0_TX_CHANNEL_ENABLE_DP0}, + {ACP_SW_AUDIO1_TX_FRAME_FORMAT, ACP_SW_AUDIO1_TX_SAMPLEINTERVAL, ACP_SW_AUDIO1_TX_HCTRL, + ACP_SW_AUDIO1_TX_OFFSET, ACP_SW_AUDIO1_TX_CHANNEL_ENABLE_DP0}, + {ACP_SW_AUDIO2_TX_FRAME_FORMAT, ACP_SW_AUDIO2_TX_SAMPLEINTERVAL, ACP_SW_AUDIO2_TX_HCTRL, + ACP_SW_AUDIO2_TX_OFFSET, ACP_SW_AUDIO2_TX_CHANNEL_ENABLE_DP0}, + {ACP_SW_AUDIO0_RX_FRAME_FORMAT, ACP_SW_AUDIO0_RX_SAMPLEINTERVAL, ACP_SW_AUDIO0_RX_HCTRL_DP0, + ACP_SW_AUDIO0_RX_OFFSET_DP0, ACP_SW_AUDIO0_RX_CHANNEL_ENABLE_DP0}, + {ACP_SW_AUDIO1_RX_FRAME_FORMAT, ACP_SW_AUDIO1_RX_SAMPLEINTERVAL, ACP_SW_AUDIO1_RX_HCTRL, + ACP_SW_AUDIO1_RX_OFFSET, ACP_SW_AUDIO1_RX_CHANNEL_ENABLE_DP0}, + {ACP_SW_AUDIO2_RX_FRAME_FORMAT, ACP_SW_AUDIO2_RX_SAMPLEINTERVAL, ACP_SW_AUDIO2_RX_HCTRL, + ACP_SW_AUDIO2_RX_OFFSET, ACP_SW_AUDIO2_RX_CHANNEL_ENABLE_DP0}, +}; + +static struct sdw_manager_dp_reg sdw1_manager_dp_reg[AMD_SDW1_MAX_DAI] = { + {ACP_SW_AUDIO1_TX_FRAME_FORMAT, ACP_SW_AUDIO1_TX_SAMPLEINTERVAL, ACP_SW_AUDIO1_TX_HCTRL, + ACP_SW_AUDIO1_TX_OFFSET, ACP_SW_AUDIO1_TX_CHANNEL_ENABLE_DP0}, + {ACP_SW_AUDIO1_RX_FRAME_FORMAT, ACP_SW_AUDIO1_RX_SAMPLEINTERVAL, ACP_SW_AUDIO1_RX_HCTRL, + ACP_SW_AUDIO1_RX_OFFSET, ACP_SW_AUDIO1_RX_CHANNEL_ENABLE_DP0} +}; + +static struct sdw_manager_reg_mask sdw_manager_reg_mask_array[2] = { + { + AMD_SDW0_PAD_KEEPER_EN_MASK, + AMD_SDW0_PAD_PULLDOWN_CTRL_ENABLE_MASK, + AMD_SDW0_EXT_INTR_MASK + }, + { + AMD_SDW1_PAD_KEEPER_EN_MASK, + AMD_SDW1_PAD_PULLDOWN_CTRL_ENABLE_MASK, + AMD_SDW1_EXT_INTR_MASK + } +}; + +static inline u32 acp_reg_readl(void __iomem *base_addr) +{ + return readl(base_addr); +} + +static inline void acp_reg_writel(u32 val, void __iomem *base_addr) +{ + writel(val, base_addr); +} +#endif diff --git a/include/linux/soundwire/sdw_amd.h b/include/linux/soundwire/sdw_amd.h new file mode 100644 index 000000000000..c14a291a40e8 --- /dev/null +++ b/include/linux/soundwire/sdw_amd.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. + */ + +#ifndef __SDW_AMD_H +#define __SDW_AMD_H + +#include + +#define ACP_SDW0 0 +#define ACP_SDW1 1 + +struct acp_sdw_pdata { + u16 instance; + /* mutex to protect acp common register access */ + struct mutex *acp_sdw_lock; +}; + +struct sdw_manager_reg_mask { + u32 sw_pad_enable_mask; + u32 sw_pad_pulldown_mask; + u32 acp_sdw_intr_mask; +}; + +/** + * struct amd_sdw_manager - amd manager driver context + * @bus: bus handle + * @dev: linux device + * @mmio: SoundWire registers mmio base + * @acp_mmio: acp registers mmio base + * @reg_mask: register mask structure per manager instance + * @probe_work: SoundWire manager probe workqueue + * @acp_sdw_lock: mutex to protect acp share register access + * @num_din_ports: number of input ports + * @num_dout_ports: number of output ports + * @cols_index: Column index in frame shape + * @rows_index: Rows index in frame shape + * @instance: SoundWire manager instance + * @quirks: SoundWire manager quirks + * @wake_en_mask: wake enable mask per SoundWire manager + * @power_mode_mask: flag interprets amd SoundWire manager power mode + */ +struct amd_sdw_manager { + struct sdw_bus bus; + struct device *dev; + + void __iomem *mmio; + void __iomem *acp_mmio; + + struct sdw_manager_reg_mask *reg_mask; + struct work_struct probe_work; + /* mutex to protect acp common register access */ + struct mutex *acp_sdw_lock; + + int num_din_ports; + int num_dout_ports; + + int cols_index; + int rows_index; + + u32 instance; + u32 quirks; + u32 wake_en_mask; + u32 power_mode_mask; +}; +#endif From patchwork Thu Mar 2 06:21:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mukunda,Vijendar" X-Patchwork-Id: 13156750 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1A96DC678D4 for ; Thu, 2 Mar 2023 06:20:04 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 0C44D82B; Thu, 2 Mar 2023 07:19:07 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 0C44D82B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1677737997; bh=nU4nti928euZm+4s0kdW9NnsvQefRdK3zenBriy/7A0=; h=From:To:Subject:Date:In-Reply-To:References:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=JlGpm6sZP33LiUf94kv5TdIfapDBW9az62dr7rq6E4m7sR/CtIwHf+qSXTYcmwJ2n +y88udvj9SAiYxsRH2ny27S1v0Ik1j+7z1ZXV+9RZN4F/F3Tn7gyhtbZXkLnz7jDef EhaMHF6iImc3YhGyFPnq9EtMn4zeuWzdBKVJAqlI= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 67EFCF8052E; Thu, 2 Mar 2023 07:19:06 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id ACC0BF80534; Thu, 2 Mar 2023 07:19:01 +0100 (CET) Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on20619.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe59::619]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 8BF24F80236 for ; Thu, 2 Mar 2023 07:18:53 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 8BF24F80236 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key, unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=USIFqGjk ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=A0nbobrc2TPde6Zp4szh025o+anyc/ju19A/3qSlSjAvmXMwHi4oWW0GUf/kt59DbCzBcibTtCM0X92KnIcAmhy1uITqVYvV4nQ2Mhn6el9vDHqokmAhLftZb/+qiCkkb6LzM3DoXUKomMYDL8NWT6Sm2E8f/uVTg8G0NqFquO0T7qFF8OGDcgv0qg6lku62pzlHrtD9FRc5qwxt1O8aZ14X5gD7/o+JC3ZzN1pV4J7xnQIGbjuf1/IzWS3sYDyM1VzGPepFtkUAV9qemmPjoEuDkW+3qpY1BWvRHf7SQUI1OVFBQPAF0WmP5jRnRomDiS3b3KG+DsVI3SM8KR28UA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=VQ7RdSH3JZNd2G4YyAyN3SuErlTNHebE/R4/V24nR5g=; b=HfTIicY+uXLqCkuRYklTJ0CbKc8jA7NqPZ0R1Bb5eLtYXlYGcuH7NW26JiHa6jzHZP2niblIiJjDYxG5b69AxMr6tN/WGGQvQEqefq3GinAPss1tspVbauFV9rUq3Hax83cZMZ/eg5B76m+8VJGGp/L27/z0dvRXpEgo8weNaIMyj3oCqKknFBu1Ssczh2OjsJssT7RG/L+v49cSkc+125/aL5haO+45Wfd3oAZ5+x3q4C165Ws/S4a1XepAPx7EGGDX3Hjmq8uVehNh0vqO97v6w2dfFtzODNKl/9yp3D0jbK8ihnWDnMKT8Q1UtS7Wo8yjsDF3312TREZ+/ca6bw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=VQ7RdSH3JZNd2G4YyAyN3SuErlTNHebE/R4/V24nR5g=; b=USIFqGjkq+Djx6egVmOhAAATdfa+zY1OwQ3NY15YrTZxBFVeluhr1gccDVnSOdhL7Rf6Uvjtut9UoajhcAzx0rozeUZN5LNNTLXC5ZlSFoLfzZ4vG/xvCKXtq5JL25xW2uvc64SaS5w4StXN6vA/DJZubVzFFmsPX3FOdLbRq4I= Received: from BN0PR04CA0069.namprd04.prod.outlook.com (2603:10b6:408:ea::14) by SJ0PR12MB6830.namprd12.prod.outlook.com (2603:10b6:a03:47c::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.18; Thu, 2 Mar 2023 06:18:49 +0000 Received: from BN8NAM11FT090.eop-nam11.prod.protection.outlook.com (2603:10b6:408:ea:cafe::61) by BN0PR04CA0069.outlook.office365.com (2603:10b6:408:ea::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.19 via Frontend Transport; Thu, 2 Mar 2023 06:18:48 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT090.mail.protection.outlook.com (10.13.177.105) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6156.19 via Frontend Transport; Thu, 2 Mar 2023 06:18:48 +0000 Received: from SATLEXMB08.amd.com (10.181.40.132) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 2 Mar 2023 00:18:47 -0600 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB08.amd.com (10.181.40.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 1 Mar 2023 22:18:34 -0800 Received: from vijendar-X570-GAMING-X.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 2 Mar 2023 00:18:30 -0600 From: Vijendar Mukunda To: Subject: [PATCH V5 3/8] soundwire: amd: register SoundWire manager dai ops Date: Thu, 2 Mar 2023 11:51:02 +0530 Message-ID: <20230302062107.207845-4-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> References: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT090:EE_|SJ0PR12MB6830:EE_ X-MS-Office365-Filtering-Correlation-Id: 978bf477-e934-45e2-2a47-08db1ae5fc74 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Nu0fhatSVhxm/JKSa1fpWU9NaFd/MIHxfC4W47z08flitEVlLdfZsAG+ernariGC+/Ni4AvJGtXVvdxSLhvfcwuwJ4yw33ZQU3p06WNj2qMTOX2wTHiSdF87UFEM9QTKCulYRWhwb3IKIJ/jo3DlpopG6kvD9jmvF2xrP4W4VG+bTqwPS6FUJZzjxPZuTNpOwPY7yWzrH50PZM0/FPdg3v3JQ2CntpCjNta7qG3uPGw65ZSh3+vn5d9QG3d+aZ7hu7SCVlpSG50URqaOfawHSShqtLZl6IOeHR5Zi5bkOnD0orsa0ew+6NvdEw3lP93WNPF9vRXi5VuPnVgImotYL09gvqK+ESknmycuAOon0ynGw1b+qcKeRkQs84mSIxQS6lQ7dBOH50V/1cEBlHacLKQFzP97nUPjjRG5otXhKvtD5u1xQewuUkOkuexrrcpnSxL6eNLrbNjsgYbSiDWvrvJMOfmnX/87Akb2H5Fa1sWXqishoFehWPY4pS8BW7mtuMhpTgeqj0OFWkHVBHn6rcSTbL5nje1ONWqBt6QW/ZSWy9hhUo+sscSEE+vGm5ssSXK0XdTuhz7HNm5FwfCihQjDUoD1mkKVE5VE5BkJ3TQoxCL7wvX1zlXeW/Rm0kVQaoerf2HHpKxBb4uC6OLiRwK9NL0RVp4NFV3uvTmitLTgVHqrmr6yizPO9kqAXOehIaJ79n30cdRI9BWFwSIrT3ONyyC/W806OheLex2q3SA= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(39860400002)(396003)(376002)(346002)(451199018)(36840700001)(46966006)(40470700004)(36756003)(82310400005)(82740400003)(426003)(54906003)(47076005)(478600001)(336012)(316002)(83380400001)(2616005)(966005)(6666004)(7696005)(4326008)(186003)(1076003)(26005)(41300700001)(356005)(2906002)(8936002)(86362001)(5660300002)(70206006)(70586007)(8676002)(36860700001)(6916009)(40480700001)(81166007)(40460700003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2023 06:18:48.7892 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 978bf477-e934-45e2-2a47-08db1ae5fc74 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT090.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6830 Message-ID-Hash: 5B2A4OQOUHMO7T45VPYFLJRMRC4KZHFB X-Message-ID-Hash: 5B2A4OQOUHMO7T45VPYFLJRMRC4KZHFB X-MailFrom: Vijendar.Mukunda@amd.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org, pierre-louis.bossart@linux.intel.com, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, Mario.Limonciello@amd.com, amadeuszx.slawinski@linux.intel.com, Mastan.Katragadda@amd.com, Arungopal.kondaveeti@amd.com, Vijendar Mukunda , Bard Liao , Sanyog Kale , open list X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Register dai ops for SoundWire manager instances. Signed-off-by: Vijendar Mukunda Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/lkml/20230227154801.50319-4-Vijendar.Mukunda@amd.com --- drivers/soundwire/amd_manager.c | 182 ++++++++++++++++++++++++++++++ drivers/soundwire/amd_manager.h | 18 +++ include/linux/soundwire/sdw_amd.h | 18 +++ 3 files changed, 218 insertions(+) diff --git a/drivers/soundwire/amd_manager.c b/drivers/soundwire/amd_manager.c index 32fb17df465a..4b7b29a71f61 100644 --- a/drivers/soundwire/amd_manager.c +++ b/drivers/soundwire/amd_manager.c @@ -639,6 +639,182 @@ static const struct sdw_master_ops amd_sdw_ops = { .read_ping_status = amd_sdw_read_ping_status, }; +static int amd_sdw_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct amd_sdw_manager *amd_manager = snd_soc_dai_get_drvdata(dai); + struct sdw_amd_dai_runtime *dai_runtime; + struct sdw_stream_config sconfig; + struct sdw_port_config *pconfig; + int ch, dir; + int ret; + + dai_runtime = amd_manager->dai_runtime_array[dai->id]; + if (!dai_runtime) + return -EIO; + + ch = params_channels(params); + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + dir = SDW_DATA_DIR_RX; + else + dir = SDW_DATA_DIR_TX; + dev_dbg(amd_manager->dev, "dir:%d dai->id:0x%x\n", dir, dai->id); + + sconfig.direction = dir; + sconfig.ch_count = ch; + sconfig.frame_rate = params_rate(params); + sconfig.type = dai_runtime->stream_type; + + sconfig.bps = snd_pcm_format_width(params_format(params)); + + /* Port configuration */ + pconfig = kzalloc(sizeof(*pconfig), GFP_KERNEL); + if (!pconfig) { + ret = -ENOMEM; + goto error; + } + + pconfig->num = dai->id; + pconfig->ch_mask = (1 << ch) - 1; + ret = sdw_stream_add_master(&amd_manager->bus, &sconfig, + pconfig, 1, dai_runtime->stream); + if (ret) + dev_err(amd_manager->dev, "add manager to stream failed:%d\n", ret); + + kfree(pconfig); +error: + return ret; +} + +static int amd_sdw_hw_free(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) +{ + struct amd_sdw_manager *amd_manager = snd_soc_dai_get_drvdata(dai); + struct sdw_amd_dai_runtime *dai_runtime; + int ret; + + dai_runtime = amd_manager->dai_runtime_array[dai->id]; + if (!dai_runtime) + return -EIO; + + ret = sdw_stream_remove_master(&amd_manager->bus, dai_runtime->stream); + if (ret < 0) + dev_err(dai->dev, "remove manager from stream %s failed: %d\n", + dai_runtime->stream->name, ret); + return ret; +} + +static int amd_set_sdw_stream(struct snd_soc_dai *dai, void *stream, int direction) +{ + struct amd_sdw_manager *amd_manager = snd_soc_dai_get_drvdata(dai); + struct sdw_amd_dai_runtime *dai_runtime; + + dai_runtime = amd_manager->dai_runtime_array[dai->id]; + if (stream) { + /* first paranoia check */ + if (dai_runtime) { + dev_err(dai->dev, + "dai_runtime already allocated for dai %s\n", + dai->name); + return -EINVAL; + } + + /* allocate and set dai_runtime info */ + dai_runtime = kzalloc(sizeof(*dai_runtime), GFP_KERNEL); + if (!dai_runtime) + return -ENOMEM; + + dai_runtime->stream_type = SDW_STREAM_PCM; + dai_runtime->bus = &amd_manager->bus; + dai_runtime->stream = stream; + amd_manager->dai_runtime_array[dai->id] = dai_runtime; + } else { + /* second paranoia check */ + if (!dai_runtime) { + dev_err(dai->dev, + "dai_runtime not allocated for dai %s\n", + dai->name); + return -EINVAL; + } + + /* for NULL stream we release allocated dai_runtime */ + kfree(dai_runtime); + amd_manager->dai_runtime_array[dai->id] = NULL; + } + return 0; +} + +static int amd_pcm_set_sdw_stream(struct snd_soc_dai *dai, void *stream, int direction) +{ + return amd_set_sdw_stream(dai, stream, direction); +} + +static void *amd_get_sdw_stream(struct snd_soc_dai *dai, int direction) +{ + struct amd_sdw_manager *amd_manager = snd_soc_dai_get_drvdata(dai); + struct sdw_amd_dai_runtime *dai_runtime; + + dai_runtime = amd_manager->dai_runtime_array[dai->id]; + if (!dai_runtime) + return ERR_PTR(-EINVAL); + + return dai_runtime->stream; +} + +static const struct snd_soc_dai_ops amd_sdw_dai_ops = { + .hw_params = amd_sdw_hw_params, + .hw_free = amd_sdw_hw_free, + .set_stream = amd_pcm_set_sdw_stream, + .get_stream = amd_get_sdw_stream, +}; + +static const struct snd_soc_component_driver amd_sdw_dai_component = { + .name = "soundwire", +}; + +static int amd_sdw_register_dais(struct amd_sdw_manager *amd_manager) +{ + struct sdw_amd_dai_runtime **dai_runtime_array; + struct snd_soc_dai_driver *dais; + struct snd_soc_pcm_stream *stream; + struct device *dev; + int i, num_dais; + + dev = amd_manager->dev; + num_dais = amd_manager->num_dout_ports + amd_manager->num_din_ports; + dais = devm_kcalloc(dev, num_dais, sizeof(*dais), GFP_KERNEL); + if (!dais) + return -ENOMEM; + + dai_runtime_array = devm_kcalloc(dev, num_dais, + sizeof(struct sdw_amd_dai_runtime *), + GFP_KERNEL); + if (!dai_runtime_array) + return -ENOMEM; + amd_manager->dai_runtime_array = dai_runtime_array; + for (i = 0; i < num_dais; i++) { + dais[i].name = devm_kasprintf(dev, GFP_KERNEL, "SDW%d Pin%d", amd_manager->instance, + i); + if (!dais[i].name) + return -ENOMEM; + if (i < amd_manager->num_dout_ports) + stream = &dais[i].playback; + else + stream = &dais[i].capture; + + stream->channels_min = 2; + stream->channels_max = 2; + stream->rates = SNDRV_PCM_RATE_48000; + stream->formats = SNDRV_PCM_FMTBIT_S16_LE; + + dais[i].ops = &amd_sdw_dai_ops; + dais[i].id = i; + } + + return devm_snd_soc_register_component(dev, &amd_sdw_dai_component, + dais, num_dais); +} + static void amd_sdw_probe_work(struct work_struct *work) { struct amd_sdw_manager *amd_manager = container_of(work, struct amd_sdw_manager, @@ -722,6 +898,12 @@ static int amd_sdw_manager_probe(struct platform_device *pdev) dev_err(dev, "Failed to register SoundWire manager(%d)\n", ret); return ret; } + ret = amd_sdw_register_dais(amd_manager); + if (ret) { + dev_err(dev, "CPU DAI registration failed\n"); + sdw_bus_master_delete(&amd_manager->bus); + return ret; + } dev_set_drvdata(dev, amd_manager); INIT_WORK(&amd_manager->probe_work, amd_sdw_probe_work); /* diff --git a/drivers/soundwire/amd_manager.h b/drivers/soundwire/amd_manager.h index 811ed9ee3d86..78d7d5c911e4 100644 --- a/drivers/soundwire/amd_manager.h +++ b/drivers/soundwire/amd_manager.h @@ -205,6 +205,24 @@ struct sdw_manager_dp_reg { u32 lane_ctrl_ch_en_reg; }; +/* + * SDW0 Manager instance registers 6 CPU DAI (3 TX & 3 RX Ports) + * whereas SDW1 Manager Instance registers 2 CPU DAI (one TX & one RX port) + * Below is the CPU DAI <->Manager port number mapping + * i.e SDW0 Pin0 -> port number 0 -> AUDIO0 TX + * SDW0 Pin1 -> Port number 1 -> AUDIO1 TX + * SDW0 Pin2 -> Port number 2 -> AUDIO2 TX + * SDW0 Pin3 -> port number 3 -> AUDIO0 RX + * SDW0 Pin4 -> Port number 4 -> AUDIO1 RX + * SDW0 Pin5 -> Port number 5 -> AUDIO2 RX + * Whereas for SDW1 instance + * SDW1 Pin0 -> port number 0 -> AUDIO1 TX + * SDW1 Pin1 -> Port number 1 -> AUDIO1 RX + * Same mapping should be used for programming DMA controller registers in SoundWire DMA driver. + * i.e if AUDIO0 TX channel is selected then we need to use AUDIO0 TX registers for DMA programming + * in SoundWire DMA driver. + */ + static struct sdw_manager_dp_reg sdw0_manager_dp_reg[AMD_SDW0_MAX_DAI] = { {ACP_SW_AUDIO0_TX_FRAME_FORMAT, ACP_SW_AUDIO0_TX_SAMPLEINTERVAL, ACP_SW_AUDIO0_TX_HCTRL_DP0, ACP_SW_AUDIO0_TX_OFFSET_DP0, ACP_SW_AUDIO0_TX_CHANNEL_ENABLE_DP0}, diff --git a/include/linux/soundwire/sdw_amd.h b/include/linux/soundwire/sdw_amd.h index c14a291a40e8..ac537419301d 100644 --- a/include/linux/soundwire/sdw_amd.h +++ b/include/linux/soundwire/sdw_amd.h @@ -23,6 +23,21 @@ struct sdw_manager_reg_mask { u32 acp_sdw_intr_mask; }; +/** + * struct sdw_amd_dai_runtime: AMD sdw dai runtime data + * + * @name: SoundWire stream name + * @stream: stream runtime + * @bus: Bus handle + * @stream_type: Stream type + */ +struct sdw_amd_dai_runtime { + char *name; + struct sdw_stream_runtime *stream; + struct sdw_bus *bus; + enum sdw_stream_type stream_type; +}; + /** * struct amd_sdw_manager - amd manager driver context * @bus: bus handle @@ -40,6 +55,7 @@ struct sdw_manager_reg_mask { * @quirks: SoundWire manager quirks * @wake_en_mask: wake enable mask per SoundWire manager * @power_mode_mask: flag interprets amd SoundWire manager power mode + * @dai_runtime_array: dai runtime array */ struct amd_sdw_manager { struct sdw_bus bus; @@ -63,5 +79,7 @@ struct amd_sdw_manager { u32 quirks; u32 wake_en_mask; u32 power_mode_mask; + + struct sdw_amd_dai_runtime **dai_runtime_array; }; #endif From patchwork Thu Mar 2 06:21:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mukunda,Vijendar" X-Patchwork-Id: 13156752 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 447A4C6FA8E for ; Thu, 2 Mar 2023 06:20:41 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 3008683D; Thu, 2 Mar 2023 07:19:49 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 3008683D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1677738039; bh=IcY+7jhDvXOJP07e9vWnFFOGZszVy/upOMAIbZ/9xsw=; h=From:To:Subject:Date:In-Reply-To:References:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=Gs8LYd+6jAU6WeytmSaCCqk9FaaOQ52MOKewBso/gc7pWM/im6pxhuxIpQeKZXpjp U5L5nxEmic8bVnzMly48Ra868JhegJAUOPDxyF0Zc49Ly7uO3zSPGEo2xLlITOFJl8 apY2Pd+CRm1B9+Ez0qP/CNhyYxhOTFXtAsDYCLX8= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id CD3A3F8051B; Thu, 2 Mar 2023 07:19:48 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id E03E3F80534; Thu, 2 Mar 2023 07:19:43 +0100 (CET) Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on20607.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe59::607]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 21583F8052D for ; Thu, 2 Mar 2023 07:18:53 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 21583F8052D Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key, unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=oblOfZ3B ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=DapJqIwwqCNXAhEYzb+FJyD4+xqClFeu50+2aLrVRCHxCbRwA9NYqKwrGMbl4tT3tdW8EFQ4qscBfRkxO/nHpOR/yQyu3uumGddIx8cuZ/3FkAFH3Ln98UwjGaRrIKeGoh5Xu0SLPSCTu7SwBUuMOLM7mLscRzHqUdNZPrp9NExjQirid0aA7lFchjQfZ/2tvpZg9sIJi1oxIIvEFB5bryJMT4eoHzyE2C4t5sz+7aMkdZyBeim+RvOkY2+PvALlSIRNgR9RJt4Lh72x+gX9D9sdEIveRnLOjTR57XpKAHi6/vi8aUQ50H1VjmmZD6c8vJHG1wK0yaQyJQIFUYvDXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=1fvAOQfxaPlgicNaCbaA/aLMaa2XDpwKEQXR95J+tCU=; b=Y/uDTEkz+U/+MqIW3m82reizp4c77Y/6yFs19+fQroYzp2hrSTyS55mj3wBJqqhMrqEC+kcw3J7ElW29o4VrVxqbd8KkH6oW2g3JjmeTB1lecWq1CsoFjQ6CmfpvPAyymatb3TMZXHL5J6RDSttM8+k17ELpAL4s1UZ+NmWZNDPS8goBkdit0uijU76LCx4roNLxXVnZoYwMriItXsJ2o52lVNSJDgMquo3MQQ5EW1QqrRowRTW/BrrMzVoepCAQ1UeqykYSvolFzF/zxH0qAus0kRlV1JdLGYN7oTp42BE/LQRfCNex1hLFWRTTUI9DqXzQgZkY4Rr3jexP1CKMyQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=1fvAOQfxaPlgicNaCbaA/aLMaa2XDpwKEQXR95J+tCU=; b=oblOfZ3BSNqemaqy/YpD4dvphdCY1cnikeFQIS4pFbxwqgHX+WImvBC0Lh7eTDrP/7IzJK81QilaTFnnM3k8lSRPUgzQqEb3z5dbwvB8cwKWocxprw0MGCiWAUZhvXcYl8biU/tjAQf2d5vH58xXHMDIYc0UfXk/s0DAOFlPdB4= Received: from DM6PR07CA0099.namprd07.prod.outlook.com (2603:10b6:5:337::32) by DM6PR12MB5005.namprd12.prod.outlook.com (2603:10b6:5:1be::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.18; Thu, 2 Mar 2023 06:18:49 +0000 Received: from DS1PEPF0000E654.namprd02.prod.outlook.com (2603:10b6:5:337:cafe::12) by DM6PR07CA0099.outlook.office365.com (2603:10b6:5:337::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.19 via Frontend Transport; Thu, 2 Mar 2023 06:18:49 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by DS1PEPF0000E654.mail.protection.outlook.com (10.167.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6156.12 via Frontend Transport; Thu, 2 Mar 2023 06:18:49 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 2 Mar 2023 00:18:38 -0600 Received: from vijendar-X570-GAMING-X.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 2 Mar 2023 00:18:34 -0600 From: Vijendar Mukunda To: Subject: [PATCH V5 4/8] soundwire: amd: enable build for AMD SoundWire manager driver Date: Thu, 2 Mar 2023 11:51:03 +0530 Message-ID: <20230302062107.207845-5-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> References: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E654:EE_|DM6PR12MB5005:EE_ X-MS-Office365-Filtering-Correlation-Id: 56ad2cc2-f446-4383-da4c-08db1ae5fcac X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: eKSSPrc0PN2TF5j2hkGI5gV1PkfnHLOr7ZM7fYIKb93qHifzFjturnJmvq6PMrI9K+tpGTX/wR0tXEvlYFyz87aBA0wt4z+L2n/RTj0LLherW8fA+35ba0/0E0ZO9DUuo9Mp8not5P8leRzvcisMEnJmVVGLTpZX6+dkIUHbpNWGcdaEPdNAT9/hzZLP0NgAteGFiXI3gC+ydfpqOGnr0Rx9fsa8s4vL7r4zPyigSOftpGZULMjOKiKdojNd2I4riRjm5bsc0vNXWtfdKBrFRggeMYU3LHgkdIQeIO1WWFxqGYkMX3cSzLpTwbguJRXasywYg7fg74WXEaMIIqh0TcjOD+w/OYIArx1tixqt4/PVkGf704M1+HBQI/SCCd68nSTL4wkJnwfGAv8xw7dB/fwtmyoEaoCjrsiHgei/iy4ppKnz6QR/LhNldlSErkktYdI1LrQG3Lld2EkNHwlEyWDtFokHyLjGAgtbA/82q7OJsvpuRJth71b/Jwym9g3/CUwRjnwJagCmb8uZRaUaaJAHwTG7JUkd+rHCG3SvOypSYdNT05jWsD5moV1nLKbgkU3p2PCxJcVL9hm/LgXWEkbONJI63vvwMbulA4F7IoOTsZMemFybBtmpHgdzKTDxfq2H98pCPJbKjhCoqV+kXnw6fAR0dINJHj6ftK8tVPkVT+IMJDHiZi3JFEcYRPBatEx2zTE8Tke+B3WokmkthhUt9M9LbDt6ikMaKi8S5lA= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(396003)(39860400002)(346002)(136003)(376002)(451199018)(46966006)(40470700004)(36840700001)(40460700003)(36756003)(6666004)(1076003)(966005)(2616005)(186003)(336012)(26005)(316002)(6916009)(41300700001)(54906003)(4326008)(70586007)(8676002)(7696005)(2906002)(8936002)(5660300002)(478600001)(81166007)(82740400003)(40480700001)(82310400005)(356005)(86362001)(47076005)(36860700001)(83380400001)(70206006)(426003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2023 06:18:49.1295 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 56ad2cc2-f446-4383-da4c-08db1ae5fcac X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000E654.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5005 Message-ID-Hash: OHKOKZF2HDHDTNXYRXUQ6KMSE6CTGZ43 X-Message-ID-Hash: OHKOKZF2HDHDTNXYRXUQ6KMSE6CTGZ43 X-MailFrom: Vijendar.Mukunda@amd.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org, pierre-louis.bossart@linux.intel.com, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, Mario.Limonciello@amd.com, amadeuszx.slawinski@linux.intel.com, Mastan.Katragadda@amd.com, Arungopal.kondaveeti@amd.com, Vijendar Mukunda , Bard Liao , Sanyog Kale , open list X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Enable build for SoundWire manager driver for AMD platforms. Signed-off-by: Vijendar Mukunda Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/lkml/20230220100418.76754-5-Vijendar.Mukunda@amd.com --- drivers/soundwire/Kconfig | 10 ++++++++++ drivers/soundwire/Makefile | 4 ++++ 2 files changed, 14 insertions(+) diff --git a/drivers/soundwire/Kconfig b/drivers/soundwire/Kconfig index 2b7795233282..983afe3570b2 100644 --- a/drivers/soundwire/Kconfig +++ b/drivers/soundwire/Kconfig @@ -46,4 +46,14 @@ config SOUNDWIRE_QCOM config SOUNDWIRE_GENERIC_ALLOCATION tristate +config SOUNDWIRE_AMD + tristate "AMD SoundWire Manager driver" + select SOUNDWIRE_GENERIC_ALLOCATION + depends on ACPI && SND_SOC + help + SoundWire AMD Manager driver. + If you have an AMD platform which has a SoundWire Manager then + enable this config option to get the SoundWire support for that + device. + endif diff --git a/drivers/soundwire/Makefile b/drivers/soundwire/Makefile index ca97414ada70..5956229d3eb3 100644 --- a/drivers/soundwire/Makefile +++ b/drivers/soundwire/Makefile @@ -26,3 +26,7 @@ obj-$(CONFIG_SOUNDWIRE_INTEL) += soundwire-intel.o #Qualcomm driver soundwire-qcom-y := qcom.o obj-$(CONFIG_SOUNDWIRE_QCOM) += soundwire-qcom.o + +#AMD driver +soundwire-amd-y := amd_manager.o +obj-$(CONFIG_SOUNDWIRE_AMD) += soundwire-amd.o From patchwork Thu Mar 2 06:21:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mukunda,Vijendar" X-Patchwork-Id: 13156753 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9565FC678D4 for ; Thu, 2 Mar 2023 06:20:51 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 5D4AB844; Thu, 2 Mar 2023 07:19:59 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 5D4AB844 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1677738049; bh=8WKjq0yfc4c0s4u0mX/Y3XccS/lXi0Sn8DcBKD4USs0=; h=From:To:Subject:Date:In-Reply-To:References:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=OQdFeMf7YVJiE4cj8mwj54zO9oXal6g1AbckOGAdqVneynEy9Uhd+yUoM4Jb13672 w7JxN0IeE0mV39b3QNvY8JjPV8oCC86yDvDRCQeUkbJDnksP1qFp9LGxjfXy1jmJMw XOMkty7J7Mxoev67q3HexDt5wga7MNvXRZe5lPMs= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 9679DF80533; Thu, 2 Mar 2023 07:19:56 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 97BCAF8053D; Thu, 2 Mar 2023 07:19:52 +0100 (CET) Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on20629.outbound.protection.outlook.com [IPv6:2a01:111:f400:7e8a::629]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 74711F804B1 for ; Thu, 2 Mar 2023 07:19:46 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 74711F804B1 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key, unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=AfVgpSBN ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=AXf5Xqj42uj4B9Oi3SME1TY4rBqa7mWn0UfZ0yOscRnZmdpy+DaAbt9ZM08b4sM0k6ToFem8ox4lvQdbwxtYNKAUoBghucyQeQym+nuDA/6upMBw9kdXOsvEBpAsFLlr2GqsSEAAhb0Lb/ahVJCPJlWSCTYnWQ3HLyd3L+qefMH6xcve/FMAibSY9qOd3dJEmcaCqGpXwnQH2j3YWo/6o96bFPU3PbqdyMUl+Be9hxHw1XekkV5XQnCE61KwyPGj/AM4WCjAveHmBbOmb5tuyFdIp5ifYy7XinLBz5S4W9ppwP3aTVEZnrPXwQvzsp1P01aT8hn1HH9aTkMftU6fBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=z/ud2CpEJkWkFJKRJqKM3aubvYbJ6x4tVpmmBAi3HK0=; b=KrKA8Js/a8GreSCFQ7eg6dFdJJd+y6RUCMK4mlIOWqGWUaA7NXRO7LN8hfygHa1N+QAPFMjVrT1aJkaIT3wdgnpp1NBmZqjfLgLYRye1J+agRT6EisZFd1l0obhZc6oApbcG1FHdQ/r5gODbgd/jd8qfzR0NKIOvvNgrL6dvOavRAVh76hiyOdntBGGTxlaAkUim8FqA8Z6+UxgxIjbbcoifqXBCqeUamHui1NN93ioIcFhAbnwPRRFCA0sxkzcDalaqf9aCICrogv3FL79HdbYo8BzwLYnd6+wZdSHiAWc8VDiCbTiyXol1NAhR/uj8E2rs1vXEqNSeVOHoBfR4HA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=z/ud2CpEJkWkFJKRJqKM3aubvYbJ6x4tVpmmBAi3HK0=; b=AfVgpSBNf9guT82Mt7i2sKuieUkLFsR3JyMJQNxoT8SGWdCpEMm3a2N2Ky/QLJgOkthgP4oWgH/hynH4kERlkiiI9uBdrt+N7R0r2fgBIA4HyegYYXC0is9dULjJVtsRod4iowyAeLsQqIDj6FNECOB3UQBsu7HkSsHyqyDJBv4= Received: from DM6PR14CA0037.namprd14.prod.outlook.com (2603:10b6:5:18f::14) by CY8PR12MB8410.namprd12.prod.outlook.com (2603:10b6:930:6d::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.19; Thu, 2 Mar 2023 06:19:38 +0000 Received: from DS1PEPF0000E650.namprd02.prod.outlook.com (2603:10b6:5:18f:cafe::a1) by DM6PR14CA0037.outlook.office365.com (2603:10b6:5:18f::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.19 via Frontend Transport; Thu, 2 Mar 2023 06:19:38 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by DS1PEPF0000E650.mail.protection.outlook.com (10.167.18.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6156.12 via Frontend Transport; Thu, 2 Mar 2023 06:19:38 +0000 Received: from SATLEXMB07.amd.com (10.181.41.45) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 2 Mar 2023 00:19:31 -0600 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB07.amd.com (10.181.41.45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 1 Mar 2023 22:18:52 -0800 Received: from vijendar-X570-GAMING-X.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 2 Mar 2023 00:18:48 -0600 From: Vijendar Mukunda To: Subject: [PATCH V5 5/8] soundwire: amd: add SoundWire manager interrupt handling Date: Thu, 2 Mar 2023 11:51:04 +0530 Message-ID: <20230302062107.207845-6-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> References: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E650:EE_|CY8PR12MB8410:EE_ X-MS-Office365-Filtering-Correlation-Id: f92bd83d-4560-47ef-33ec-08db1ae61a28 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: soDyF9fYbX1RPXujt08TGMBYURXslbcyKh3HwT0YjInV8E6m7Y3y38DXKh0lLWIjcAUQDMAa2P2eAU+2b269M1SZil06puL6WILzksNRJHi09dC09jcgHR4FmLBku1UAyNc0HYOorCsJkk5iM/506b5/HqM+XNxAbj3jqDNL86e4YAsQ32QofGzwSYgcAb9Y65TYGSa/yrfEGbHvbsiSgng4k4pueQXWYVxVvtfnz9DaB2cFI4eBr6EZcayYdZgwZkzWJbZgh2NlefQ5kKbvsVx+dWS2VFugPRhS5kMoSdqm2cB+AqyVjz/z/oXfTCYxQGz8ZR/HR0yt5EQmJFSousfANPuxZ0M8Ck+ou95nG8nRZImRG8+a7DbqdI/RHwQQjLkx6el5bVaKRUyivb6Ij1iXmf/Uhc+vChNavIUK3pVa6TCo3lIaeO0mIQPBXIg1MQsEVyshKZmGNZro5FJeh1ENjmG0hD4Gh0QhuvoZnvnuYv29OWBb0jU3/sqE9TvuXDn07+TKlH7ntydfWwBJB+fBatEI6WS80n24B9bvY1q1f/G6SP/CPiVmybg8XYUObBKzqyuwUEbz58G/0GLenPVOGWrnZCKzJLdfaFgdDHsA2s769/2eD/jAnftXO44ANRoEBzJJNYyilNer2WseaTkySZYC63Qhtc85xOBQ1oAwJYQyxb0LINXlMm8TQ1LbwkVxUQo+bAHME3qzYJEUnSLcC+2zOb0ODtI/YqylKrc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(396003)(39860400002)(376002)(346002)(136003)(451199018)(36840700001)(46966006)(40470700004)(86362001)(82310400005)(36756003)(40460700003)(40480700001)(70586007)(70206006)(186003)(4326008)(8676002)(336012)(6916009)(8936002)(41300700001)(2616005)(54906003)(966005)(478600001)(7696005)(6666004)(1076003)(26005)(5660300002)(316002)(81166007)(82740400003)(356005)(83380400001)(47076005)(426003)(36860700001)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2023 06:19:38.5918 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f92bd83d-4560-47ef-33ec-08db1ae61a28 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000E650.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8410 Message-ID-Hash: A4KFI2H5ZZ5YUBAWQOC6U7MRFWFGKS3A X-Message-ID-Hash: A4KFI2H5ZZ5YUBAWQOC6U7MRFWFGKS3A X-MailFrom: Vijendar.Mukunda@amd.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org, pierre-louis.bossart@linux.intel.com, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, Mario.Limonciello@amd.com, amadeuszx.slawinski@linux.intel.com, Mastan.Katragadda@amd.com, Arungopal.kondaveeti@amd.com, Vijendar Mukunda , Bard Liao , Sanyog Kale , open list X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Add support for handling SoundWire manager interrupts. Signed-off-by: Vijendar Mukunda Signed-off-by: Mastan Katragadda Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/lkml/20230227154801.50319-6-Vijendar.Mukunda@amd.com --- drivers/soundwire/amd_manager.c | 130 ++++++++++++++++++++++++++++++ drivers/soundwire/amd_manager.h | 1 + include/linux/soundwire/sdw_amd.h | 7 ++ 3 files changed, 138 insertions(+) diff --git a/drivers/soundwire/amd_manager.c b/drivers/soundwire/amd_manager.c index 4b7b29a71f61..6e3533a3fae1 100644 --- a/drivers/soundwire/amd_manager.c +++ b/drivers/soundwire/amd_manager.c @@ -415,6 +415,51 @@ static enum sdw_command_response amd_sdw_xfer_msg(struct sdw_bus *bus, struct sd return SDW_CMD_OK; } +static void amd_sdw_fill_slave_status(struct amd_sdw_manager *amd_manager, u16 index, u32 status) +{ + switch (status) { + case SDW_SLAVE_ATTACHED: + amd_manager->status[index] = SDW_SLAVE_ATTACHED; + break; + case SDW_SLAVE_UNATTACHED: + amd_manager->status[index] = SDW_SLAVE_UNATTACHED; + break; + case SDW_SLAVE_ALERT: + amd_manager->status[index] = SDW_SLAVE_ALERT; + break; + default: + amd_manager->status[index] = SDW_SLAVE_RESERVED; + break; + } +} + +static void amd_sdw_process_ping_status(u64 response, struct amd_sdw_manager *amd_manager) +{ + u64 slave_stat; + u32 val; + u16 dev_index; + + /* slave status response */ + slave_stat = FIELD_GET(AMD_SDW_MCP_SLAVE_STAT_0_3, response); + slave_stat |= FIELD_GET(AMD_SDW_MCP_SLAVE_STAT_4_11, response) << 8; + dev_dbg(amd_manager->dev, "slave_stat:0x%llx\n", slave_stat); + for (dev_index = 0; dev_index <= SDW_MAX_DEVICES; ++dev_index) { + val = (slave_stat >> (dev_index * 2)) & AMD_SDW_MCP_SLAVE_STATUS_MASK; + dev_dbg(amd_manager->dev, "val:0x%x\n", val); + amd_sdw_fill_slave_status(amd_manager, dev_index, val); + } +} + +static void amd_sdw_read_and_process_ping_status(struct amd_sdw_manager *amd_manager) +{ + u64 response; + + mutex_lock(&amd_manager->bus.msg_lock); + response = amd_sdw_send_cmd_get_resp(amd_manager, 0, 0); + mutex_unlock(&amd_manager->bus.msg_lock); + amd_sdw_process_ping_status(response, amd_manager); +} + static u32 amd_sdw_read_ping_status(struct sdw_bus *bus) { struct amd_sdw_manager *amd_manager = to_amd_sdw(bus); @@ -815,6 +860,89 @@ static int amd_sdw_register_dais(struct amd_sdw_manager *amd_manager) dais, num_dais); } +static void amd_sdw_update_slave_status_work(struct work_struct *work) +{ + struct amd_sdw_manager *amd_manager = + container_of(work, struct amd_sdw_manager, amd_sdw_work); + int retry_count = 0; + + if (amd_manager->status[0] == SDW_SLAVE_ATTACHED) { + acp_reg_writel(0, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_MASK_0TO7); + acp_reg_writel(0, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_MASK_8TO11); + } + +update_status: + sdw_handle_slave_status(&amd_manager->bus, amd_manager->status); + /* + * During the peripheral enumeration sequence, the SoundWire manager interrupts + * are masked. Once the device number programming is done for all peripherals, + * interrupts will be unmasked. Read the peripheral device status from ping command + * and process the response. This sequence will ensure all peripheral devices enumerated + * and initialized properly. + */ + if (amd_manager->status[0] == SDW_SLAVE_ATTACHED) { + if (retry_count++ < SDW_MAX_DEVICES) { + acp_reg_writel(AMD_SDW_IRQ_MASK_0TO7, amd_manager->mmio + + ACP_SW_STATE_CHANGE_STATUS_MASK_0TO7); + acp_reg_writel(AMD_SDW_IRQ_MASK_8TO11, + amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_MASK_8TO11); + amd_sdw_read_and_process_ping_status(amd_manager); + goto update_status; + } else { + dev_err_ratelimited(amd_manager->dev, + "Device0 detected after %d iterations\n", + retry_count); + } + } +} + +static void amd_sdw_update_slave_status(u32 status_change_0to7, u32 status_change_8to11, + struct amd_sdw_manager *amd_manager) +{ + u64 slave_stat; + u32 val; + int dev_index; + + if (status_change_0to7 == AMD_SDW_SLAVE_0_ATTACHED) + memset(amd_manager->status, 0, sizeof(amd_manager->status)); + slave_stat = status_change_0to7; + slave_stat |= FIELD_GET(AMD_SDW_MCP_SLAVE_STATUS_8TO_11, status_change_8to11) << 32; + dev_dbg(amd_manager->dev, "status_change_0to7:0x%x status_change_8to11:0x%x\n", + status_change_0to7, status_change_8to11); + if (slave_stat) { + for (dev_index = 0; dev_index <= SDW_MAX_DEVICES; ++dev_index) { + if (slave_stat & AMD_SDW_MCP_SLAVE_STATUS_VALID_MASK(dev_index)) { + val = (slave_stat >> AMD_SDW_MCP_SLAVE_STAT_SHIFT_MASK(dev_index)) & + AMD_SDW_MCP_SLAVE_STATUS_MASK; + amd_sdw_fill_slave_status(amd_manager, dev_index, val); + } + } + } +} + +static void amd_sdw_irq_thread(struct work_struct *work) +{ + struct amd_sdw_manager *amd_manager = + container_of(work, struct amd_sdw_manager, amd_sdw_irq_thread); + u32 status_change_8to11; + u32 status_change_0to7; + + status_change_8to11 = acp_reg_readl(amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_8TO11); + status_change_0to7 = acp_reg_readl(amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_0TO7); + dev_dbg(amd_manager->dev, "[SDW%d] SDW INT: 0to7=0x%x, 8to11=0x%x\n", + amd_manager->instance, status_change_0to7, status_change_8to11); + if (status_change_8to11 & AMD_SDW_PREQ_INTR_STAT) { + amd_sdw_read_and_process_ping_status(amd_manager); + } else { + /* Check for the updated status on peripheral device */ + amd_sdw_update_slave_status(status_change_0to7, status_change_8to11, amd_manager); + } + if (status_change_8to11 || status_change_0to7) + schedule_work(&amd_manager->amd_sdw_work); + acp_reg_writel(0x00, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_8TO11); + acp_reg_writel(0x00, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_0TO7); +} + static void amd_sdw_probe_work(struct work_struct *work) { struct amd_sdw_manager *amd_manager = container_of(work, struct amd_sdw_manager, @@ -905,6 +1033,8 @@ static int amd_sdw_manager_probe(struct platform_device *pdev) return ret; } dev_set_drvdata(dev, amd_manager); + INIT_WORK(&amd_manager->amd_sdw_irq_thread, amd_sdw_irq_thread); + INIT_WORK(&amd_manager->amd_sdw_work, amd_sdw_update_slave_status_work); INIT_WORK(&amd_manager->probe_work, amd_sdw_probe_work); /* * Instead of having lengthy probe sequence, use deferred probe. diff --git a/drivers/soundwire/amd_manager.h b/drivers/soundwire/amd_manager.h index 78d7d5c911e4..3920648fdc52 100644 --- a/drivers/soundwire/amd_manager.h +++ b/drivers/soundwire/amd_manager.h @@ -186,6 +186,7 @@ #define AMD_SDW1_PAD_KEEPER_EN_MASK 0x10 #define AMD_SDW0_PAD_KEEPER_DISABLE_MASK 0x1E #define AMD_SDW1_PAD_KEEPER_DISABLE_MASK 0xF +#define AMD_SDW_PREQ_INTR_STAT BIT(19) enum amd_sdw_cmd_type { AMD_SDW_CMD_PING = 0, diff --git a/include/linux/soundwire/sdw_amd.h b/include/linux/soundwire/sdw_amd.h index ac537419301d..df60bc0de6fc 100644 --- a/include/linux/soundwire/sdw_amd.h +++ b/include/linux/soundwire/sdw_amd.h @@ -45,8 +45,11 @@ struct sdw_amd_dai_runtime { * @mmio: SoundWire registers mmio base * @acp_mmio: acp registers mmio base * @reg_mask: register mask structure per manager instance + * @amd_sdw_irq_thread: SoundWire manager irq workqueue + * @amd_sdw_work: peripheral status work queue * @probe_work: SoundWire manager probe workqueue * @acp_sdw_lock: mutex to protect acp share register access + * @status: peripheral devices status array * @num_din_ports: number of input ports * @num_dout_ports: number of output ports * @cols_index: Column index in frame shape @@ -65,10 +68,14 @@ struct amd_sdw_manager { void __iomem *acp_mmio; struct sdw_manager_reg_mask *reg_mask; + struct work_struct amd_sdw_irq_thread; + struct work_struct amd_sdw_work; struct work_struct probe_work; /* mutex to protect acp common register access */ struct mutex *acp_sdw_lock; + enum sdw_slave_status status[SDW_MAX_DEVICES + 1]; + int num_din_ports; int num_dout_ports; From patchwork Thu Mar 2 06:21:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mukunda,Vijendar" X-Patchwork-Id: 13156756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1374AC678D4 for ; Thu, 2 Mar 2023 06:21:48 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 1782D827; Thu, 2 Mar 2023 07:20:56 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 1782D827 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1677738106; bh=LqhyKiRsovSbBYPaM9Qu/Uc2aBuXHh3tlq8fBMQddeU=; h=From:To:Subject:Date:In-Reply-To:References:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=Vglqk3NcXVCe55LDTic5MzyoBCEDOp+hXc1k2z/MZh8a0hDXa847iwbBXqucEgTac 2HB04JFN1hq5c9ayAx3wulo4Mhlr4f5HrOpldYp8dIl2hJsPwGBTJh0oxPgHtYR2W6 FgiWjKChrxp6rofOyqlvYTZcS9Pp5VJRHf0c0MGk= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 51EADF8055B; Thu, 2 Mar 2023 07:20:33 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id CAD5EF80529; Thu, 2 Mar 2023 07:20:27 +0100 (CET) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2060c.outbound.protection.outlook.com [IPv6:2a01:111:f400:7e89::60c]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id BB738F800DF for ; Thu, 2 Mar 2023 07:20:23 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz BB738F800DF Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key, unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=adXZT4lG ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=K73ULq9eJkLaNObpP4v7c5hKDxbNlwGUAndP/+2LzfTyn48nE/NjQgYYou4j0UWrVIhYFFoHwCkvFbgTNsG3qenTSKbJ8Op59ihP2ffdaFhrWitDpB+MGbfihpMFyWmuQMDPm59ASklTRjGeToJ927W6UGQTQfr35xmuCSG2gG1knFZI5i09duBl+7QrjuoCFRTjU1GQcwCuVWiHlpbE7Yws9FttEdYwkB2Oh3t1ssMusL9jL52qPORP9loWCD5gHRu9prvpk5w7lrdG04pBpcSg3StO1abbGhmA/GegrkFD/GJtgipduWfy2S6m5GmLHn5x+tIKi66E69BaQiTTmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=UYk24cIXHudGpY8TxwZ2Iy+MSAekVmYaH93lSP4+l1E=; b=Ix7FtWvoerdajXJ0vRuu6SIym2qwh2Vo/gO8eoug3XbSbIeyHaVzAQt1YaIWnSXRdraezRMIwqfY+hFG8GSAXNYc69OSijb1gZrhI4BGKeBnLoM7cpXdHhH3VakWZdodLUxF8Ve+3nsQQ8cP+6je0N5PTrdOjU3ihYanBlrJ+TYOa+MpsrD98WA1egrpVNT/WfQO2CuIkiereomAD7fwbrGQZw1u5C2qlc+yyDZaMbK/kOnF/VBVl1QkZbG5rm1Jk2k7BVeq6dAaSGzFWL0ATMyfC2hsho2M3X/l8fJecr2xfszD/R4koVL5NTfGX6lV27si62Q/G1Ru90jbxGA8Rw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=UYk24cIXHudGpY8TxwZ2Iy+MSAekVmYaH93lSP4+l1E=; b=adXZT4lGn/NNLz+NGTpaxIWLJkAm6tLAT/06rH7R7mhlrcKBgsocGKPO4u/439qt8r+K2SPM0kezEq5+jW2ksCaX6ymVPIU7BP0pPwfBjPzVDKfdngxn3reNUlxfDCi4oUTF8yA/LeqUIGZx4zptvejX+PocNBFi1+K9y5ntKgw= Received: from BN0PR04CA0199.namprd04.prod.outlook.com (2603:10b6:408:e9::24) by PH7PR12MB7891.namprd12.prod.outlook.com (2603:10b6:510:27a::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.18; Thu, 2 Mar 2023 06:20:18 +0000 Received: from BN8NAM11FT059.eop-nam11.prod.protection.outlook.com (2603:10b6:408:e9:cafe::82) by BN0PR04CA0199.outlook.office365.com (2603:10b6:408:e9::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.19 via Frontend Transport; Thu, 2 Mar 2023 06:20:18 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT059.mail.protection.outlook.com (10.13.177.120) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6156.12 via Frontend Transport; Thu, 2 Mar 2023 06:20:18 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 2 Mar 2023 00:19:35 -0600 Received: from vijendar-X570-GAMING-X.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 2 Mar 2023 00:19:31 -0600 From: Vijendar Mukunda To: Subject: [PATCH V5 6/8] soundwire: amd: add runtime pm ops for AMD SoundWire manager driver Date: Thu, 2 Mar 2023 11:51:05 +0530 Message-ID: <20230302062107.207845-7-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> References: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT059:EE_|PH7PR12MB7891:EE_ X-MS-Office365-Filtering-Correlation-Id: cc2de2b3-bfa1-48b7-f8f1-08db1ae631d1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: eUUjWbKvxGQV2kg3J2xH+r9H18vvIFf4LN/vw7XnX8QymYgJ5xmO27quvNCkL31nSf06CWXuQBJMa2IyxkHSX1g5M+X4smm+7d6xNBV2SpeBD9ZLk6CK+3k8NRqV13TxdO1jCu8dSJxkEe0WD7ogGJmLigRFL/hbblN546IdEouKLWoyfxOl0RW7oKhHKw+F6ze3BTtTzUqJSdgz5/eYB8U+W7AAL3qr+s9qkT0PQG6Ef6+b69wEUYERjXxzCr76T85weF4jWN6oBaGZ57QUr1hSiqkmDesMPjUx8bcMrCAI7M9xrCg02QaTjrYngWS3CA4C2z/WRBAiCrfldLrw4LPrO0N0Qacbl9EouumyaaPB3+c+Fxzl1kK/86XaENJmTa+UNYmThYngg8P2fA68GP/5lKfOWXwi8jFOI1vnYLAY1RszPBRveZbEjeTAMjm8K9OOdEtsX1yRtCnN3pbtH9qfwJVsSRcWo6SHAZ+t15e2ASb31TIawRiCkhvWcslQe1D9jceDJ59Qd1IYvvWI0Lpp7zCYFH4TNt1g6Ki+b0THjvFu6tqdJNZC6JrsvXpF0i52GtiAvKq4VjXaAhZCeBCbFLYYzYAK5v6PeL27BiexxWJNmX0GWIdRZOyQWlpZqoigaMoUEhx7ZL2cxzoaxj1bWZ0GLD9URwe3ZueAWY2xz90RJ7yVaWGRS4IuFNXhN89y7p2xgu8VdbS7gVL+FsckRTQXpZAl8eIMsLgTngA= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(39860400002)(396003)(136003)(346002)(376002)(451199018)(36840700001)(46966006)(40470700004)(83380400001)(36860700001)(47076005)(426003)(6666004)(40460700003)(36756003)(5660300002)(81166007)(82740400003)(478600001)(8936002)(356005)(86362001)(40480700001)(82310400005)(2616005)(186003)(26005)(1076003)(336012)(966005)(70586007)(2906002)(8676002)(7696005)(70206006)(6916009)(4326008)(41300700001)(316002)(54906003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2023 06:20:18.3233 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc2de2b3-bfa1-48b7-f8f1-08db1ae631d1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7891 Message-ID-Hash: 3NQ6FJDWIERQCQFLBAW54II2XSA7EXVY X-Message-ID-Hash: 3NQ6FJDWIERQCQFLBAW54II2XSA7EXVY X-MailFrom: Vijendar.Mukunda@amd.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org, pierre-louis.bossart@linux.intel.com, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, Mario.Limonciello@amd.com, amadeuszx.slawinski@linux.intel.com, Mastan.Katragadda@amd.com, Arungopal.kondaveeti@amd.com, Vijendar Mukunda , Bard Liao , Sanyog Kale , open list X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Add support for runtime pm ops for AMD SoundWire manager driver. Signed-off-by: Vijendar Mukunda Signed-off-by: Mastan Katragadda Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/lkml/20230227154801.50319-7-Vijendar.Mukunda@amd.com --- drivers/soundwire/amd_manager.c | 161 ++++++++++++++++++++++++++++++ drivers/soundwire/amd_manager.h | 3 + include/linux/soundwire/sdw_amd.h | 17 ++++ 3 files changed, 181 insertions(+) diff --git a/drivers/soundwire/amd_manager.c b/drivers/soundwire/amd_manager.c index 6e3533a3fae1..d074c11088be 100644 --- a/drivers/soundwire/amd_manager.c +++ b/drivers/soundwire/amd_manager.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -180,6 +181,12 @@ static void amd_disable_sdw_interrupts(struct amd_sdw_manager *amd_manager) acp_reg_writel(0x00, amd_manager->mmio + ACP_SW_ERROR_INTR_MASK); } +static int amd_deinit_sdw_manager(struct amd_sdw_manager *amd_manager) +{ + amd_disable_sdw_interrupts(amd_manager); + return amd_disable_sdw_manager(amd_manager); +} + static void amd_sdw_set_frameshape(struct amd_sdw_manager *amd_manager) { u32 frame_size; @@ -962,6 +969,12 @@ static void amd_sdw_probe_work(struct work_struct *work) return; amd_sdw_set_frameshape(amd_manager); } + /* Enable runtime PM */ + pm_runtime_set_autosuspend_delay(amd_manager->dev, AMD_SDW_MASTER_SUSPEND_DELAY_MS); + pm_runtime_use_autosuspend(amd_manager->dev); + pm_runtime_mark_last_busy(amd_manager->dev); + pm_runtime_set_active(amd_manager->dev); + pm_runtime_enable(amd_manager->dev); } static int amd_sdw_manager_probe(struct platform_device *pdev) @@ -1047,17 +1060,165 @@ static int amd_sdw_manager_remove(struct platform_device *pdev) { struct amd_sdw_manager *amd_manager = dev_get_drvdata(&pdev->dev); + pm_runtime_disable(&pdev->dev); cancel_work_sync(&amd_manager->probe_work); amd_disable_sdw_interrupts(amd_manager); sdw_bus_master_delete(&amd_manager->bus); return amd_disable_sdw_manager(amd_manager); } +static int amd_sdw_clock_stop(struct amd_sdw_manager *amd_manager) +{ + u32 val; + u32 retry_count = 0; + int ret; + + ret = sdw_bus_prep_clk_stop(&amd_manager->bus); + if (ret < 0 && ret != -ENODATA) { + dev_err(amd_manager->dev, "prepare clock stop failed %d", ret); + return 0; + } + ret = sdw_bus_clk_stop(&amd_manager->bus); + if (ret < 0 && ret != -ENODATA) { + dev_err(amd_manager->dev, "bus clock stop failed %d", ret); + return 0; + } + + do { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + if (val & AMD_SDW_CLK_STOP_DONE) { + amd_manager->clk_stopped = true; + break; + } + usleep_range(10, 20); + } while (retry_count++ < AMD_SDW_CLK_STOP_MAX_RETRY_COUNT); + + if (!amd_manager->clk_stopped) { + dev_err(amd_manager->dev, "SDW%x clock stop failed\n", amd_manager->instance); + return 0; + } + + if (amd_manager->wake_en_mask) + acp_reg_writel(0x01, amd_manager->acp_mmio + ACP_SW_WAKE_EN(amd_manager->instance)); + + dev_dbg(amd_manager->dev, "SDW%x clock stop successful\n", amd_manager->instance); + return 0; +} + +static int amd_sdw_clock_stop_exit(struct amd_sdw_manager *amd_manager) +{ + int ret; + u32 val; + u32 retry_count = 0; + + if (amd_manager->clk_stopped) { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + val |= AMD_SDW_CLK_RESUME_REQ; + acp_reg_writel(val, amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + do { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + if (val & AMD_SDW_CLK_RESUME_DONE) + break; + usleep_range(10, 20); + } while (retry_count++ < AMD_SDW_CLK_STOP_MAX_RETRY_COUNT); + if (val & AMD_SDW_CLK_RESUME_DONE) { + acp_reg_writel(0, amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + ret = sdw_bus_exit_clk_stop(&amd_manager->bus); + if (ret < 0) + dev_err(amd_manager->dev, "bus failed to exit clock stop %d\n", + ret); + amd_manager->clk_stopped = false; + } + } + if (amd_manager->clk_stopped) { + dev_err(amd_manager->dev, "SDW%x clock stop exit failed\n", amd_manager->instance); + return 0; + } + dev_dbg(amd_manager->dev, "SDW%x clock stop exit successful\n", amd_manager->instance); + return 0; +} + +static int __maybe_unused amd_suspend_runtime(struct device *dev) +{ + struct amd_sdw_manager *amd_manager = dev_get_drvdata(dev); + struct sdw_bus *bus = &amd_manager->bus; + int ret; + + if (bus->prop.hw_disabled) { + dev_dbg(bus->dev, "SoundWire manager %d is disabled,\n", + bus->link_id); + return 0; + } + if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) { + ret = amd_sdw_clock_stop(amd_manager); + if (ret) + return ret; + } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) { + ret = amd_sdw_clock_stop(amd_manager); + if (ret) + return ret; + ret = amd_deinit_sdw_manager(amd_manager); + if (ret) + return ret; + } + return 0; +} + +static int __maybe_unused amd_resume_runtime(struct device *dev) +{ + struct amd_sdw_manager *amd_manager = dev_get_drvdata(dev); + struct sdw_bus *bus = &amd_manager->bus; + int ret; + u32 val; + u32 retry_count = 0; + + if (bus->prop.hw_disabled) { + dev_dbg(bus->dev, "SoundWire manager %d is disabled, ignoring\n", + bus->link_id); + return 0; + } + + if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) { + ret = amd_sdw_clock_stop_exit(amd_manager); + if (ret) + return ret; + } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + if (val) { + val |= AMD_SDW_CLK_RESUME_REQ; + acp_reg_writel(val, amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + do { + val = acp_reg_readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + if (val & AMD_SDW_CLK_RESUME_DONE) + break; + usleep_range(10, 20); + } while (retry_count++ < AMD_SDW_CLK_STOP_MAX_RETRY_COUNT); + if (val & AMD_SDW_CLK_RESUME_DONE) { + acp_reg_writel(0, amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL); + amd_manager->clk_stopped = false; + } + } + sdw_clear_slave_status(bus, SDW_UNATTACH_REQUEST_MASTER_RESET); + amd_init_sdw_manager(amd_manager); + amd_enable_sdw_interrupts(amd_manager); + ret = amd_enable_sdw_manager(amd_manager); + if (ret) + return ret; + amd_sdw_set_frameshape(amd_manager); + } + return 0; +} + +static const struct dev_pm_ops amd_pm = { + SET_RUNTIME_PM_OPS(amd_suspend_runtime, amd_resume_runtime, NULL) +}; + static struct platform_driver amd_sdw_driver = { .probe = &amd_sdw_manager_probe, .remove = &amd_sdw_manager_remove, .driver = { .name = "amd_sdw_manager", + .pm = &amd_pm, } }; module_platform_driver(amd_sdw_driver); diff --git a/drivers/soundwire/amd_manager.h b/drivers/soundwire/amd_manager.h index 3920648fdc52..93022a325598 100644 --- a/drivers/soundwire/amd_manager.h +++ b/drivers/soundwire/amd_manager.h @@ -187,6 +187,9 @@ #define AMD_SDW0_PAD_KEEPER_DISABLE_MASK 0x1E #define AMD_SDW1_PAD_KEEPER_DISABLE_MASK 0xF #define AMD_SDW_PREQ_INTR_STAT BIT(19) +#define AMD_SDW_CLK_STOP_DONE 1 +#define AMD_SDW_CLK_RESUME_REQ 2 +#define AMD_SDW_CLK_RESUME_DONE 3 enum amd_sdw_cmd_type { AMD_SDW_CMD_PING = 0, diff --git a/include/linux/soundwire/sdw_amd.h b/include/linux/soundwire/sdw_amd.h index df60bc0de6fc..ceecad74aef9 100644 --- a/include/linux/soundwire/sdw_amd.h +++ b/include/linux/soundwire/sdw_amd.h @@ -8,6 +8,21 @@ #include +/* AMD pm_runtime quirk definitions */ + +/* + * Force the clock to stop(ClockStopMode0) when suspend callback + * is invoked. + */ +#define AMD_SDW_CLK_STOP_MODE 1 + +/* + * Stop the bus when runtime suspend/system level suspend callback + * is invoked. If set, a complete bus reset and re-enumeration will + * be performed when the bus restarts. In-band wake interrupts are + * not supported in this mode. + */ +#define AMD_SDW_POWER_OFF_MODE 2 #define ACP_SDW0 0 #define ACP_SDW1 1 @@ -57,6 +72,7 @@ struct sdw_amd_dai_runtime { * @instance: SoundWire manager instance * @quirks: SoundWire manager quirks * @wake_en_mask: wake enable mask per SoundWire manager + * @clk_stopped: flag set to true when clock is stopped * @power_mode_mask: flag interprets amd SoundWire manager power mode * @dai_runtime_array: dai runtime array */ @@ -86,6 +102,7 @@ struct amd_sdw_manager { u32 quirks; u32 wake_en_mask; u32 power_mode_mask; + bool clk_stopped; struct sdw_amd_dai_runtime **dai_runtime_array; }; From patchwork Thu Mar 2 06:21:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mukunda,Vijendar" X-Patchwork-Id: 13156754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9CBB5C678D4 for ; Thu, 2 Mar 2023 06:21:07 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 53C28847; Thu, 2 Mar 2023 07:20:15 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 53C28847 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1677738065; bh=5Loequhghg4e45Ih4iotPCArKt0INWvxNw/okaCd06Q=; h=From:To:Subject:Date:In-Reply-To:References:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=BB5MKdiu4iHiG5NLpG4igCiZY+6doNV2wrPZGviB5IyIV913oZlzIphceFASXUMUq ViGSQdAkHyGgcu44Sl/2AsGS2BIwwRLqdJ4gGlIdt4/6v4RZQpEW9l7m/zj5YVzc/A ZVYTB2XurdKJ816HWUicDIN6BytzsmdB11ZipJCM= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id F1A4BF8052E; Thu, 2 Mar 2023 07:19:59 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 21C6FF8053B; Thu, 2 Mar 2023 07:19:54 +0100 (CET) Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on20628.outbound.protection.outlook.com [IPv6:2a01:111:f400:7e88::628]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 4C1F4F80310 for ; Thu, 2 Mar 2023 07:19:44 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 4C1F4F80310 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key, unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=phP47sdF ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=is3YzR3nU5aGFxNv5hQLQ1cS1sdFlJ6aQj4YyIcWxvPVvTPTsNoBihwL4z/uzpJMoAXNjwq0+TQ0r3SU0f88xOQmAHTDSqoIEGlXPkWSyNVzHnSTVfFLbFuMBvad0PgQNyEUur+hs/mQuoxS7g3EwS0krujqZiV6f5y58Mj2etCLo5h1qVzuxQZE+8rR8XJcufAq74yqwkcBsvuJfQb2+c8+tVHMH+k7/hloPKYTkmIueFDcGFsA3ZBDPE9uHFfmzOizBxs8bXcJgVPw5dW+bhBGu3qNAxrOTdiTSS7Mjsu/uugOq44Mhf0dXuAbtYSihiPAGwDLc9rLQHND3tJWjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=7ylmuvE/Fzl6uSZ7yPE9Gu9rTU3SZqPH2oQ0xP9CALs=; b=C/ukCgqa8HHMMo7/ro6QP/kzQyOC/YpQTxTE9eMzRFhRLMW1xbe1mnJqvahfom3SKvplhvuKxSfB2sLW/dcnzbe/G58nJZAKt2LsELyfnLjiE6g6bOZUJlM0EDV3hTeQ0cbkTTA7cC9KBN6kUmM/9LaKBC+9JOKxs6n8hKmwi4Am4yY0kRReLb3QFVz+8HxqfYQJKCz3hfGDZBMn4AFdePVoPnp29+C+Tx1Eg4Eg1MJGs9qEBZke2xVGL9hos0r6uy5T6TW5jVMWg0RIvxymI1DiBZTr1cqrK4Oic48C7hcHy1FwE+QvlyNfs3wC85buOI/908xJOrunEfaegs6N+w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=7ylmuvE/Fzl6uSZ7yPE9Gu9rTU3SZqPH2oQ0xP9CALs=; b=phP47sdFrXTh1tYqXIiRIEhOZSZFqbDsuDhkvDZajcWYVObuzEcJRsk/mi4UkqdWxci/DLFh1io7ynkeCwco9YZW5apshuv1Z0hSCEXyJrTdZ6uBiGt6pYlrCaPF+e1q2MpU6AectU0JXBNfvsrOVOBwmpMMG2N8F3tYBIAeNhc= Received: from DM5PR07CA0113.namprd07.prod.outlook.com (2603:10b6:4:ae::42) by PH7PR12MB6468.namprd12.prod.outlook.com (2603:10b6:510:1f4::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.30; Thu, 2 Mar 2023 06:19:40 +0000 Received: from DS1PEPF0000E655.namprd02.prod.outlook.com (2603:10b6:4:ae:cafe::b8) by DM5PR07CA0113.outlook.office365.com (2603:10b6:4:ae::42) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.19 via Frontend Transport; Thu, 2 Mar 2023 06:19:40 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by DS1PEPF0000E655.mail.protection.outlook.com (10.167.18.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6156.12 via Frontend Transport; Thu, 2 Mar 2023 06:19:40 +0000 Received: from SATLEXMB08.amd.com (10.181.40.132) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 2 Mar 2023 00:19:39 -0600 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB08.amd.com (10.181.40.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 1 Mar 2023 22:19:39 -0800 Received: from vijendar-X570-GAMING-X.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 2 Mar 2023 00:19:35 -0600 From: Vijendar Mukunda To: Subject: [PATCH V5 7/8] soundwire: amd: handle SoundWire wake enable interrupt Date: Thu, 2 Mar 2023 11:51:06 +0530 Message-ID: <20230302062107.207845-8-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> References: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E655:EE_|PH7PR12MB6468:EE_ X-MS-Office365-Filtering-Correlation-Id: 0179331f-48c0-492f-6ed3-08db1ae61b1f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9rLBW8qh5UoD3M94Z1M7s0NibHQYyFangDxICAV8qZgjEZiqraBdVvkMZ2sDM7CZfmqHfwh0ZYMhAT8fn9bTU8bphSGIpRI5aanukuHoxWTQqVvbkUou3EIweFibhgEWhatuEm6Wv2CgfokjmOy6FbRRELwGwkRPpzccdYMEjL0cMamLoL3xsIGC1RdA/ezF9xDXwRNow7tX8bXmS/3CctUEn7dOXJ99oIrc4gSsBkYCmMyLhKE/FkNXz4NJY9uw5hCN1VYc8ps5HEKYGy8AZk84/DStJ2ihFw1n8sVMMldBHStZ+PRWnZlh8qTw3b2hXfuo46wRSh/vMR5ZNoWOd4yo8BzqyTNrr9+SUiQnn1T+m/hLfaBfAxA6sJdkO/yLxrEf4qqV39zJl1EmxetimCtTyNi3obLsXhtuSXk/nkIl6H0b6IiwawcroByf97Q60w/xE8B2vjcLtGG5WLIzQIO0Nq0pj4R//1aspjUun6S6OL/jNSbcRq/YZFhAk6liiXoOECKF/fTCRzEfpqcFhUh07UzP7KvzRpdd30G+2Iim1Kyo6oUheW+u/+ufGOmlrDprh9jiz/jrAw/ZPdMwZZDNj/TAu5MVDVnazsOx0GGUKxR94cjpWBRApnSOhRmVjIg+534HUun91MZtNq8gCRNq2lh42bJ6PFMKoR6Wcwyd8vX75hPn0Dx7HUkYraK4U8pqsDERXqgbtX9Xe6q/mn+n2Ap7qlHP+Cj3gf5HDtc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(346002)(376002)(39860400002)(396003)(451199018)(46966006)(40470700004)(36840700001)(86362001)(36756003)(8676002)(41300700001)(40480700001)(4326008)(5660300002)(8936002)(70206006)(36860700001)(81166007)(356005)(82740400003)(7696005)(966005)(54906003)(478600001)(6666004)(316002)(6916009)(82310400005)(70586007)(2906002)(47076005)(26005)(426003)(186003)(83380400001)(40460700003)(336012)(1076003)(2616005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2023 06:19:40.1964 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0179331f-48c0-492f-6ed3-08db1ae61b1f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000E655.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6468 Message-ID-Hash: YWMQCG3ZSMODXUEMPYUUE4MN3UOBWNDA X-Message-ID-Hash: YWMQCG3ZSMODXUEMPYUUE4MN3UOBWNDA X-MailFrom: Vijendar.Mukunda@amd.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org, pierre-louis.bossart@linux.intel.com, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, Mario.Limonciello@amd.com, amadeuszx.slawinski@linux.intel.com, Mastan.Katragadda@amd.com, Arungopal.kondaveeti@amd.com, Vijendar Mukunda , Bard Liao , Sanyog Kale , open list X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Add wake enable interrupt support for both the SoundWire manager instances. Signed-off-by: Vijendar Mukunda Signed-off-by: Mastan Katragadda Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/lkml/20230227154801.50319-8-Vijendar.Mukunda@amd.com --- drivers/soundwire/amd_manager.c | 10 ++++++++++ drivers/soundwire/amd_manager.h | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/soundwire/amd_manager.c b/drivers/soundwire/amd_manager.c index d074c11088be..1caad2ccdd20 100644 --- a/drivers/soundwire/amd_manager.c +++ b/drivers/soundwire/amd_manager.c @@ -927,6 +927,13 @@ static void amd_sdw_update_slave_status(u32 status_change_0to7, u32 status_chang } } +static void amd_sdw_process_wake_event(struct amd_sdw_manager *amd_manager) +{ + pm_request_resume(amd_manager->dev); + acp_reg_writel(0x00, amd_manager->acp_mmio + ACP_SW_WAKE_EN(amd_manager->instance)); + acp_reg_writel(0x00, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_8TO11); +} + static void amd_sdw_irq_thread(struct work_struct *work) { struct amd_sdw_manager *amd_manager = @@ -938,6 +945,9 @@ static void amd_sdw_irq_thread(struct work_struct *work) status_change_0to7 = acp_reg_readl(amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_0TO7); dev_dbg(amd_manager->dev, "[SDW%d] SDW INT: 0to7=0x%x, 8to11=0x%x\n", amd_manager->instance, status_change_0to7, status_change_8to11); + if (status_change_8to11 & AMD_SDW_WAKE_STAT_MASK) + return amd_sdw_process_wake_event(amd_manager); + if (status_change_8to11 & AMD_SDW_PREQ_INTR_STAT) { amd_sdw_read_and_process_ping_status(amd_manager); } else { diff --git a/drivers/soundwire/amd_manager.h b/drivers/soundwire/amd_manager.h index 93022a325598..2e9032784f34 100644 --- a/drivers/soundwire/amd_manager.h +++ b/drivers/soundwire/amd_manager.h @@ -190,6 +190,7 @@ #define AMD_SDW_CLK_STOP_DONE 1 #define AMD_SDW_CLK_RESUME_REQ 2 #define AMD_SDW_CLK_RESUME_DONE 3 +#define AMD_SDW_WAKE_STAT_MASK BIT(16) enum amd_sdw_cmd_type { AMD_SDW_CMD_PING = 0, From patchwork Thu Mar 2 06:21:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mukunda,Vijendar" X-Patchwork-Id: 13156755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6EA58C678D4 for ; Thu, 2 Mar 2023 06:21:31 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 8F81E209; Thu, 2 Mar 2023 07:20:38 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 8F81E209 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1677738088; bh=OufZdlweVltB8oPPhaIhJ7ZJjF1yUIJYJmCIIaTzN8k=; h=From:To:Subject:Date:In-Reply-To:References:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=F4YXeKEoZBLQzG9bHHQFeccGTxGfqKqRY5giPAH+I8RbIpeaR6FoaahdLVOUqsunQ ACy2AFozhMhswXNl9JMUV37+gymF61xlmsghlvJ0yfj9Zn5l3OUzw0lsbpnTRWhHJK mYkn7oF/nRNJuXpHeUuWsZd6UahK1T5GgkF9xA/w= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 63CF2F80548; Thu, 2 Mar 2023 07:20:02 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id EA50FF80533; Thu, 2 Mar 2023 07:19:55 +0100 (CET) Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2061a.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe59::61a]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 3AA8EF8052D for ; Thu, 2 Mar 2023 07:19:49 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 3AA8EF8052D Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key, unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=5W10JQOJ ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bhnKNFhMEyxjtAIM9d+8xkZ0bQhbQgibUDFwA4+pZaUavjwWCVPN1sDxKTe7NUbsLcUSDQYsKUdEhC6UVq/2gEnDjhXeKoibJzWY9pX1+1U0rZz7hsgKIrGA5A2d+tH8bMGOwGF5HSbs+0l76WfvmOsvkgiAuuvAt/m3qX0YDUjoplEzUuQsmaAa91XLMBftly7nzT80XXaSwpdisXJ+1I3xY36d+7EuUR1Hlkjk9xCD1GktbXrt63AE5uVE6NS8g/P20haURRDtTEKcVopLqctXMLYV6hl8P1xFrHOT99eV3FDNW8UxPiCsfZMbocw58w+2GROiZHuiMIcPCOV71Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=pBhSefZ9CFdJnp7doS7vXDfQd9A3+KRh+03dcoZ/QjM=; b=Gnxp50oeO2B6XUZMpSQ1UOqgi7oEhwjqginchcDyQwqqJA6INSe6vpadAASHAmko6LrDhuNA2eyfSIIOb39QqQTCiHlSk7G8Doc83F++9ZfqFV6sjptE0pgqaQqK8Ys9HXy/6wXk3gQCziEKxSV2ZGBFMTdgUQ4f0sG1HrAWBwJm9SpOy/6pHhr+gd89I5V5BcUitEjC3dzK8NU/N1hjexDS1ahc5ABPEDgI1k2UmLDOiSxv+WrSDcTJkXow6rnV9hTKwzZtyEa8ga6WpMH42L0IxNN386ogiM5RNha454XNdaim64xhxXlSVpqZs0k4l1lQFs1tSG6f/sRYO59NWg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=pBhSefZ9CFdJnp7doS7vXDfQd9A3+KRh+03dcoZ/QjM=; b=5W10JQOJvN+oJTQWKNOcdXtHb3yo7JzE9AVWwBszUdO2Y5odAjGpRdxPQso5Stvomu22EAeqg1U3JbNpK9dG/4Ngs4JX/+zroemzQ+tIiZXzluQTXh0AvqCucOBhFcdCfXMsPH7N/YypXvixlGzw8xn/Aq82J55EVgmAOAT+lXc= Received: from DM6PR06CA0055.namprd06.prod.outlook.com (2603:10b6:5:54::32) by DM4PR12MB6277.namprd12.prod.outlook.com (2603:10b6:8:a5::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.30; Thu, 2 Mar 2023 06:19:44 +0000 Received: from DS1PEPF0000E651.namprd02.prod.outlook.com (2603:10b6:5:54:cafe::8c) by DM6PR06CA0055.outlook.office365.com (2603:10b6:5:54::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6156.19 via Frontend Transport; Thu, 2 Mar 2023 06:19:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by DS1PEPF0000E651.mail.protection.outlook.com (10.167.18.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6156.12 via Frontend Transport; Thu, 2 Mar 2023 06:19:44 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 2 Mar 2023 00:19:43 -0600 Received: from vijendar-X570-GAMING-X.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 2 Mar 2023 00:19:39 -0600 From: Vijendar Mukunda To: Subject: [PATCH V5 8/8] soundwire: amd: add pm_prepare callback and pm ops support Date: Thu, 2 Mar 2023 11:51:07 +0530 Message-ID: <20230302062107.207845-9-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> References: <20230302062107.207845-1-Vijendar.Mukunda@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E651:EE_|DM4PR12MB6277:EE_ X-MS-Office365-Filtering-Correlation-Id: f3fa4981-d870-47b0-573d-08db1ae61d6f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7r8v4sEsr12E+mU0EEXgVSS0yrQVr0m5HyLcuay5QhafXXRkyo/75FDPzApJL5v++t4j5pWW3sc7BiTbdDOUwqT9NUOWEmFFyUBjC0WBH0p2gmNDACNIWGIJfnn4ZUTCy0HhJCDZmTmWWmp1y6kzV6HvZljhNamWCq7sjCU8g18KV1MuZtYV6wZLa8rBTPC603cRVt1owcVJ+OFJxOvoPwOrPMwVx7R+sIRPKRRE2NjHp7Gmbzz512IUYb+xRT89FjGe/CN/mdrxlngiU0CVHhyUwNKCNETjh9yGSe0SNrBXYbonvx46jabUvvOpppOmHeM9VzjVb/yDvEW7kOvCwosfskiCvrQ5RyP9DPoXdE/W3emNJ0QRcIFUfNQ9nmVWvXLrhZ6A74XQA06pxwVJ+pvrv9rTZPLp8rfWcZa053CtLr/aJgY9N9Z/Ug2koLMFJVj7SGYxUhrTsEbFZKUs87dSXN9l/ybUgK8vzJT4841B9CSWKTyGWSr5Z7kqoXX4dF3EQSMHZoPeCf0d2NyEH6k3PpqLYkHYtcDzBnpgQ3k9q7pZ5Qul5QgnIjTEtw+fFCqPxGWKW/mGtlWi0i4C6t75ekjO+orIiEASTtYoHktIw/Jbrfql92uJ7j/H3B/VHaslP0S4nqyZu23kg1TVeX0rwj/5UKrqudpfwCX6DQbXkiwl9tjr6SIj6OjtbXfyGiFn/gkWGI4ZsfhcCWrrMB/wcWXtar/gdxZoTwr/ssQ= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(39860400002)(376002)(396003)(346002)(451199018)(46966006)(36840700001)(40470700004)(7696005)(36756003)(356005)(86362001)(41300700001)(8936002)(40480700001)(8676002)(6916009)(5660300002)(4326008)(70206006)(82740400003)(36860700001)(81166007)(6666004)(316002)(54906003)(478600001)(70586007)(47076005)(82310400005)(2906002)(83380400001)(426003)(186003)(336012)(1076003)(26005)(2616005)(40460700003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2023 06:19:44.0912 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f3fa4981-d870-47b0-573d-08db1ae61d6f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000E651.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6277 Message-ID-Hash: K7G63NCPQOB54ZP4L2RNCU7H5GC3BOFO X-Message-ID-Hash: K7G63NCPQOB54ZP4L2RNCU7H5GC3BOFO X-MailFrom: Vijendar.Mukunda@amd.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org, pierre-louis.bossart@linux.intel.com, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, Mario.Limonciello@amd.com, amadeuszx.slawinski@linux.intel.com, Mastan.Katragadda@amd.com, Arungopal.kondaveeti@amd.com, Vijendar Mukunda , Bard Liao , Sanyog Kale , open list X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Add pm_prepare callback and System level pm ops support for AMD SoundWire manager driver. Signed-off-by: Vijendar Mukunda Signed-off-by: Mastan Katragadda --- drivers/soundwire/amd_manager.c | 85 +++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/drivers/soundwire/amd_manager.c b/drivers/soundwire/amd_manager.c index 1caad2ccdd20..f7e68702ee7a 100644 --- a/drivers/soundwire/amd_manager.c +++ b/drivers/soundwire/amd_manager.c @@ -1148,6 +1148,89 @@ static int amd_sdw_clock_stop_exit(struct amd_sdw_manager *amd_manager) return 0; } +static int amd_resume_child_device(struct device *dev, void *data) +{ + struct sdw_slave *slave = dev_to_sdw_dev(dev); + int ret; + + if (!slave->probed) { + dev_dbg(dev, "skipping device, no probed driver\n"); + return 0; + } + if (!slave->dev_num_sticky) { + dev_dbg(dev, "skipping device, never detected on bus\n"); + return 0; + } + if (!pm_runtime_suspended(dev)) + return 0; + ret = pm_request_resume(dev); + if (ret < 0) + dev_err(dev, "pm_request_resume failed: %d\n", ret); + + return ret; +} + +static int __maybe_unused amd_pm_prepare(struct device *dev) +{ + struct amd_sdw_manager *amd_manager = dev_get_drvdata(dev); + struct sdw_bus *bus = &amd_manager->bus; + int ret; + + if (bus->prop.hw_disabled) { + dev_dbg(bus->dev, "SoundWire manager %d is disabled, ignoring\n", + bus->link_id); + return 0; + } + /* + * When multiple peripheral devices connected over the same link, if SoundWire manager + * device is not in runtime suspend state, observed that device alerts are missing + * without pm_prepare on AMD platforms in clockstop mode0. + */ + if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) { + ret = pm_request_resume(dev); + if (ret < 0) { + dev_err(bus->dev, "pm_request_resume failed: %d\n", ret); + return 0; + } + } + /* To force peripheral devices to system level suspend state, resume the devices + * from runtime suspend state first. Without that unable to dispatch the alert + * status to peripheral driver during system level resume as they are in runtime + * suspend state. + */ + ret = device_for_each_child(bus->dev, NULL, amd_resume_child_device); + if (ret < 0) + dev_err(dev, "amd_resume_child_device failed: %d\n", ret); + return 0; +} + +static int __maybe_unused amd_suspend(struct device *dev) +{ + struct amd_sdw_manager *amd_manager = dev_get_drvdata(dev); + struct sdw_bus *bus = &amd_manager->bus; + int ret; + + if (bus->prop.hw_disabled) { + dev_dbg(bus->dev, "SoundWire manager %d is disabled, ignoring\n", + bus->link_id); + return 0; + } + + if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) { + return amd_sdw_clock_stop(amd_manager); + } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) { + /* + * As per hardware programming sequence on AMD platforms, + * clock stop should be invoked first before powering-off + */ + ret = amd_sdw_clock_stop(amd_manager); + if (ret) + return ret; + return amd_deinit_sdw_manager(amd_manager); + } + return 0; +} + static int __maybe_unused amd_suspend_runtime(struct device *dev) { struct amd_sdw_manager *amd_manager = dev_get_drvdata(dev); @@ -1220,6 +1303,8 @@ static int __maybe_unused amd_resume_runtime(struct device *dev) } static const struct dev_pm_ops amd_pm = { + .prepare = amd_pm_prepare, + SET_SYSTEM_SLEEP_PM_OPS(amd_suspend, amd_resume_runtime) SET_RUNTIME_PM_OPS(amd_suspend_runtime, amd_resume_runtime, NULL) };