From patchwork Fri Mar 3 21:34:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenghua Yu X-Patchwork-Id: 13159515 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AB3FC64EC4 for ; Fri, 3 Mar 2023 21:34:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231816AbjCCVeZ (ORCPT ); Fri, 3 Mar 2023 16:34:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231804AbjCCVeX (ORCPT ); Fri, 3 Mar 2023 16:34:23 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AEAB211140; Fri, 3 Mar 2023 13:34:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677879261; x=1709415261; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2RUBN/hdK7Y3M237lPTg27d9QJ3VCdg0r/JSZ5wz68Y=; b=cYXU9zYuEw0MKaC5MD9lmUR2jZM+h+FXTl9NUWzJ+olhdTW0N7QZCC7F QC+cmNLhdMAPtA0vyUwwvwHINyAIOgnmaRoUZ0QZ3Yuizx+sJY7vvfaHq pvK6BhUR2nm1ouifktFkV8u9Ea9+EloIbCqhSgs4cRhpTURVtEFLedACN JLx0B0o61IBR9r8rZBVy5chugx8DlyPblvbQG9rGsz3bGiUJxqOy2PBZH zSWkgxW3dUoPN8QLXMw6PhZ/ZDK+23/sEFo7adJ2Y+q9C79ZWzULyb/v3 Y0blJc67GRKIwgdRaNNZumolY5FviGZWKi7DLQh0nWZMac3VYdDn8M4HU g==; X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="399976467" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="399976467" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2023 13:34:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="675508698" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="675508698" Received: from fyu1.sc.intel.com ([172.25.103.126]) by orsmga002.jf.intel.com with ESMTP; 03 Mar 2023 13:34:19 -0800 From: Fenghua Yu To: "Vinod Koul" , "Dave Jiang" Cc: dmaengine@vger.kernel.org, "linux-kernel" , Fenghua Yu Subject: [PATCH v2 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation Date: Fri, 3 Mar 2023 13:34:11 -0800 Message-Id: <20230303213413.3357431-2-fenghua.yu@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230303213413.3357431-1-fenghua.yu@intel.com> References: <20230303213413.3357431-1-fenghua.yu@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The memory fill operation (0x04) can fill in memory with either 8 bytes or 16 bytes of pattern. To fill in memory with 16 bytes of pattern, the first 8 bytes are provided in pattern lower in bytes 16-23 and the next 8 bytes are in pattern upper in bytes 40-47 in the descriptor. Currently only 8 bytes of pattern is enabled. Add descriptor definitions for pattern lower and pattern upper so that user can use 16 bytes of pattern to fill memory. Signed-off-by: Fenghua Yu Reviewed-by: Dave Jiang --- v2: - Change anonymous struct to uint64_t for pattern_upper (Dave Jiang) include/uapi/linux/idxd.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h index 1d553bedbdb5..c43d7df5fc15 100644 --- a/include/uapi/linux/idxd.h +++ b/include/uapi/linux/idxd.h @@ -180,6 +180,7 @@ struct dsa_hw_desc { uint64_t rdback_addr; uint64_t pattern; uint64_t desc_list_addr; + uint64_t pattern_lower; }; union { uint64_t dst_addr; @@ -244,6 +245,9 @@ struct dsa_hw_desc { uint16_t dest_app_tag_seed; }; + /* Fill */ + uint64_t pattern_upper; + uint8_t op_specific[24]; }; } __attribute__((packed)); From patchwork Fri Mar 3 21:34:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenghua Yu X-Patchwork-Id: 13159514 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A656C7EE32 for ; Fri, 3 Mar 2023 21:34:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231812AbjCCVeY (ORCPT ); Fri, 3 Mar 2023 16:34:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44698 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231795AbjCCVeX (ORCPT ); Fri, 3 Mar 2023 16:34:23 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D83471027A; Fri, 3 Mar 2023 13:34:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677879261; x=1709415261; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UJz0pCiqK7oMKPy2pp6vBg4X2Osf4pLe4Lvm2wE5zaA=; b=J7pP2euV83o+8BV2QpNzhbRLhOUGLdRZDgyWFZfVwfBKbySHAbnSVDYZ FWozGu08KrvdK3TPxHx/0v7Aj1IqS9itYC36B2kFs/f0H5ppWa7JCFKTk 7GIGcDXqD+t106fd3ytNm7F/LZKF+aO5wSNKygAxodJ72cF05jqVx3U9o 9r8guOy12CvFjXwiU4Zj0s+9gcWsUMNBzDOrjAkr5NOovzpWhiTwCuOoD M+xzTrG9HFNg998N6l89sFp9h7MCHKoA+TIjfOlLVOyKVuAe36pooIgjm QBM9qtp0CQFuNzc9SICNsrEWJOsFaZ4xxMzCBTipQlYjBdhXwmyvlELxF A==; X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="399976469" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="399976469" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2023 13:34:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="675508701" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="675508701" Received: from fyu1.sc.intel.com ([172.25.103.126]) by orsmga002.jf.intel.com with ESMTP; 03 Mar 2023 13:34:19 -0800 From: Fenghua Yu To: "Vinod Koul" , "Dave Jiang" Cc: dmaengine@vger.kernel.org, "linux-kernel" , Fenghua Yu Subject: [PATCH v2 2/3] dmaengine: idxd: Add descriptor definitions for DIX generate operation Date: Fri, 3 Mar 2023 13:34:12 -0800 Message-Id: <20230303213413.3357431-3-fenghua.yu@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230303213413.3357431-1-fenghua.yu@intel.com> References: <20230303213413.3357431-1-fenghua.yu@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Data Integrity Extension (DIX) generate operation (0x17) computes the Data Integrity Field (DIF) on the source data and writes only the computed DIF for each source block to the PI destination address. Add descriptor definitions for this operation so that user can use DSA to accelerate DIX generate operation. Signed-off-by: Fenghua Yu Reviewed-by: Dave Jiang --- include/uapi/linux/idxd.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h index c43d7df5fc15..4c12e93a6aa6 100644 --- a/include/uapi/linux/idxd.h +++ b/include/uapi/linux/idxd.h @@ -78,6 +78,7 @@ enum dsa_opcode { DSA_OPCODE_DIF_INS, DSA_OPCODE_DIF_STRP, DSA_OPCODE_DIF_UPDT, + DSA_OPCODE_DIX_GEN = 0x17, DSA_OPCODE_CFLUSH = 0x20, }; @@ -248,6 +249,17 @@ struct dsa_hw_desc { /* Fill */ uint64_t pattern_upper; + /* DIX generate */ + struct { + uint8_t dix_gen_res; + uint8_t dest_dif_flags; + uint8_t dif_flags; + uint8_t dix_gen_res2[13]; + uint32_t ref_tag_seed; + uint16_t app_tag_mask; + uint16_t app_tag_seed; + }; + uint8_t op_specific[24]; }; } __attribute__((packed)); @@ -326,6 +338,14 @@ struct dsa_completion_record { uint16_t dif_upd_dest_app_tag; }; + /* DIX generate */ + struct { + uint64_t dix_gen_res; + uint32_t dix_ref_tag; + uint16_t dix_app_tag_mask; + uint16_t dix_app_tag; + }; + uint8_t op_specific[16]; }; } __attribute__((packed)); From patchwork Fri Mar 3 21:34:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenghua Yu X-Patchwork-Id: 13159516 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9DBFC7EE30 for ; Fri, 3 Mar 2023 21:34:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231824AbjCCVe0 (ORCPT ); Fri, 3 Mar 2023 16:34:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231808AbjCCVeY (ORCPT ); Fri, 3 Mar 2023 16:34:24 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FD8C1A485; Fri, 3 Mar 2023 13:34:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677879263; x=1709415263; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yD3JIRnWO3O5QD2FW9PbHdj50CTjoVy/ibSII+27rM0=; b=AU/FbYYhH2mrcPY6INgLkUyDiKAMhClRfiuthwSH6LCU45Ll07NLm/fQ 26uY+UX+nHP6OnZtPH2PlaZYpMuEaO3KX80rgH0QYRQ1KNSkYn51dUwN2 hsi4xDPhaQpLiuY3ybqjx03v8l7VFPJGXg6FsM336cZXlSR4m5aImdr+s GsB8dROS7URRvGoWN2hKIqPtNJvxHx8Z9nFSULTmakaWd6AEoWgjOrTN7 IYzCszvfv3Ol6gJ74kxmf2LB59QDECnL0Mxv1evHCLfx8u7Ma8WKPo+Vl eaWBFzXFR5xMRD5pbvyXyRucwxkiMXA2DH0CH+gPBJUzfNO8ktDyi7CTJ w==; X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="399976472" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="399976472" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2023 13:34:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="675508706" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="675508706" Received: from fyu1.sc.intel.com ([172.25.103.126]) by orsmga002.jf.intel.com with ESMTP; 03 Mar 2023 13:34:20 -0800 From: Fenghua Yu To: "Vinod Koul" , "Dave Jiang" Cc: dmaengine@vger.kernel.org, "linux-kernel" , Fenghua Yu Subject: [PATCH v2 3/3] dmaengine: idxd: Add descriptor definitions for translation fetch operation Date: Fri, 3 Mar 2023 13:34:13 -0800 Message-Id: <20230303213413.3357431-4-fenghua.yu@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230303213413.3357431-1-fenghua.yu@intel.com> References: <20230303213413.3357431-1-fenghua.yu@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The translation fetch operation (0x0A) fetches address translations for the address range specified in the descriptor by issuing address translation (ATS) requests to the IOMMU. Add descriptor definitions for the operation so that user can use DSA to accelerate translation fetch. Signed-off-by: Fenghua Yu Reviewed-by: Dave Jiang --- include/uapi/linux/idxd.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h index 4c12e93a6aa6..fc47635b57dc 100644 --- a/include/uapi/linux/idxd.h +++ b/include/uapi/linux/idxd.h @@ -72,6 +72,7 @@ enum dsa_opcode { DSA_OPCODE_CR_DELTA, DSA_OPCODE_AP_DELTA, DSA_OPCODE_DUALCAST, + DSA_OPCODE_TRANSL_FETCH, DSA_OPCODE_CRCGEN = 0x10, DSA_OPCODE_COPY_CRC, DSA_OPCODE_DIF_CHECK, @@ -182,6 +183,7 @@ struct dsa_hw_desc { uint64_t pattern; uint64_t desc_list_addr; uint64_t pattern_lower; + uint64_t transl_fetch_addr; }; union { uint64_t dst_addr; @@ -192,6 +194,7 @@ struct dsa_hw_desc { union { uint32_t xfer_size; uint32_t desc_count; + uint32_t region_size; }; uint16_t int_handle; uint16_t rsvd1; @@ -249,6 +252,12 @@ struct dsa_hw_desc { /* Fill */ uint64_t pattern_upper; + /* Translation fetch */ + struct { + uint64_t transl_fetch_res; + uint32_t region_stride; + }; + /* DIX generate */ struct { uint8_t dix_gen_res;