From patchwork Sun Mar 12 13:56:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 13171516 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A394C6FA99 for ; Sun, 12 Mar 2023 13:56:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229552AbjCLN4k (ORCPT ); Sun, 12 Mar 2023 09:56:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229764AbjCLN4i (ORCPT ); Sun, 12 Mar 2023 09:56:38 -0400 Received: from mail-qt1-x82c.google.com (mail-qt1-x82c.google.com [IPv6:2607:f8b0:4864:20::82c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27B103B3F0 for ; Sun, 12 Mar 2023 06:56:37 -0700 (PDT) Received: by mail-qt1-x82c.google.com with SMTP id r5so10733621qtp.4 for ; Sun, 12 Mar 2023 06:56:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678629396; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=xdv/nKoVodfRSCXXPZls965lkF2DuhBP1O95BqsvqfQ=; b=wMAa8mqg48tbhpWIknbfZQtmokxdWupbNy4mSs3/HC2T9bJ2HG4GFMa9ZiJuKV38Hg 0e7/KfpYwV65oCoHNDY0ktRkWOe57esT5E015BgMNNxJFuDnjL1bPM7F1D6U+jlR50L5 83OFXBIXkgI8BwD7M+ahph+LWyYsZrwTyqpLAECDoh/Z1makdxuJToInayJ/ZUgLCRBH oIDASbOy93HOlunXywycoIWN8Raff17OM8BKxz/4OkAtBmXvs38sPyTdxPSYauvDjNjq rz4uMye23SZpnB2MOeV4ifz7Da+6PmYgE0BfkoTRCMxXqmF18RJRdNVsxjHkMIZHXgb4 h/Bg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678629396; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xdv/nKoVodfRSCXXPZls965lkF2DuhBP1O95BqsvqfQ=; b=ZWi7quUzot08uwbhOp1puliFxZ2vWsO6aVjt6tFYo1IevqVLeGYawxo1r5Wzq/Y4gi 5WMKotzxL4QuZ2VzfZPZzMbxMI6VRD/OBduWaBKVgSyfCrBNjnn4vp0jX358t/RWXxN2 02hHNa4mb3DZbiOfsC3fY3grOBWU0CY8nVwS9xVATXQHIMvooWfjbGYDXcxbV7pR5YqK 4DPWClAGNF2xMYo32F0iVV2oqWTYpFFslKeP4qr5VFkNXuU6n6imBc6z+amDie71vlem F76TCE8yOtw8drTlaFxlb1AcdIuaIw1X/teqvVxWJLUUcY8vvR2EluCOS0gfVlCc9MJx UwbQ== X-Gm-Message-State: AO0yUKXLko+uV3FUItAIkRHsNTurortiK/pRIZtwFuA0r928ZYoO00hK SwU8wsaOQYo5ectTzc55oVRphMbsZmhOy6mwHu4= X-Google-Smtp-Source: AK7set+tIj4FYOx3Db03rrSQ2035wDIOWDIvXfhE4rme5kZCPwBNv0ed+qE14Wx2pzlw21we6H9Grg== X-Received: by 2002:ac8:5f09:0:b0:3ba:1167:72d7 with SMTP id x9-20020ac85f09000000b003ba116772d7mr19692788qta.61.1678629395989; Sun, 12 Mar 2023 06:56:35 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id u28-20020a37ab1c000000b007449a3ee9a4sm2717930qke.35.2023.03.12.06.56.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 06:56:35 -0700 (PDT) From: William Breathitt Gray To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads Date: Sun, 12 Mar 2023 09:56:25 -0400 Message-Id: <20230312135625.125312-1-william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter (CNTR) register is 24 bits wide, but we can have an effective 25-bit count value by setting bit 24 to the XOR of the Borrow flag and Carry flag. The flags can be read from the FLAG register, but a race condition exists: the Borrow flag and Carry flag are instantaneous and could change by the time the count value is read from the CNTR register. Since the race condition could result in an incorrect 25-bit count value, remove support for 25-bit count values from this driver; hard-coded maximum count values are replaced by a LS7267_CNTR_MAX define for consistency and clarity. Fixes: f1d8a071d45b ("counter: 104-quad-8: Add Generic Counter interface support") Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 29 +++++++---------------------- 1 file changed, 7 insertions(+), 22 deletions(-) base-commit: fe15c26ee26efa11741a7b632e9f23b01aca4cc6 diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index deed4afadb29..dba04b5e80b7 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -97,10 +97,6 @@ struct quad8 { struct quad8_reg __iomem *reg; }; -/* Borrow Toggle flip-flop */ -#define QUAD8_FLAG_BT BIT(0) -/* Carry Toggle flip-flop */ -#define QUAD8_FLAG_CT BIT(1) /* Error flag */ #define QUAD8_FLAG_E BIT(4) /* Up/Down flag */ @@ -133,6 +129,9 @@ struct quad8 { #define QUAD8_CMR_QUADRATURE_X2 0x10 #define QUAD8_CMR_QUADRATURE_X4 0x18 +/* Each Counter is 24 bits wide */ +#define LS7267_CNTR_MAX GENMASK(23, 0) + static int quad8_signal_read(struct counter_device *counter, struct counter_signal *signal, enum counter_signal_level *level) @@ -156,19 +155,9 @@ static int quad8_count_read(struct counter_device *counter, { struct quad8 *const priv = counter_priv(counter); struct channel_reg __iomem *const chan = priv->reg->channel + count->id; - unsigned int flags; - unsigned int borrow; - unsigned int carry; unsigned long irqflags; int i; - flags = ioread8(&chan->control); - borrow = flags & QUAD8_FLAG_BT; - carry = !!(flags & QUAD8_FLAG_CT); - - /* Borrow XOR Carry effectively doubles count range */ - *val = (unsigned long)(borrow ^ carry) << 24; - spin_lock_irqsave(&priv->lock, irqflags); /* Reset Byte Pointer; transfer Counter to Output Latch */ @@ -191,8 +180,7 @@ static int quad8_count_write(struct counter_device *counter, unsigned long irqflags; int i; - /* Only 24-bit values are supported */ - if (val > 0xFFFFFF) + if (val > LS7267_CNTR_MAX) return -ERANGE; spin_lock_irqsave(&priv->lock, irqflags); @@ -806,8 +794,7 @@ static int quad8_count_preset_write(struct counter_device *counter, struct quad8 *const priv = counter_priv(counter); unsigned long irqflags; - /* Only 24-bit values are supported */ - if (preset > 0xFFFFFF) + if (preset > LS7267_CNTR_MAX) return -ERANGE; spin_lock_irqsave(&priv->lock, irqflags); @@ -834,8 +821,7 @@ static int quad8_count_ceiling_read(struct counter_device *counter, *ceiling = priv->preset[count->id]; break; default: - /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */ - *ceiling = 0x1FFFFFF; + *ceiling = LS7267_CNTR_MAX; break; } @@ -850,8 +836,7 @@ static int quad8_count_ceiling_write(struct counter_device *counter, struct quad8 *const priv = counter_priv(counter); unsigned long irqflags; - /* Only 24-bit values are supported */ - if (ceiling > 0xFFFFFF) + if (ceiling > LS7267_CNTR_MAX) return -ERANGE; spin_lock_irqsave(&priv->lock, irqflags);