From patchwork Tue Mar 14 12:57:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 13174326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1C18C6FD1C for ; Tue, 14 Mar 2023 12:58:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=HFhK6PGJ6Yi2OPcCZ/+wGxXNH6ONUazSpI3nyJdR9Us=; b=dOohH9jhsi2eow YVh0ewiifCC6Ntjxy3DcOnCny1Z03iL1DslorsHYXOnnUXOmXDXcbams7ttQ/ZvE/b+AnoeOLoKuz 8zJ6TWxr/NwoNRZ76kcHxC7EUEtq8jddeY20FGhIafBRiQymlL/iVIUfV9jPn9/dSvaXr91+lEw2z 5eDc7yiFTbyj006q48wuu8JSBR/FxJDK+vO+pFA9/eNNz5VRmVXA8PQXx0uZ5tLDD1Yt2A5zXrO8l 8D+s749acvV5dW+v64LeF4YWTLPEc6Wtwe2QrlGkq/f25vEpzs5rlxP8jvdZT1g98C/jWglIZ8//K JuxDeyuGc2U5cd5wQDSg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pc4Dw-00AEb6-2X; Tue, 14 Mar 2023 12:57:52 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pc4Dt-00AEaJ-1v for linux-arm-kernel@lists.infradead.org; Tue, 14 Mar 2023 12:57:51 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 391666175E; Tue, 14 Mar 2023 12:57:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4511DC4339B; Tue, 14 Mar 2023 12:57:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1678798667; bh=iYVX5DLcEBYDQiFDQ+mt99W1cciashNZpHymciLD+FM=; h=From:To:Cc:Subject:Date:From; b=rjBSDN5WE2rCQu3lRsywA9nIeuMVfNIm2urukMSCdJEaNKSx2lwXBq5bFwB967+F+ DsbMmfCZMVvhYYIsFfIJvo6K0Ih8acLT+ky7GcqOd38mMyT6NQWkJ4IoGEprjFdL1J KJpE8hAWBGhZN972QlYntsgkQSG97L8Uv5X2n7ufAW0lsd6XMUMWexsLRlw/rtRkW7 Sw4pxxV/kOYKwOMaa2FaylQrlMQ35GDqwAvwEy714ugH9ogZapPH0z8r3X+h+kk61R O/yIoEezHcBt0msNSzzNtWZGYjrTz1cD1d1MOy6T3qlBZRTsdDKNABeIhHj8FbuqJC mZ2u0B48HONeg== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Frederic Weisbecker , Guenter Roeck , Peter Zijlstra Subject: [RFT PATCH] ARM: vfp: Fix broken softirq handling with instrumentation enabled Date: Tue, 14 Mar 2023 13:57:43 +0100 Message-Id: <20230314125743.4165575-1-ardb@kernel.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3731; i=ardb@kernel.org; h=from:subject; bh=iYVX5DLcEBYDQiFDQ+mt99W1cciashNZpHymciLD+FM=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIUUg322pJOuLnnMuivKtmgf7rhca30xbaaThZLdhrumxa /H3/jd0lLIwiHEwyIopsgjM/vtu5+mJUrXOs2Rh5rAygQxh4OIUgIn8lWf479fsvF9r7yoj1t12 y9Km3py6eOHuiLvvtyfnRdUYOP5yDmJkuHpitvzLl7z74qdmtf949vHBt3arMsPE/tem1w9tZF9 /mhkA X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230314_055749_709877_5B76FCC7 X-CRM114-Status: GOOD ( 13.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Commit 62b95a7b44d1 (ARM: 9282/1: vfp: Manipulate task VFP state with softirqs disabled) replaced the en/disable preemption calls inside the VFP state handling code with en/disabling of soft IRQs, which is necessary to allow kernel use of the VFP/SIMD unit when handling a soft IRQ. Unfortunately, when lockdep is enabled (or other instrumentation that enables TRACE_IRQFLAGS), the disable path implemented in asm fails to perform the lockdep and RCU related bookkeeping, resulting in spurious warnings and other badness. So let's call the C versions when they are available, and only fall back to direct manipulation of the preempt_count when we disable soft IRQs with those instrumentations disabled. Cc: Frederic Weisbecker Cc: Guenter Roeck Cc: Peter Zijlstra Link: https://lore.kernel.org/all/ZBBYCSZUJOWBg1s8@localhost.localdomain/ Fixes: 62b95a7b44d1 (ARM: 9282/1: vfp: Manipulate task VFP state with softirqs disabled) Signed-off-by: Ard Biesheuvel --- arch/arm/include/asm/assembler.h | 15 ++++---------- arch/arm/vfp/entry.S | 21 +++++++++++++++++--- arch/arm/vfp/vfphw.S | 8 ++++---- 3 files changed, 26 insertions(+), 18 deletions(-) diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 06b48ce23e1ca245..d9f7c546781a39eb 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -244,17 +244,10 @@ THUMB( fpreg .req r7 ) .endm #endif - .macro local_bh_disable, ti, tmp - ldr \tmp, [\ti, #TI_PREEMPT] - add \tmp, \tmp, #SOFTIRQ_DISABLE_OFFSET - str \tmp, [\ti, #TI_PREEMPT] - .endm - - .macro local_bh_enable_ti, ti, tmp - get_thread_info \ti - ldr \tmp, [\ti, #TI_PREEMPT] - sub \tmp, \tmp, #SOFTIRQ_DISABLE_OFFSET - str \tmp, [\ti, #TI_PREEMPT] + .macro local_bh_enable_and_ret + adr r0, . + mov r1, #SOFTIRQ_DISABLE_OFFSET + b __local_bh_enable_ip .endm #define USERL(l, x...) \ diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index 9a89264cdcc0b46e..9555c0a1c46fd47b 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -22,7 +22,23 @@ @ IRQs enabled. @ ENTRY(do_vfp) - local_bh_disable r10, r4 +#if defined(CONFIG_PREEMPT_RT) || defined(CONFIG_TRACE_IRQFLAGS) + mov r4, r0 @ stash r0, r2, lr + mov r5, r2 + mov r6, lr + + adr r0, . + mov r1, #SOFTIRQ_DISABLE_OFFSET + bl __local_bh_disable_ip + + mov r0, r4 @ restore r0, r2, lr + mov r2, r5 + mov lr, r6 +#else + ldr r4, [r10, #TI_PREEMPT] + add r4, r4, #SOFTIRQ_DISABLE_OFFSET + str r4, [r10, #TI_PREEMPT] +#endif ldr r4, .LCvfp ldr r11, [r10, #TI_CPU] @ CPU number add r10, r10, #TI_VFPSTATE @ r10 = workspace @@ -30,8 +46,7 @@ ENTRY(do_vfp) ENDPROC(do_vfp) ENTRY(vfp_null_entry) - local_bh_enable_ti r10, r4 - ret lr + local_bh_enable_and_ret @ tail call ENDPROC(vfp_null_entry) .align 2 diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 26c4f61ecfa39638..84523de8bf059ce8 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -175,8 +175,9 @@ vfp_hw_state_valid: @ else it's one 32-bit instruction, so @ always subtract 4 from the following @ instruction address. - local_bh_enable_ti r10, r4 - ret r9 @ we think we have handled things + + mov lr, r9 @ we think we have handled things + local_bh_enable_and_ret @ tail call look_for_VFP_exceptions: @@ -200,8 +201,7 @@ skip: @ not recognised by VFP DBGSTR "not VFP" - local_bh_enable_ti r10, r4 - ret lr + local_bh_enable_and_ret @ tail call process_exception: DBGSTR "bounce"