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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:03 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 01/13] docs: boards: amlogic: add bananapi-m5 to u200 maintainer file Date: Thu, 23 Mar 2023 06:54:46 +0000 Message-Id: <20230323065458.776029-2-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235510_638885_E3E0CCC9 X-CRM114-Status: UNSURE ( 7.84 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org The bananapi-m5 docs are missing from the file, so add them. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- board/amlogic/u200/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS index 47cec234a1..919e349922 100644 --- a/board/amlogic/u200/MAINTAINERS +++ b/board/amlogic/u200/MAINTAINERS @@ -7,4 +7,5 @@ F: configs/u200_defconfig F: configs/bananapi-m5_defconfig F: configs/radxa-zero_defconfig F: doc/board/amlogic/u200.rst +F: doc/board/amlogic/bananapi-m5.rst F: doc/board/amlogic/radxa-zero.rst From patchwork Thu Mar 23 06:54:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Hewitt X-Patchwork-Id: 13185117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7340C6FD1C for ; Thu, 23 Mar 2023 06:55:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cI1VqF5so/9tLO3ClwePcFq/b5yvE2J8xtBSek3IVJg=; b=rGRhivGVZMX7ai SOUvrNiRaCfvRMJVdS81zc3R+Kq3vh7axY/JtMTvs8dPX9HsMo0tSIY/QavKhqouLNPXzU79YGtIf GgKAHfpoKXKEMXUEwIlhi2NTR7MAnBodA90JWLdOT4bocM4wDFT3hQs/LobJMrdidejRbXGDE3twG 4kMjoOShtZcnG8HtqMwtkVrMRYS0GZbGuk61/loBHj7umDZAi0q4n1hfCCSStT1yBJSI4gFrqvhtE Ai9WtdVY56nYt2fn2e5/X6EdYuN6t/7tcz4Y9wPEbvZTW3YpuVF3vc+9E4ygK1r8R8/BHSbet5ZfK aJTUtU1lzYW1bu8UZ0Rg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pfEqz-0012fh-18; Thu, 23 Mar 2023 06:55:17 +0000 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pfEqt-0012c0-1F for linux-amlogic@lists.infradead.org; Thu, 23 Mar 2023 06:55:14 +0000 Received: by mail-wr1-x42c.google.com with SMTP id l27so11011815wrb.2 for ; Wed, 22 Mar 2023 23:55:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679554506; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=j1mPMWjZVr4nuqxMp4TWZsfGZUHLCS/YpS9aZ3gIvY8=; b=SluLuTK7IZIJXkr/XK5A30Y64B/IJpbX5t78VynpfqVVV8wuC2hCGUwsbkcvl6DOGf h2E2j507ewZqy8zVC2BoIKaW841FA1uiVK/wztcK483b5ZG86Kfhs70BSxNU9maMDkiY YtPx2Ii0g5qdn7/jFqlDOsKlSTrUrbyGioD+SAcqNBDjqSmD+lRzipa2CKzSgUDZTdK3 1znSAZNWIppHQ8XOXHxjPhzIBeegOTZRw8SJfIJ1JoGUw/I2+uBJc1XxatIls3lwtTnf GPAJy4KbrnqV+YcY+GBeUUPvndDS6ozVF3zZ4RpuTk+Jzl7gf1oVcCjVo+qJzJZf41oW AMKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679554506; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=j1mPMWjZVr4nuqxMp4TWZsfGZUHLCS/YpS9aZ3gIvY8=; b=5HoK7RCUM8XWYHGt+BkzJbhCm+oWbjDE6DuIpyJNHtXCvGE1hrra2KwdWsZmCotpAY scF71nI6PxKEDrXgM0ucyK5bMnq0mHmtksDZRvk8nlWa7hMFi+qT+3QHrLJOIqNRcAXn bB2S2H+ZKfxh7i6Tn5B4W1vmwzNWqmD5Iz9RK3njfEYvLjQnYNbXh0xLjvlPUbar3r8B FiPgc2pN92EpFJ61VEKbAIGu8pzedE8hks4Ki0Y3iTuI9y/0xoa+pYkrqmrkAjZkKyVN F9xNA5+/Yt6OUD8VERVpNXD7sBEEcjqWHokuj26O11pwZ1BhlqhQR17CeGsMtRAbSf8y svLA== X-Gm-Message-State: AAQBX9cQ+DoxUCjKNyrofif87fB3B3X79UATFi+zV+xrdYjjzNJufG8Q sOmYK/CIG5l+N2z4ZGxDNSE= X-Google-Smtp-Source: AKy350Yk8wjvkZEhu76HbCX1ybNPVrnnsW7EtKngtAR23gyeyShELOV2hezGdGR+Vmke6QwAHSgdGA== X-Received: by 2002:adf:f807:0:b0:2cf:efa5:5322 with SMTP id s7-20020adff807000000b002cfefa55322mr1499913wrp.14.1679554505402; Wed, 22 Mar 2023 23:55:05 -0700 (PDT) Received: from toolbox.. ([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:05 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 02/13] ARM: dts: add support for BananaPi M2-Pro Date: Thu, 23 Mar 2023 06:54:47 +0000 Message-Id: <20230323065458.776029-3-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235511_633389_ED14B935 X-CRM114-Status: GOOD ( 19.88 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Import the board dts from the linux-amlogic/for-next (6.4-rc1) branch. This involves spliting the BPI-M5 dts into a dtsi and then reusing this for the M2-Pro. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- arch/arm/dts/Makefile | 5 +- .../dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi | 14 + arch/arm/dts/meson-sm1-bananapi-m2-pro.dts | 97 ++++ arch/arm/dts/meson-sm1-bananapi-m5.dts | 427 +---------------- arch/arm/dts/meson-sm1-bananapi.dtsi | 435 ++++++++++++++++++ 5 files changed, 550 insertions(+), 428 deletions(-) create mode 100644 arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi create mode 100644 arch/arm/dts/meson-sm1-bananapi-m2-pro.dts create mode 100644 arch/arm/dts/meson-sm1-bananapi.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0c149b636a..d6139429e5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -205,14 +205,15 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-g12a-sei510.dtb \ meson-g12a-u200.dtb \ meson-g12b-a311d-khadas-vim3.dtb \ + meson-g12b-bananapi-cm4-cm4io.dtb \ + meson-g12b-gsking-x.dtb \ meson-g12b-gtking.dtb \ meson-g12b-gtking-pro.dtb \ - meson-g12b-gsking-x.dtb \ meson-g12b-odroid-go-ultra.dtb \ meson-g12b-odroid-n2.dtb \ meson-g12b-odroid-n2l.dtb \ meson-g12b-odroid-n2-plus.dtb \ - meson-g12b-bananapi-cm4-cm4io.dtb \ + meson-sm1-bananapi-m2-pro.dtb \ meson-sm1-bananapi-m5.dtb \ meson-sm1-khadas-vim3l.dtb \ meson-sm1-odroid-c4.dtb \ diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi b/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi new file mode 100644 index 0000000000..4a1aeda565 --- /dev/null +++ b/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi @@ -0,0 +1,14 @@ + +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 BayLibre, SAS + * Author: Neil Armstrong + */ + +#include "meson-sm1-u-boot.dtsi" + +ðmac { + snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; +}; diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts new file mode 100644 index 0000000000..586034316e --- /dev/null +++ b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 BayLibre SAS + * Author: Neil Armstrong + */ + +/dts-v1/; + +#include "meson-sm1-bananapi.dtsi" +#include + +/ { + compatible = "bananapi,bpi-m2-pro", "amlogic,sm1"; + model = "Banana Pi BPI-M2-PRO"; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "BPI-M2-PRO"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + + dai-link-0 { + sound-dai = <&frddr_a>; + }; + + dai-link-1 { + sound-dai = <&frddr_b>; + }; + + dai-link-2 { + sound-dai = <&frddr_c>; + }; + + /* 8ch hdmi interface */ + dai-link-3 { + sound-dai = <&tdmif_b>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + dai-tdm-slot-tx-mask-1 = <1 1>; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + + codec { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; + }; + }; + + /* hdmi glue */ + dai-link-4 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { + sound-dai = <&hdmi_tx>; + }; + }; + }; +}; + +&clkc_audio { + status = "okay"; +}; + +&frddr_a { + status = "okay"; +}; + +&frddr_b { + status = "okay"; +}; + +&frddr_c { + status = "okay"; +}; + +&tdmif_b { + status = "okay"; +}; + +&tdmout_b { + status = "okay"; +}; + +&tohdmitx { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-sm1-bananapi-m5.dts b/arch/arm/dts/meson-sm1-bananapi-m5.dts index effaa138b5..f045bf8516 100644 --- a/arch/arm/dts/meson-sm1-bananapi-m5.dts +++ b/arch/arm/dts/meson-sm1-bananapi-m5.dts @@ -6,10 +6,7 @@ /dts-v1/; -#include "meson-sm1.dtsi" -#include -#include -#include +#include "meson-sm1-bananapi.dtsi" #include #include @@ -17,28 +14,6 @@ compatible = "bananapi,bpi-m5", "amlogic,sm1"; model = "Banana Pi BPI-M5"; - adc_keys { - compatible = "adc-keys"; - io-channels = <&saradc 2>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - - key { - label = "SW3"; - linux,code = ; - press-threshold-microvolt = <1700000>; - }; - }; - - aliases { - serial0 = &uart_AO; - ethernet0 = ðmac; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - /* TOFIX: handle CVBS_DET on SARADC channel 0 */ cvbs-connector { compatible = "composite-video-connector"; @@ -50,150 +25,6 @@ }; }; - emmc_pwrseq: emmc-pwrseq { - compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; - }; - - gpio-keys { - compatible = "gpio-keys"; - - key { - label = "SW1"; - linux,code = ; - gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; - interrupt-parent = <&gpio_intc>; - interrupts = <3 IRQ_TYPE_EDGE_BOTH>; - }; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&hdmi_tx_tmds_out>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - green { - color = ; - function = LED_FUNCTION_STATUS; - gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; - }; - - blue { - color = ; - function = LED_FUNCTION_STATUS; - gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - }; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x40000000>; - }; - - emmc_1v8: regulator-emmc_1v8 { - compatible = "regulator-fixed"; - regulator-name = "EMMC_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vddao_3v3>; - regulator-always-on; - }; - - dc_in: regulator-dc_in { - compatible = "regulator-fixed"; - regulator-name = "DC_IN"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - vddio_c: regulator-vddio_c { - compatible = "regulator-gpio"; - regulator-name = "VDDIO_C"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-always-on; - - gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_DRAIN>; - gpios-states = <1>; - - states = <1800000 0>, - <3300000 1>; - }; - - tflash_vdd: regulator-tflash_vdd { - compatible = "regulator-fixed"; - regulator-name = "TFLASH_VDD"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_in>; - gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; - enable-active-high; - regulator-always-on; - }; - - vddao_1v8: regulator-vddao_1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vddao_3v3>; - regulator-always-on; - }; - - vddao_3v3: regulator-vddao_3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_in>; - regulator-always-on; - }; - - vddcpu: regulator-vddcpu { - /* - * SY8120B1ABC DC/DC Regulator. - */ - compatible = "pwm-regulator"; - - regulator-name = "VDDCPU"; - regulator-min-microvolt = <690000>; - regulator-max-microvolt = <1050000>; - - vin-supply = <&dc_in>; - - pwms = <&pwm_AO_cd 1 1250 0>; - pwm-dutycycle-range = <100 0>; - - regulator-boot-on; - regulator-always-on; - }; - - /* USB Hub Power Enable */ - vl_pwr_en: regulator-vl_pwr_en { - compatible = "regulator-fixed"; - regulator-name = "VL_PWR_EN"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_in>; - - gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - sound { compatible = "amlogic,axg-sound-card"; model = "BPI-M5"; @@ -233,7 +64,6 @@ assigned-clock-rates = <294912000>, <270950400>, <393216000>; - status = "okay"; dai-link-0 { sound-dai = <&frddr_a>; @@ -319,68 +149,17 @@ status = "okay"; }; -&arb { - status = "okay"; -}; &clkc_audio { status = "okay"; }; -&cpu0 { - cpu-supply = <&vddcpu>; - operating-points-v2 = <&cpu_opp_table>; - clocks = <&clkc CLKID_CPU_CLK>; - clock-latency = <50000>; -}; - -&cpu1 { - cpu-supply = <&vddcpu>; - operating-points-v2 = <&cpu_opp_table>; - clocks = <&clkc CLKID_CPU1_CLK>; - clock-latency = <50000>; -}; - -&cpu2 { - cpu-supply = <&vddcpu>; - operating-points-v2 = <&cpu_opp_table>; - clocks = <&clkc CLKID_CPU2_CLK>; - clock-latency = <50000>; -}; - -&cpu3 { - cpu-supply = <&vddcpu>; - operating-points-v2 = <&cpu_opp_table>; - clocks = <&clkc CLKID_CPU3_CLK>; - clock-latency = <50000>; -}; - &cvbs_vdac_port { cvbs_vdac_out: endpoint { remote-endpoint = <&cvbs_connector_in>; }; }; -&ext_mdio { - external_phy: ethernet-phy@0 { - /* Realtek RTL8211F (0x001cc916) */ - reg = <0>; - max-speed = <1000>; - - interrupt-parent = <&gpio_intc>; - /* MAC_INTR on GPIOZ_14 */ - interrupts = <26 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -ðmac { - pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; - pinctrl-names = "default"; - status = "okay"; - phy-mode = "rgmii-txid"; - phy-handle = <&external_phy>; -}; - &frddr_a { status = "okay"; }; @@ -393,191 +172,6 @@ status = "okay"; }; -&gpio { - gpio-line-names = - /* GPIOZ */ - "ETH_MDIO", /* GPIOZ_0 */ - "ETH_MDC", /* GPIOZ_1 */ - "ETH_RXCLK", /* GPIOZ_2 */ - "ETH_RX_DV", /* GPIOZ_3 */ - "ETH_RXD0", /* GPIOZ_4 */ - "ETH_RXD1", /* GPIOZ_5 */ - "ETH_RXD2", /* GPIOZ_6 */ - "ETH_RXD3", /* GPIOZ_7 */ - "ETH_TXCLK", /* GPIOZ_8 */ - "ETH_TXEN", /* GPIOZ_9 */ - "ETH_TXD0", /* GPIOZ_10 */ - "ETH_TXD1", /* GPIOZ_11 */ - "ETH_TXD2", /* GPIOZ_12 */ - "ETH_TXD3", /* GPIOZ_13 */ - "ETH_INTR", /* GPIOZ_14 */ - "ETH_NRST", /* GPIOZ_15 */ - /* GPIOH */ - "HDMI_SDA", /* GPIOH_0 */ - "HDMI_SCL", /* GPIOH_1 */ - "HDMI_HPD", /* GPIOH_2 */ - "HDMI_CEC", /* GPIOH_3 */ - "VL-RST_N", /* GPIOH_4 */ - "CON1-P36", /* GPIOH_5 */ - "VL-PWREN", /* GPIOH_6 */ - "WiFi_3V3_1V8", /* GPIOH_7 */ - "TFLASH_VDD_EN", /* GPIOH_8 */ - /* BOOT */ - "eMMC_D0", /* BOOT_0 */ - "eMMC_D1", /* BOOT_1 */ - "eMMC_D2", /* BOOT_2 */ - "eMMC_D3", /* BOOT_3 */ - "eMMC_D4", /* BOOT_4 */ - "eMMC_D5", /* BOOT_5 */ - "eMMC_D6", /* BOOT_6 */ - "eMMC_D7", /* BOOT_7 */ - "eMMC_CLK", /* BOOT_8 */ - "", - "eMMC_CMD", /* BOOT_10 */ - "", - "eMMC_RST#", /* BOOT_12 */ - "eMMC_DS", /* BOOT_13 */ - /* GPIOC */ - "SD_D0_B", /* GPIOC_0 */ - "SD_D1_B", /* GPIOC_1 */ - "SD_D2_B", /* GPIOC_2 */ - "SD_D3_B", /* GPIOC_3 */ - "SD_CLK_B", /* GPIOC_4 */ - "SD_CMD_B", /* GPIOC_5 */ - "CARD_EN_DET", /* GPIOC_6 */ - "", - /* GPIOA */ - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", - "CON1-P27", /* GPIOA_14 */ - "CON1-P28", /* GPIOA_15 */ - /* GPIOX */ - "CON1-P16", /* GPIOX_0 */ - "CON1-P18", /* GPIOX_1 */ - "CON1-P22", /* GPIOX_2 */ - "CON1-P11", /* GPIOX_3 */ - "CON1-P13", /* GPIOX_4 */ - "CON1-P07", /* GPIOX_5 */ - "CON1-P33", /* GPIOX_6 */ - "CON1-P15", /* GPIOX_7 */ - "CON1-P19", /* GPIOX_8 */ - "CON1-P21", /* GPIOX_9 */ - "CON1-P24", /* GPIOX_10 */ - "CON1-P23", /* GPIOX_11 */ - "CON1-P08", /* GPIOX_12 */ - "CON1-P10", /* GPIOX_13 */ - "CON1-P29", /* GPIOX_14 */ - "CON1-P31", /* GPIOX_15 */ - "CON1-P26", /* GPIOX_16 */ - "CON1-P03", /* GPIOX_17 */ - "CON1-P05", /* GPIOX_18 */ - "CON1-P32"; /* GPIOX_19 */ - - /* - * WARNING: The USB Hub on the BPI-M5 needs a reset signal - * to be turned high in order to be detected by the USB Controller - * This signal should be handled by a USB specific power sequence - * in order to reset the Hub when USB bus is powered down. - */ - usb-hub { - gpio-hog; - gpios = ; - output-high; - line-name = "usb-hub-reset"; - }; -}; - -&gpio_ao { - gpio-line-names = - /* GPIOAO */ - "DEBUG TX", /* GPIOAO_0 */ - "DEBUG RX", /* GPIOAO_1 */ - "SYS_LED2", /* GPIOAO_2 */ - "UPDATE_KEY", /* GPIOAO_3 */ - "CON1-P40", /* GPIOAO_4 */ - "IR_IN", /* GPIOAO_5 */ - "TF_3V3N_1V8_EN", /* GPIOAO_6 */ - "CON1-P35", /* GPIOAO_7 */ - "CON1-P12", /* GPIOAO_8 */ - "CON1-P37", /* GPIOAO_9 */ - "CON1-P38", /* GPIOAO_10 */ - "SYS_LED", /* GPIOAO_11 */ - /* GPIOE */ - "VDDEE_PWM", /* GPIOE_0 */ - "VDDCPU_PWM", /* GPIOE_1 */ - "TF_PWR_EN"; /* GPIOE_2 */ -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; - pinctrl-names = "default"; - hdmi-supply = <&dc_in>; -}; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; - -&ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; - pinctrl-names = "default"; -}; - -&pwm_AO_cd { - pinctrl-0 = <&pwm_ao_d_e_pins>; - pinctrl-names = "default"; - clocks = <&xtal>; - clock-names = "clkin1"; - status = "okay"; -}; - -&saradc { - status = "okay"; - vref-supply = <&vddao_1v8>; -}; - -/* SD card */ -&sd_emmc_b { - status = "okay"; - pinctrl-0 = <&sdcard_c_pins>; - pinctrl-1 = <&sdcard_clk_gate_c_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <4>; - cap-sd-highspeed; - max-frequency = <50000000>; - disable-wp; - - /* TOFIX: SD card is barely usable in SDR modes */ - - cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; - vmmc-supply = <&tflash_vdd>; - vqmmc-supply = <&vddio_c>; -}; - -/* eMMC */ -&sd_emmc_c { - status = "okay"; - pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; - pinctrl-1 = <&emmc_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <8>; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - max-frequency = <200000000>; - disable-wp; - - mmc-pwrseq = <&emmc_pwrseq>; - vmmc-supply = <&vddao_3v3>; - vqmmc-supply = <&emmc_1v8>; -}; - &tdmif_b { status = "okay"; }; @@ -625,22 +219,3 @@ &toddr_c { status = "okay"; }; - -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; -}; - -&usb { - status = "okay"; -}; - -&usb2_phy0 { - phy-supply = <&dc_in>; -}; - -&usb2_phy1 { - /* Enable the hub which is connected to this port */ - phy-supply = <&vl_pwr_en>; -}; diff --git a/arch/arm/dts/meson-sm1-bananapi.dtsi b/arch/arm/dts/meson-sm1-bananapi.dtsi new file mode 100644 index 0000000000..17045ff81c --- /dev/null +++ b/arch/arm/dts/meson-sm1-bananapi.dtsi @@ -0,0 +1,435 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 BayLibre SAS + * Author: Neil Armstrong + */ + +#include "meson-sm1.dtsi" +#include +#include +#include + +/ { + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 2>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-sw3 { + label = "SW3"; + linux,code = ; + press-threshold-microvolt = <1700000>; + }; + }; + + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key { + label = "SW1"; + linux,code = ; + gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio_intc>; + interrupts = <3 IRQ_TYPE_EDGE_BOTH>; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-green { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; + }; + + led-blue { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + emmc_1v8: regulator-emmc_1v8 { + compatible = "regulator-fixed"; + regulator-name = "EMMC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + dc_in: regulator-dc_in { + compatible = "regulator-fixed"; + regulator-name = "DC_IN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + vddio_c: regulator-vddio_c { + compatible = "regulator-gpio"; + regulator-name = "VDDIO_C"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + enable-gpios = <&gpio_ao GPIOE_2 GPIO_OPEN_DRAIN>; + enable-active-high; + regulator-always-on; + + gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_DRAIN>; + gpios-states = <1>; + + states = <1800000 0>, + <3300000 1>; + }; + + tflash_vdd: regulator-tflash_vdd { + compatible = "regulator-fixed"; + regulator-name = "TFLASH_VDD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_in>; + gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; + enable-active-high; + regulator-always-on; + }; + + vddao_1v8: regulator-vddao_1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_in>; + regulator-always-on; + }; + + vddcpu: regulator-vddcpu { + /* + * SY8120B1ABC DC/DC Regulator. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDCPU"; + regulator-min-microvolt = <690000>; + regulator-max-microvolt = <1050000>; + + pwm-supply = <&dc_in>; + + pwms = <&pwm_AO_cd 1 1250 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; + + /* USB Hub Power Enable */ + vl_pwr_en: regulator-vl_pwr_en { + compatible = "regulator-fixed"; + regulator-name = "VL_PWR_EN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_in>; + + gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&arb { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vddcpu>; + operating-points-v2 = <&cpu_opp_table>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu1 { + cpu-supply = <&vddcpu>; + operating-points-v2 = <&cpu_opp_table>; + clocks = <&clkc CLKID_CPU1_CLK>; + clock-latency = <50000>; +}; + +&cpu2 { + cpu-supply = <&vddcpu>; + operating-points-v2 = <&cpu_opp_table>; + clocks = <&clkc CLKID_CPU2_CLK>; + clock-latency = <50000>; +}; + +&cpu3 { + cpu-supply = <&vddcpu>; + operating-points-v2 = <&cpu_opp_table>; + clocks = <&clkc CLKID_CPU3_CLK>; + clock-latency = <50000>; +}; + +&ext_mdio { + external_phy: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + max-speed = <1000>; + + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_14 */ + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +ðmac { + pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; + pinctrl-names = "default"; + status = "okay"; + phy-mode = "rgmii-txid"; + phy-handle = <&external_phy>; +}; + +&gpio { + gpio-line-names = + /* GPIOZ */ + "ETH_MDIO", /* GPIOZ_0 */ + "ETH_MDC", /* GPIOZ_1 */ + "ETH_RXCLK", /* GPIOZ_2 */ + "ETH_RX_DV", /* GPIOZ_3 */ + "ETH_RXD0", /* GPIOZ_4 */ + "ETH_RXD1", /* GPIOZ_5 */ + "ETH_RXD2", /* GPIOZ_6 */ + "ETH_RXD3", /* GPIOZ_7 */ + "ETH_TXCLK", /* GPIOZ_8 */ + "ETH_TXEN", /* GPIOZ_9 */ + "ETH_TXD0", /* GPIOZ_10 */ + "ETH_TXD1", /* GPIOZ_11 */ + "ETH_TXD2", /* GPIOZ_12 */ + "ETH_TXD3", /* GPIOZ_13 */ + "ETH_INTR", /* GPIOZ_14 */ + "ETH_NRST", /* GPIOZ_15 */ + /* GPIOH */ + "HDMI_SDA", /* GPIOH_0 */ + "HDMI_SCL", /* GPIOH_1 */ + "HDMI_HPD", /* GPIOH_2 */ + "HDMI_CEC", /* GPIOH_3 */ + "VL-RST_N", /* GPIOH_4 */ + "CON1-P36", /* GPIOH_5 */ + "VL-PWREN", /* GPIOH_6 */ + "WiFi_3V3_1V8", /* GPIOH_7 */ + "TFLASH_VDD_EN", /* GPIOH_8 */ + /* BOOT */ + "eMMC_D0", /* BOOT_0 */ + "eMMC_D1", /* BOOT_1 */ + "eMMC_D2", /* BOOT_2 */ + "eMMC_D3", /* BOOT_3 */ + "eMMC_D4", /* BOOT_4 */ + "eMMC_D5", /* BOOT_5 */ + "eMMC_D6", /* BOOT_6 */ + "eMMC_D7", /* BOOT_7 */ + "eMMC_CLK", /* BOOT_8 */ + "", + "eMMC_CMD", /* BOOT_10 */ + "", + "eMMC_RST#", /* BOOT_12 */ + "eMMC_DS", /* BOOT_13 */ + "", "", + /* GPIOC */ + "SD_D0_B", /* GPIOC_0 */ + "SD_D1_B", /* GPIOC_1 */ + "SD_D2_B", /* GPIOC_2 */ + "SD_D3_B", /* GPIOC_3 */ + "SD_CLK_B", /* GPIOC_4 */ + "SD_CMD_B", /* GPIOC_5 */ + "CARD_EN_DET", /* GPIOC_6 */ + "", + /* GPIOA */ + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", + "CON1-P27", /* GPIOA_14 */ + "CON1-P28", /* GPIOA_15 */ + /* GPIOX */ + "CON1-P16", /* GPIOX_0 */ + "CON1-P18", /* GPIOX_1 */ + "CON1-P22", /* GPIOX_2 */ + "CON1-P11", /* GPIOX_3 */ + "CON1-P13", /* GPIOX_4 */ + "CON1-P07", /* GPIOX_5 */ + "CON1-P33", /* GPIOX_6 */ + "CON1-P15", /* GPIOX_7 */ + "CON1-P19", /* GPIOX_8 */ + "CON1-P21", /* GPIOX_9 */ + "CON1-P24", /* GPIOX_10 */ + "CON1-P23", /* GPIOX_11 */ + "CON1-P08", /* GPIOX_12 */ + "CON1-P10", /* GPIOX_13 */ + "CON1-P29", /* GPIOX_14 */ + "CON1-P31", /* GPIOX_15 */ + "CON1-P26", /* GPIOX_16 */ + "CON1-P03", /* GPIOX_17 */ + "CON1-P05", /* GPIOX_18 */ + "CON1-P32"; /* GPIOX_19 */ + + /* + * WARNING: The USB Hub needs a reset signal to be turned high in + * order to be detected by the USB Controller. This signal should + * be handled by a USB specific power sequence to reset the Hub + * when the USB bus is powered down. + */ + usb-hub-hog { + gpio-hog; + gpios = ; + output-high; + line-name = "usb-hub-reset"; + }; +}; + +&gpio_ao { + gpio-line-names = + /* GPIOAO */ + "DEBUG TX", /* GPIOAO_0 */ + "DEBUG RX", /* GPIOAO_1 */ + "SYS_LED2", /* GPIOAO_2 */ + "UPDATE_KEY", /* GPIOAO_3 */ + "CON1-P40", /* GPIOAO_4 */ + "IR_IN", /* GPIOAO_5 */ + "TF_3V3N_1V8_EN", /* GPIOAO_6 */ + "CON1-P35", /* GPIOAO_7 */ + "CON1-P12", /* GPIOAO_8 */ + "CON1-P37", /* GPIOAO_9 */ + "CON1-P38", /* GPIOAO_10 */ + "SYS_LED", /* GPIOAO_11 */ + /* GPIOE */ + "VDDEE_PWM", /* GPIOE_0 */ + "VDDCPU_PWM", /* GPIOE_1 */ + "TF_PWR_EN"; /* GPIOE_2 */ +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; + hdmi-supply = <&dc_in>; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_AO_cd { + pinctrl-0 = <&pwm_ao_d_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin1"; + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddao_1v8>; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_c_pins>; + pinctrl-1 = <&sdcard_clk_gate_c_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + /* TOFIX: SD card is barely usable in SDR modes */ + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&tflash_vdd>; + vqmmc-supply = <&vddio_c>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + max-frequency = <200000000>; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&emmc_1v8>; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb { + status = "okay"; +}; + +&usb2_phy0 { + phy-supply = <&dc_in>; +}; + +&usb2_phy1 { + /* Enable the hub which is connected to this port */ + phy-supply = <&vl_pwr_en>; +}; From patchwork Thu Mar 23 06:54:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Hewitt X-Patchwork-Id: 13185114 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1628C6FD1D for ; Thu, 23 Mar 2023 06:55:26 +0000 (UTC) DKIM-Signature: v=1; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:06 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 03/13] boards: add BananaPi M2-Pro defconfig Date: Thu, 23 Mar 2023 06:54:48 +0000 Message-Id: <20230323065458.776029-4-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235511_628558_59517701 X-CRM114-Status: UNSURE ( 9.70 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add configuration for the BananaPi M2-Pro board. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- configs/bananapi-m2-pro_defconfig | 76 +++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 configs/bananapi-m2-pro_defconfig diff --git a/configs/bananapi-m2-pro_defconfig b/configs/bananapi-m2-pro_defconfig new file mode 100644 index 0000000000..28b603fe20 --- /dev/null +++ b/configs/bananapi-m2-pro_defconfig @@ -0,0 +1,76 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m2-pro" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING="bpi-m2-pro" +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 +CONFIG_REMAKE_ELF=y +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y From patchwork Thu Mar 23 06:54:49 2023 Content-Type: text/plain; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:07 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 04/13] docs: boards: amlogic: add documentation for BananaPi M2-Pro Date: Thu, 23 Mar 2023 06:54:49 +0000 Message-Id: <20230323065458.776029-5-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235512_133246_6676703B X-CRM114-Status: GOOD ( 14.36 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add build docs for the BPI-M2-PRO board. Signed-off-by: Christian Hewitt --- board/amlogic/u200/MAINTAINERS | 2 + doc/board/amlogic/bananapi-m2pro.rst | 142 +++++++++++++++++++++++++++ doc/board/amlogic/index.rst | 1 + 3 files changed, 145 insertions(+) create mode 100644 doc/board/amlogic/bananapi-m2pro.rst diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS index 919e349922..f429c212ba 100644 --- a/board/amlogic/u200/MAINTAINERS +++ b/board/amlogic/u200/MAINTAINERS @@ -4,8 +4,10 @@ S: Maintained L: u-boot-amlogic@groups.io F: board/amlogic/u200/ F: configs/u200_defconfig +F: configs/bananapi-m2pro_defconfig F: configs/bananapi-m5_defconfig F: configs/radxa-zero_defconfig F: doc/board/amlogic/u200.rst +F: doc/board/amlogic/bananapi-m2pro.rst F: doc/board/amlogic/bananapi-m5.rst F: doc/board/amlogic/radxa-zero.rst diff --git a/doc/board/amlogic/bananapi-m2pro.rst b/doc/board/amlogic/bananapi-m2pro.rst new file mode 100644 index 0000000000..6c2974f323 --- /dev/null +++ b/doc/board/amlogic/bananapi-m2pro.rst @@ -0,0 +1,142 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for BananaPi BPI-M2-PRO (S905X3) +======================================= + +BananaPi BPI-M2-PRO is a Single Board Computer manufactured by Sinovoip with the +following specification: + + - Amlogic S905X3 Arm Cortex-A55 quad-core SoC + - 2GB DDR4 SDRAM + - 16GB eMMC + - Gigabit Ethernet + - RTL8821CU USB WiFi (a/b/g/n/ac) + BT 5.0 + - HDMI 2.1 display + - 40-pin GPIO header + - 2x USB 3.0 Host + - 1x DC Jack (power) + - microSD + - UART serial + - Infrared receiver + +Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M2_Pro + +U-Boot Compilation +------------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-none-elf- + $ make bananapi-m2pro_defconfig + $ make + +U-Boot Signing with Pre-Built FIP repo +-------------------------------------- + +.. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 + $ cd amlogic-boot-fip + $ mkdir my-output-dir + $ ./build-fip.sh bananapi-m2pro /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +--------------------- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + + $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + + $ DIR=bananapi-m2pro + $ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b odroidg12-v2015.01-c4-m5 $DIR + + $ cd $DIR + $ make bananapi_m2pro_defconfig + $ make + $ export UBOOTDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + + $ mkdir fip + + $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh + $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/ + $ cp $UBOOTDIR/build/board/bananapi/bananpi_m5/firmware/acs.bin fip/ + $ cp $UBOOTDIR/fip/g12a/bl2.bin fip/ + $ cp $UBOOTDIR/fip/g12a/bl30.bin fip/ + $ cp $UBOOTDIR/fip/g12a/bl31.img fip/ + $ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/ + $ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/ + $ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/ + $ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/ + $ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/ + $ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/ + $ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/ + $ cp $UBOOTDIR/fip/g12a/piei.fw fip/ + $ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/ + $ cp u-boot.bin fip/bl33.bin + + $ sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + $ sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 + $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \ + --output fip/bl30_new.bin.enc \ + --level v3 --type bl30 + $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \ + --output fip/bl31.img.enc \ + --level v3 --type bl31 + $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \ + --output fip/bl33.bin.enc \ + --level v3 --type bl33 --compress lz4 + $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \ + --output fip/bl2.n.bin.sig + $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc \ + --ddrfw1 fip/ddr4_1d.fw \ + --ddrfw2 fip/ddr4_2d.fw \ + --ddrfw3 fip/ddr3_1d.fw \ + --ddrfw4 fip/piei.fw \ + --ddrfw5 fip/lpddr4_1d.fw \ + --ddrfw6 fip/lpddr4_2d.fw \ + --ddrfw7 fip/diag_lpddr4.fw \ + --ddrfw8 fip/aml_ddr.fw \ + --ddrfw9 fip/lpddr3_1d.fw \ + --level v3 + +Then write the image to SD or eMMC with: + +.. code-block:: bash + + $ DEV=/dev/boot_device + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440 diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index 9b76bca427..8388acdd11 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -86,6 +86,7 @@ Board Documentation :maxdepth: 1 bananapi-cm4io + bananapi-m2pro bananapi-m5 beelink-gskingx beelink-gtking From patchwork Thu Mar 23 06:54:50 2023 Content-Type: text/plain; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:09 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 05/13] ARM: dts: add support for BananaPi M2S Date: Thu, 23 Mar 2023 06:54:50 +0000 Message-Id: <20230323065458.776029-6-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235515_363372_72CDD5CE X-CRM114-Status: GOOD ( 16.17 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Import the device-tree from linux-amlogic/for-next (Linux 6.4-rc1) and omit the NPU node from the A311D board variant dts as this is not supported under U-Boot. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- arch/arm/dts/Makefile | 1 + .../arm/dts/meson-g12b-a311d-bananapi-m2s.dts | 33 ++ arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi | 7 + arch/arm/dts/meson-g12b-bananapi.dtsi | 521 ++++++++++++++++++ .../arm/dts/meson-g12b-s922x-bananapi-m2s.dts | 14 + 5 files changed, 576 insertions(+) create mode 100644 arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts create mode 100644 arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi create mode 100644 arch/arm/dts/meson-g12b-bananapi.dtsi create mode 100644 arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d6139429e5..eb20524a99 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -204,6 +204,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-g12a-radxa-zero.dtb \ meson-g12a-sei510.dtb \ meson-g12a-u200.dtb \ + meson-g12b-a311d-bananapi-m2s.dtb \ meson-g12b-a311d-khadas-vim3.dtb \ meson-g12b-bananapi-cm4-cm4io.dtb \ meson-g12b-gsking-x.dtb \ diff --git a/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts b/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts new file mode 100644 index 0000000000..31365316b2 --- /dev/null +++ b/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Christian Hewitt + */ + +/dts-v1/; + +#include "meson-g12b-a311d.dtsi" +#include "meson-g12b-bananapi.dtsi" + +/ { + compatible = "bananapi,bpi-m2s", "amlogic,a311d", "amlogic,g12b"; + model = "BananaPi M2S"; + + aliases { + i2c0 = &i2c1; + i2c1 = &i2c3; + }; +}; + +/* Camera (CSI) bus */ +&i2c1 { + status = "okay"; + pinctrl-0 = <&i2c1_sda_h6_pins>, <&i2c1_sck_h7_pins>; + pinctrl-names = "default"; +}; + +/* Display (DSI) bus */ +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; + pinctrl-names = "default"; +}; diff --git a/arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi b/arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi new file mode 100644 index 0000000000..236f2468dc --- /dev/null +++ b/arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Neil Armstrong + */ + +#include "meson-g12-common-u-boot.dtsi" diff --git a/arch/arm/dts/meson-g12b-bananapi.dtsi b/arch/arm/dts/meson-g12b-bananapi.dtsi new file mode 100644 index 0000000000..83709787eb --- /dev/null +++ b/arch/arm/dts/meson-g12b-bananapi.dtsi @@ -0,0 +1,521 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong + * Copyright (c) 2023 Christian Hewitt + */ + +#include +#include +#include +#include + +/ { + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; + rtc1 = &vrtc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 4 GiB */ + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 2>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1710000>; + + button-function { + label = "RST"; + linux,code = ; + press-threshold-microvolt = <10000>; + }; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; + }; + + fan0: pwm-fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <3>; + cooling-levels = <0 120 170 220>; + pwms = <&pwm_cd 1 40000 0>; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + + led-1 { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; + + dc_in: regulator-dc-in { + compatible = "regulator-fixed"; + regulator-name = "DC_IN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + vcc_5v: regulator-vcc-5v { + compatible = "regulator-fixed"; + regulator-name = "VCC_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_in>; + + gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; + enable-active-high; + }; + + vcc_3v3: regulator-vcc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vsys_3v3>; + regulator-always-on; + }; + + vcc_1v8: regulator-vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-always-on; + }; + + vddao_1v8: regulator-vddao-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vsys_3v3>; + regulator-always-on; + }; + + vddcpu_a: regulator-vddcpu-a { + compatible = "pwm-regulator"; + regulator-name = "VDDCPU_A"; + regulator-min-microvolt = <690000>; + regulator-max-microvolt = <1050000>; + pwm-supply = <&dc_in>; + pwms = <&pwm_ab 0 1250 0>; + pwm-dutycycle-range = <100 0>; + regulator-boot-on; + regulator-always-on; + }; + + vddcpu_b: regulator-vddcpu-b { + compatible = "pwm-regulator"; + regulator-name = "VDDCPU_B"; + regulator-min-microvolt = <690000>; + regulator-max-microvolt = <1050000>; + pwm-supply = <&vsys_3v3>; + pwms = <&pwm_AO_cd 1 1250 0>; + pwm-dutycycle-range = <100 0>; + regulator-boot-on; + regulator-always-on; + }; + + vsys_3v3: regulator-vsys-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VSYS_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_in>; + regulator-always-on; + }; + + emmc_1v8: regulator-emmc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "EMMC_AO1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-always-on; + }; + + usb_pwr: regulator-usb-pwr { + compatible = "regulator-fixed"; + regulator-name = "USB_PWR"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_5v>; + + gpio = <&gpio GPIOA_6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "BPI-M2S"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + + dai-link-0 { + sound-dai = <&frddr_a>; + }; + + dai-link-1 { + sound-dai = <&frddr_b>; + }; + + dai-link-2 { + sound-dai = <&frddr_c>; + }; + + /* 8ch hdmi interface */ + dai-link-3 { + sound-dai = <&tdmif_b>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + dai-tdm-slot-tx-mask-1 = <1 1>; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + + codec { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; + }; + }; + + /* hdmi glue */ + dai-link-4 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { + sound-dai = <&hdmi_tx>; + }; + }; + }; +}; + +&arb { + status = "okay"; +}; + +&clkc_audio { + status = "okay"; +}; + +&cecb_AO { + pinctrl-0 = <&cec_ao_b_h_pins>; + pinctrl-names = "default"; + status = "okay"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cpu0 { + cpu-supply = <&vddcpu_b>; + operating-points-v2 = <&cpu_opp_table_0>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu1 { + cpu-supply = <&vddcpu_b>; + operating-points-v2 = <&cpu_opp_table_0>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu100 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu101 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu102 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu103 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +ðmac { + pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; + pinctrl-names = "default"; + status = "okay"; + phy-mode = "rgmii"; + phy-handle = <&external_phy>; + amlogic,tx-delay-ns = <2>; +}; + +&ext_mdio { + external_phy: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + max-speed = <1000>; + + reset-assert-us = <10000>; + reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_14 */ + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&frddr_a { + status = "okay"; +}; + +&frddr_b { + status = "okay"; +}; + +&frddr_c { + status = "okay"; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; + hdmi-supply = <&vcc_5v>; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +/* Main i2c bus */ +&i2c2 { + status = "okay"; + pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2_sck_x_pins>; + pinctrl-names = "default"; +}; + +&pcie { + status = "okay"; + reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>; +}; + +&pwm_ab { + status = "okay"; + pinctrl-0 = <&pwm_a_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; +}; + +&pwm_cd { + status = "okay"; + pinctrl-0 = <&pwm_d_x6_pins>; + pinctrl-names = "default"; + pwm-gpios = <&gpio GPIOAO_10 GPIO_ACTIVE_HIGH>; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; +}; + +&pwm_AO_cd { + pinctrl-0 = <&pwm_ao_d_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin1"; + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddao_1v8>; +}; + +/* SDIO */ +&sd_emmc_a { + /* enable if WiFi/BT board connected */ + status = "disabled"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + sd-uhs-sdr104; + max-frequency = <50000000>; + + non-removable; + disable-wp; + + /* WiFi firmware requires power in suspend */ + keep-power-in-suspend; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vsys_3v3>; + vqmmc-supply = <&vddao_1v8>; + + rtl8822cs: wifi@1 { + reg = <1>; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_c_pins>; + pinctrl-1 = <&sdcard_clk_gate_c_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&vsys_3v3>; + vqmmc-supply = <&vsys_3v3>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + max-frequency = <200000000>; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&emmc_1v8>; +}; + +&tdmif_b { + status = "okay"; +}; + +&tdmout_b { + status = "okay"; +}; + +&tohdmitx { + status = "okay"; +}; + +&uart_A { + /* enable if WiFi/BT board connected */ + status = "disabled"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "realtek,rtl8822cs-bt"; + enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>; + device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb2_phy0 { + phy-supply = <&dc_in>; +}; + +&usb2_phy1 { + phy-supply = <&usb_pwr>; +}; + +&usb3_pcie_phy { + phy-supply = <&usb_pwr>; +}; + +&usb { + status = "okay"; + dr_mode = "peripheral"; + phys = <&usb2_phy0>, <&usb2_phy1>; + phy-names = "usb2-phy0", "usb2-phy1"; +}; diff --git a/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts b/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts new file mode 100644 index 0000000000..7f66f263a2 --- /dev/null +++ b/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Christian Hewitt + */ + +/dts-v1/; + +#include "meson-g12b-s922x.dtsi" +#include "meson-g12b-bananapi.dtsi" + +/ { + compatible = "bananapi,bpi-m2s", "amlogic,s922x", "amlogic,g12b"; + model = "BananaPi M2S"; +}; From patchwork Thu Mar 23 06:54:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Hewitt X-Patchwork-Id: 13185125 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E1B2C7619A for ; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:11 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 06/13] boards: add BananaPi M2S defconfig Date: Thu, 23 Mar 2023 06:54:51 +0000 Message-Id: <20230323065458.776029-7-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235516_847935_BCD9F93A X-CRM114-Status: UNSURE ( 9.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add configuration for the Bananapi BPI-M2S. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- configs/bananapi-m2s_defconfig | 82 ++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 configs/bananapi-m2s_defconfig diff --git a/configs/bananapi-m2s_defconfig b/configs/bananapi-m2s_defconfig new file mode 100644 index 0000000000..3109e0ce48 --- /dev/null +++ b/configs/bananapi-m2s_defconfig @@ -0,0 +1,82 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-bananapi-m2s" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" bpi-m2s" +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 +CONFIG_REMAKE_ELF=y +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y +CONFIG_AHCI_PCI=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_PCI=y +CONFIG_PCIE_DW_MESON=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y From patchwork Thu Mar 23 06:54:52 2023 Content-Type: text/plain; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:12 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 07/13] docs: boards: amlogic: add documentation for BananaPi M2S Date: Thu, 23 Mar 2023 06:54:52 +0000 Message-Id: <20230323065458.776029-8-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235514_104910_500FEF23 X-CRM114-Status: GOOD ( 15.03 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add build docs for the BPI-M2S board. Signed-off-by: Christian Hewitt --- board/amlogic/w400/MAINTAINERS | 2 + doc/board/amlogic/bananapi-m2s.rst | 152 +++++++++++++++++++++++++++++ doc/board/amlogic/index.rst | 1 + 3 files changed, 155 insertions(+) create mode 100644 doc/board/amlogic/bananapi-m2s.rst diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS index 26a4c2c587..042b523056 100644 --- a/board/amlogic/w400/MAINTAINERS +++ b/board/amlogic/w400/MAINTAINERS @@ -4,5 +4,7 @@ S: Maintained L: u-boot-amlogic@groups.io F: board/amlogic/w400/ F: configs/bananapi-cm4-cm4io_defconfig +F: configs/bananapi-m2s_defconfig F: doc/board/amlogic/w400.rst F: doc/board/amlogic/bananapi-cm4io.rst +F: doc/board/amlogic/bananapi-m2s.rst diff --git a/doc/board/amlogic/bananapi-m2s.rst b/doc/board/amlogic/bananapi-m2s.rst new file mode 100644 index 0000000000..265df1aea7 --- /dev/null +++ b/doc/board/amlogic/bananapi-m2s.rst @@ -0,0 +1,152 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for BananaPi M2S (A311D & S922X) +======================================= + +BananaPi BPI-M2S ships is a Single Board Computer manufactured by Sinovoip that ships in +two variants with Amlogic S922X or A311D SoC and the following common specification: + +- 16GB eMMC +- HDMI 2.1a video +- 2x 10/100/1000 Base-T Ethernet (1x RTL8211F, 1x RTL811H) +- 2x USB 2.0 ports +- 2x Status LED's (green/blue) +- 1x Power/Reset button +- 1x micro SD card slot +- 40-pin GPIO header +- PWM fan header +- UART header + +The S992X variant has: +- 2GB LPDDR4 RAM + +The A311D variant has: + +- 4GB LPDDR4 RAM +- NPU (5.0 TOPS) +- MIPI DSI header +- MIPI CSI header + +An optional RTL8822CS SDIO WiFi/BT mezzanine is available for both board variants. + +Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M2S + +U-Boot Compilation +------------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-none-elf- + $ make bananapi-m2s_defconfig + $ make + +U-Boot Signing with Pre-Built FIP repo +-------------------------------------- + +.. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 + $ cd amlogic-boot-fip + $ mkdir my-output-dir + $ ./build-fip.sh bananapi-m2s /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +--------------------- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + + $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + + $ DIR=bananapi-m2s + $ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b khadas-g12b-v2015.01-m2s $DIR + + $ cd $DIR + $ make bananapi_m2s_defconfig + $ make + $ export UBDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + + $ mkdir fip + + $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh + $ cp $UBDIR/build/scp_task/bl301.bin fip/ + $ cp $UBDIR/build/board/bananapi/bananpi_m2s/firmware/acs.bin fip/ + $ cp $UBDIR/fip/g12a/bl2.bin fip/ + $ cp $UBDIR/fip/g12a/bl30.bin fip/ + $ cp $UBDIR/fip/g12a/bl31.img fip/ + $ cp $UBDIR/fip/g12a/ddr3_1d.fw fip/ + $ cp $UBDIR/fip/g12a/ddr4_1d.fw fip/ + $ cp $UBDIR/fip/g12a/ddr4_2d.fw fip/ + $ cp $UBDIR/fip/g12a/diag_lpddr4.fw fip/ + $ cp $UBDIR/fip/g12a/lpddr3_1d.fw fip/ + $ cp $UBDIR/fip/g12a/lpddr4_1d.fw fip/ + $ cp $UBDIR/fip/g12a/lpddr4_2d.fw fip/ + $ cp $UBDIR/fip/g12a/piei.fw fip/ + $ cp $UBDIR/fip/g12a/aml_ddr.fw fip/ + $ cp u-boot.bin fip/bl33.bin + + $ sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + $ sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 + $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \ + --output fip/bl30_new.bin.enc \ + --level v3 --type bl30 + $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \ + --output fip/bl31.img.enc \ + --level v3 --type bl31 + $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \ + --output fip/bl33.bin.enc \ + --level v3 --type bl33 --compress lz4 + $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \ + --output fip/bl2.n.bin.sig + $ $UBDIR/fip/g12b/aml_encrypt_g12b --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc \ + --ddrfw1 fip/ddr4_1d.fw \ + --ddrfw2 fip/ddr4_2d.fw \ + --ddrfw3 fip/ddr3_1d.fw \ + --ddrfw4 fip/piei.fw \ + --ddrfw5 fip/lpddr4_1d.fw \ + --ddrfw6 fip/lpddr4_2d.fw \ + --ddrfw7 fip/diag_lpddr4.fw \ + --ddrfw8 fip/aml_ddr.fw \ + --ddrfw9 fip/lpddr3_1d.fw \ + --level v3 + +Then write the image to SD or eMMC with: + +.. code-block:: bash + + $ DEV=/dev/boot_device + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440 diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index 8388acdd11..fa1b362731 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -87,6 +87,7 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:14 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 08/13] ARM: dts: add support for Radxa Zero2 Date: Thu, 23 Mar 2023 06:54:53 +0000 Message-Id: <20230323065458.776029-9-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235518_272989_892F918B X-CRM114-Status: GOOD ( 14.95 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Import the device-tree from linux-amlogic/for-next (Linux 6.4-rc1) to support the Radxa-Zero2 board. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- arch/arm/dts/Makefile | 1 + .../dts/meson-g12b-radxa-zero2-u-boot.dtsi | 7 + arch/arm/dts/meson-g12b-radxa-zero2.dts | 489 ++++++++++++++++++ 3 files changed, 497 insertions(+) create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index eb20524a99..42da335bb5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -214,6 +214,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-g12b-odroid-n2.dtb \ meson-g12b-odroid-n2l.dtb \ meson-g12b-odroid-n2-plus.dtb \ + meson-g12b-radxa-zero2.dtb \ meson-sm1-bananapi-m2-pro.dtb \ meson-sm1-bananapi-m5.dtb \ meson-sm1-khadas-vim3l.dtb \ diff --git a/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi new file mode 100644 index 0000000000..236f2468dc --- /dev/null +++ b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Neil Armstrong + */ + +#include "meson-g12-common-u-boot.dtsi" diff --git a/arch/arm/dts/meson-g12b-radxa-zero2.dts b/arch/arm/dts/meson-g12b-radxa-zero2.dts new file mode 100644 index 0000000000..890f5bfebb --- /dev/null +++ b/arch/arm/dts/meson-g12b-radxa-zero2.dts @@ -0,0 +1,489 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong + * Copyright (c) 2019 Christian Hewitt + * Copyright (c) 2022 Radxa Limited + * Author: Yuntian Zhang + */ + +/dts-v1/; + +#include "meson-g12b-a311d.dtsi" +#include +#include +#include +#include + +/ { + compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b"; + model = "Radxa Zero2"; + + aliases { + serial0 = &uart_AO; + serial2 = &uart_A; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + poll-interval = <100>; + power-button { + label = "power"; + linux,code = ; + gpios = <&gpio_ao GPIOAO_3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-green { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio GPIOA_12 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + ao_5v: regulator-ao-5v { + compatible = "regulator-fixed"; + regulator-name = "AO_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + vcc_1v8: regulator-vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-always-on; + }; + + vcc_3v3: regulator-vcc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + /* FIXME: actually controlled by VDDCPU_B_EN */ + }; + + vddao_1v8: regulator-vddao-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + vddao_3v3: regulator-vddao-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&ao_5v>; + regulator-always-on; + }; + + vddcpu_a: regulator-vddcpu-a { + /* + * MP8756GD Regulator. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDCPU_A"; + regulator-min-microvolt = <730000>; + regulator-max-microvolt = <1022000>; + + pwm-supply = <&ao_5v>; + + pwms = <&pwm_ab 0 1250 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; + + vddcpu_b: regulator-vddcpu-b { + /* + * Silergy SY8120B1ABC Regulator. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDCPU_B"; + regulator-min-microvolt = <730000>; + regulator-max-microvolt = <1022000>; + + pwm-supply = <&ao_5v>; + + pwms = <&pwm_AO_cd 1 1250 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "RADXA-ZERO2"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + + dai-link-0 { + sound-dai = <&frddr_a>; + }; + + dai-link-1 { + sound-dai = <&frddr_b>; + }; + + dai-link-2 { + sound-dai = <&frddr_c>; + }; + + /* 8ch hdmi interface */ + dai-link-3 { + sound-dai = <&tdmif_b>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + dai-tdm-slot-tx-mask-1 = <1 1>; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + + codec { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; + }; + }; + + /* hdmi glue */ + dai-link-4 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { + sound-dai = <&hdmi_tx>; + }; + }; + }; + + wifi32k: clock-0 { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; +}; + +&arb { + status = "okay"; +}; + +&cec_AO { + pinctrl-0 = <&cec_ao_a_h_pins>; + pinctrl-names = "default"; + status = "disabled"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cecb_AO { + pinctrl-0 = <&cec_ao_b_h_pins>; + pinctrl-names = "default"; + status = "okay"; + hdmi-phandle = <&hdmi_tx>; +}; + +&clkc_audio { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vddcpu_b>; + operating-points-v2 = <&cpu_opp_table_0>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu1 { + cpu-supply = <&vddcpu_b>; + operating-points-v2 = <&cpu_opp_table_0>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu100 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu101 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu102 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu103 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&frddr_a { + status = "okay"; +}; + +&frddr_b { + status = "okay"; +}; + +&frddr_c { + status = "okay"; +}; + +&gpio { + gpio-line-names = + /* GPIOZ */ + "PIN_27", "PIN_28", "PIN_7", "PIN_11", "PIN_13", "PIN_15", "PIN_18", "PIN_40", + "", "", "", "", "", "", "", "", + /* GPIOH */ + "", "", "", "", "PIN_19", "PIN_21", "PIN_24", "PIN_23", + "", + /* BOOT */ + "", "", "", "", "", "", "", "", + "", "", "", "", "EMMC_PWRSEQ", "", "", "", + /* GPIOC */ + "", "", "", "", "", "", "SD_CD", "PIN_36", + /* GPIOA */ + "PIN_32", "PIN_12", "PIN_35", "", "", "PIN_38", "", "", + "", "", "", "", "LED_GREEN", "PIN_31", "PIN_3", "PIN_5", + /* GPIOX */ + "", "", "", "", "", "", "SDIO_PWRSEQ", "", + "", "", "", "", "", "", "", "", + "", "BT_SHUTDOWN", "", ""; +}; + +&gpio_ao { + gpio-line-names = + /* GPIOAO */ + "PIN_8", "PIN_10", "", "BTN_POWER", "", "", "", "PIN_29", + "PIN_33", "PIN_37", "FAN", "", + /* GPIOE */ + "", "", ""; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; + hdmi-supply = <&ao_5v>; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&ir { + status = "disabled"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_ab { + pinctrl-0 = <&pwm_a_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; + status = "okay"; +}; + +&pwm_ef { + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; + status = "okay"; +}; + +&pwm_AO_ab { + pinctrl-0 = <&pwm_ao_a_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; + status = "okay"; +}; + +&pwm_AO_cd { + pinctrl-0 = <&pwm_ao_d_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin1"; + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddao_1v8>; +}; + +/* SDIO */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + + non-removable; + disable-wp; + + /* WiFi firmware requires power to be kept while in suspend */ + keep-power-in-suspend; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddao_1v8>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_c_pins>; + pinctrl-1 = <&sdcard_clk_gate_c_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddao_3v3>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + max-frequency = <200000000>; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; +}; + +&tdmif_b { + status = "okay"; +}; + +&tdmout_b { + status = "okay"; +}; + +&tohdmitx { + status = "okay"; +}; + +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; + clock-names = "lpo"; + }; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb { + status = "okay"; +}; From patchwork Thu Mar 23 06:54:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Hewitt X-Patchwork-Id: 13185120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50A93C6FD1D for ; Thu, 23 Mar 2023 06:55:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:15 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 09/13] boards: amlogic: add Radxa Zero2 defconfig Date: Thu, 23 Mar 2023 06:54:54 +0000 Message-Id: <20230323065458.776029-10-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235517_059452_450EF5E3 X-CRM114-Status: UNSURE ( 9.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add board configuration for the Radxa Zero2. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- configs/radxa-zero2_defconfig | 77 +++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 configs/radxa-zero2_defconfig diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig new file mode 100644 index 0000000000..2218b0db7d --- /dev/null +++ b/configs/radxa-zero2_defconfig @@ -0,0 +1,77 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-radxa-zero2" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" radxa-zero2" +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 +CONFIG_REMAKE_ELF=y +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +# CONFIG_PHY_REALTEK is not set +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +# CONFIG_ETH_DESIGNWARE_MESON8B is not set +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y From patchwork Thu Mar 23 06:54:55 2023 Content-Type: text/plain; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:17 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 10/13] doc: boards: amlogic: add documentation for Radxa Zero2 Date: Thu, 23 Mar 2023 06:54:55 +0000 Message-Id: <20230323065458.776029-11-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235518_649445_AB881225 X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add build docs for the Radxa Zero2 board. Signed-off-by: Christian Hewitt --- board/amlogic/w400/MAINTAINERS | 2 + doc/board/amlogic/index.rst | 1 + doc/board/amlogic/radxa-zero2.rst | 79 +++++++++++++++++++++++++++++++ 3 files changed, 82 insertions(+) create mode 100644 doc/board/amlogic/radxa-zero2.rst diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS index 042b523056..117f79ea04 100644 --- a/board/amlogic/w400/MAINTAINERS +++ b/board/amlogic/w400/MAINTAINERS @@ -5,6 +5,8 @@ L: u-boot-amlogic@groups.io F: board/amlogic/w400/ F: configs/bananapi-cm4-cm4io_defconfig F: configs/bananapi-m2s_defconfig +F: configs/radxa-zero2_defconfig F: doc/board/amlogic/w400.rst F: doc/board/amlogic/bananapi-cm4io.rst F: doc/board/amlogic/bananapi-m2s.rst +F: doc/board/amlogic/radxa-zero2.rst diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index fa1b362731..71b7e1f3ed 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -112,6 +112,7 @@ Board Documentation p212 q200 radxa-zero + radxa-zero2 sei510 sei610 s400 diff --git a/doc/board/amlogic/radxa-zero2.rst b/doc/board/amlogic/radxa-zero2.rst new file mode 100644 index 0000000000..3fb5d360e8 --- /dev/null +++ b/doc/board/amlogic/radxa-zero2.rst @@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for Radxa Zero2 (A311D) +============================== + +Radxa Zero2 is a small form factor SBC based on the Amlogic A311D chipset with the +following specification: + +- Amlogic A311D (Quad A73 + Dual A53) CPU +- 4GB LPDDR4 RAM +- 32/64/128GB eMMC +- Mali G52-MP4 GPU +- HDMI 2.1 output (micro) +- BCM4345 WiFi (2.4/5GHz a/b/g/n/ac) and BT 5.0 +- 1x USB 2.0 port - Type C (OTG) +- 1x USB 3.0 port - Type C (Host) +- 1x micro SD Card slot +- 40 Pin GPIO header + +Schematics are available on request from Radxa. + +U-Boot Compilation +------------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-none-elf- + $ make radxa-zero2_defconfig + $ make + +U-Boot Signing with Pre-Built FIP repo +-------------------------------------- + +.. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 + $ cd amlogic-boot-fip + $ mkdir my-output-dir + $ ./build-fip.sh radxa-zero2 /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +--------------------- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + + $ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git + $ git clone https://github.com/radxa/fip.git + + $ sudo apt-get install -y gcc-aarch64-linux-gnu device-tree-compiler libncurses5 libncurses5-dev + $ sudo apt-get install -y bc python dosfstools flex build-essential libssl-dev mtools + + $ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz + $ sudo tar xvf gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz -C /opt + + $ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf- + $ export ARCH=arm + $ cd u-boot + $ make radxa-zero2_defconfig + $ make + + $ cp u-boot.bin ../fip/radxa-zero2/bl33.bin + $ cd ../fip/radxa-zero2 + $ make + +This will generate the signed U-Boot binaries: + +.. code-block:: bash + + $ u-boot.bin u-boot.bin.sd.bin u-boot.bin.usb.bl2 u-boot.bin.usb.tpl + +Then write U-Boot to SD or eMMC with: + +.. code-block:: bash + + $ DEV=/dev/boot_device + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440 From patchwork Thu Mar 23 06:54:56 2023 Content-Type: text/plain; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:18 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 11/13] ARM: dts: add support for WeTek Hub and WeTek Play2 Date: Thu, 23 Mar 2023 06:54:56 +0000 Message-Id: <20230323065458.776029-12-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235520_184809_DCAB24BD X-CRM114-Status: GOOD ( 17.30 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Import the dts files from linux-amlogic/for-next (Linux 6.4-rc1) and add the old PHY reset bindings for dwmac to the u-boot.dtsi until we support the new bindings in the PHY node. Without this the PHY is not functional in u-boot or Linux. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 +++++ arch/arm/dts/meson-gxbb-wetek-play2.dts | 119 +++++++++ arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi | 13 + arch/arm/dts/meson-gxbb-wetek.dtsi | 292 ++++++++++++++++++++++ 5 files changed, 484 insertions(+) create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2.dts create mode 100644 arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi create mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 42da335bb5..1c843882d1 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -191,6 +191,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-gxbb-nanopi-k2.dtb \ meson-gxbb-p200.dtb \ meson-gxbb-p201.dtb \ + meson-gxbb-wetek-hub.dtb \ + meson-gxbb-wetek-play2.dtb \ meson-gxl-s805x-libretech-ac.dtb \ meson-gxl-s905d-libretech-pc.dtb \ meson-gxl-s905w-jethome-jethub-j80.dtb \ diff --git a/arch/arm/dts/meson-gxbb-wetek-hub.dts b/arch/arm/dts/meson-gxbb-wetek-hub.dts new file mode 100644 index 0000000000..58733017ed --- /dev/null +++ b/arch/arm/dts/meson-gxbb-wetek-hub.dts @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 BayLibre, Inc. + * Author: Neil Armstrong + */ + +/dts-v1/; + +#include "meson-gxbb-wetek.dtsi" +#include + +/ { + compatible = "wetek,hub", "amlogic,meson-gxbb"; + model = "WeTek Hub"; + + sound { + compatible = "amlogic,gx-sound-card"; + model = "WETEK-HUB"; + assigned-clocks = <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>, + <&clkc CLKID_MPLL2>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link-0 { + sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; + }; + + dai-link-1 { + sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; + dai-format = "i2s"; + mclk-fs = <256>; + + codec-0 { + sound-dai = <&aiu AIU_HDMI CTRL_I2S>; + }; + }; + + dai-link-2 { + sound-dai = <&aiu AIU_HDMI CTRL_OUT>; + + codec-0 { + sound-dai = <&hdmi_tx>; + }; + }; + }; +}; + +&aiu { + status = "okay"; +}; + +&ir { + linux,rc-map-name = "rc-wetek-hub"; +}; diff --git a/arch/arm/dts/meson-gxbb-wetek-play2.dts b/arch/arm/dts/meson-gxbb-wetek-play2.dts new file mode 100644 index 0000000000..505ffcd8eb --- /dev/null +++ b/arch/arm/dts/meson-gxbb-wetek-play2.dts @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 BayLibre, Inc. + * Author: Neil Armstrong + */ + +/dts-v1/; + +#include "meson-gxbb-wetek.dtsi" +#include +#include + +/ { + compatible = "wetek,play2", "amlogic,meson-gxbb"; + model = "WeTek Play 2"; + + spdif_dit: audio-codec-0 { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + status = "okay"; + sound-name-prefix = "DIT"; + }; + + leds { + led-wifi { + label = "wetek-play:wifi-status"; + gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led-ethernet { + label = "wetek-play:ethernet-status"; + gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + poll-interval = <100>; + + button { + label = "reset"; + linux,code = ; + gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "amlogic,gx-sound-card"; + model = "WETEK-PLAY2"; + assigned-clocks = <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>, + <&clkc CLKID_MPLL2>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link-0 { + sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; + }; + + dai-link-1 { + sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; + }; + + dai-link-2 { + sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; + dai-format = "i2s"; + mclk-fs = <256>; + + codec-0 { + sound-dai = <&aiu AIU_HDMI CTRL_I2S>; + }; + }; + + dai-link-3 { + sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; + + codec-0 { + sound-dai = <&spdif_dit>; + }; + }; + + dai-link-4 { + sound-dai = <&aiu AIU_HDMI CTRL_OUT>; + + codec-0 { + sound-dai = <&hdmi_tx>; + }; + }; + }; +}; + +&aiu { + status = "okay"; + pinctrl-0 = <&spdif_out_y_pins>; + pinctrl-names = "default"; +}; + +&i2c_A { + status = "okay"; + pinctrl-0 = <&i2c_a_pins>; + pinctrl-names = "default"; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; + +&ir { + linux,rc-map-name = "rc-wetek-play2"; +}; diff --git a/arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi new file mode 100644 index 0000000000..3743053eb9 --- /dev/null +++ b/arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Neil Armstrong + */ + +#include "meson-gx-u-boot.dtsi" + +ðmac { + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; +}; diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi new file mode 100644 index 0000000000..94dafb9553 --- /dev/null +++ b/arch/arm/dts/meson-gxbb-wetek.dtsi @@ -0,0 +1,292 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Andreas Färber + * Copyright (c) 2016 BayLibre, Inc. + * Author: Kevin Hilman + */ + +#include "meson-gxbb.dtsi" +#include +#include + +/ { + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + leds { + compatible = "gpio-leds"; + + led-power { + /* red in suspend or power-off */ + color = ; + function = LED_FUNCTION_POWER; + gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>; + default-state = "on"; + panic-indicator; + }; + }; + + usb_pwr: regulator-usb-pwrs { + compatible = "regulator-fixed"; + + regulator-name = "USB_PWR"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vddio_ao18: regulator-vddio_ao18 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; +}; + +&cec_AO { + status = "okay"; + pinctrl-0 = <&ao_cec_pins>; + pinctrl-names = "default"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +ðmac { + status = "okay"; + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + + phy-handle = <ð_phy0>; + phy-mode = "rgmii"; + + amlogic,tx-delay-ns = <2>; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy0: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + + reset-assert-us = <10000>; + reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_15 */ + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; + hdmi-supply = <&vddio_ao18>; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddio_ao18>; +}; + +/* Wireless SDIO Module */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + + non-removable; + disable-wp; + + /* WiFi firmware requires power to be kept while in suspend */ + keep-power-in-suspend; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vcc_3v3>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* This is connected to the Bluetooth module: */ +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>; + }; +}; + +/* This UART is brought out to the DB9 connector */ +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb0_phy { + status = "okay"; + phy-supply = <&usb_pwr>; +}; + +&usb0 { + status = "okay"; +}; From patchwork Thu Mar 23 06:54:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Hewitt X-Patchwork-Id: 13185127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7B53C6FD1C for ; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:20 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 12/13] boards: amlogic: add WeTek Hub and WeTek Play2 defconfig Date: Thu, 23 Mar 2023 06:54:57 +0000 Message-Id: <20230323065458.776029-13-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235521_721540_55181337 X-CRM114-Status: GOOD ( 11.34 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add configurations for the WeTek Hub and WeTek Play2 boards along with files for the wetek-gxbb board family to ensure the ethernet MAC is correctly discovered. Set myself as the maintainer for the board family. Signed-off-by: Christian Hewitt --- board/amlogic/p200/MAINTAINERS | 2 + configs/wetek-hub_defconfig | 70 ++++++++++++++++++++++++++++++++++ configs/wetek-play2_defconfig | 70 ++++++++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+) create mode 100644 configs/wetek-hub_defconfig create mode 100644 configs/wetek-play2_defconfig diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS index 33ca3df5c6..264218e3be 100644 --- a/board/amlogic/p200/MAINTAINERS +++ b/board/amlogic/p200/MAINTAINERS @@ -7,6 +7,8 @@ F: board/amlogic/p200/ F: configs/nanopi-k2_defconfig F: configs/odroid-c2_defconfig F: configs/p200_defconfig +F: configs/wetek-hub_defconfig +F: configs/wetek-play2_defconfig F: doc/board/amlogic/p200.rst F: doc/board/amlogic/nanopi-k2.rst F: doc/board/amlogic/odroid-c2.rst diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig new file mode 100644 index 0000000000..634833f7fe --- /dev/null +++ b/configs/wetek-hub_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x01000000 +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" wetek-hub" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub" +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_PHY=y +CONFIG_MESON_GXBB_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig new file mode 100644 index 0000000000..6d33b09a94 --- /dev/null +++ b/configs/wetek-play2_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x01000000 +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" wetek-play2" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2" +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_PHY=y +CONFIG_MESON_GXBB_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y From patchwork Thu Mar 23 06:54:58 2023 Content-Type: text/plain; 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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id z15-20020a5d44cf000000b002ce9f0e4a8fsm15520831wrr.84.2023.03.22.23.55.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 23:55:21 -0700 (PDT) From: Christian Hewitt To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, linux-amlogic@lists.infradead.org Subject: [PATCH 13/13] doc: boards: amlogic: add documentation for WeTek Hub and WeTek Play2 Date: Thu, 23 Mar 2023 06:54:58 +0000 Message-Id: <20230323065458.776029-14-christianshewitt@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230323065458.776029-1-christianshewitt@gmail.com> References: <20230323065458.776029-1-christianshewitt@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230322_235522_385119_4B93E7AE X-CRM114-Status: GOOD ( 16.35 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add build instructions for the WeTek Hub and WeTek Play2 boards. Signed-off-by: Christian Hewitt --- board/amlogic/p200/MAINTAINERS | 2 + doc/board/amlogic/index.rst | 2 + doc/board/amlogic/wetek-hub.rst | 109 ++++++++++++++++++++++++++++ doc/board/amlogic/wetek-play2.rst | 114 ++++++++++++++++++++++++++++++ 4 files changed, 227 insertions(+) create mode 100644 doc/board/amlogic/wetek-hub.rst create mode 100644 doc/board/amlogic/wetek-play2.rst diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS index 264218e3be..fe451dd7db 100644 --- a/board/amlogic/p200/MAINTAINERS +++ b/board/amlogic/p200/MAINTAINERS @@ -12,3 +12,5 @@ F: configs/wetek-play2_defconfig F: doc/board/amlogic/p200.rst F: doc/board/amlogic/nanopi-k2.rst F: doc/board/amlogic/odroid-c2.rst +F: doc/board/amlogic/wetek-hub.rst +F: doc/board/amlogic/wetek-play2.rst diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index 71b7e1f3ed..deb7976436 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -118,4 +118,6 @@ Board Documentation s400 u200 wetek-core2 + wetek-hub + wetek-play2 w400 diff --git a/doc/board/amlogic/wetek-hub.rst b/doc/board/amlogic/wetek-hub.rst new file mode 100644 index 0000000000..7362b7d7f5 --- /dev/null +++ b/doc/board/amlogic/wetek-hub.rst @@ -0,0 +1,109 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for WeTek Hub (S905) +=========================== + +WeTek Hub is a small form-factor Android STB manufactured by WeTek with the following +specification: + + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz + - ARM Mali 450 GPU + - 1GB DDR3 SDRAM + - 8GB eMMC + - Gigabit Ethernet + - HDMI 2.0 4K/60Hz display + - 1x USB otg + - microSD + - UART jack + - Infrared receiver + +Schematics are not publicly available but have been shared privately to maintainers. + +U-Boot Compilation +------------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-none-elf- + $ make wetek-hub_defconfig + $ make + +U-Boot Signing with Pre-Built FIP repo +-------------------------------------- + +.. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 + $ cd amlogic-boot-fip + $ mkdir my-output-dir + $ ./build-fip.sh wetek-hub /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +--------------------- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image and WeTek has not publicly shared the U-Boot sources needed to build FIP binaries +for signing. However you can download them from the amlogic-fip-repo. + +.. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 + $ cd amlogic-boot-fip/wetek-hub + $ export FIPDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + + $ mkdir fip + + $ cp $FIPDIR/bl2.bin fip/ + $ cp $FIPDIR/acs.bin fip/ + $ cp $FIPDIR/bl21.bin fip/ + $ cp $FIPDIR/bl30.bin fip/ + $ cp $FIPDIR/bl301.bin fip/ + $ cp $FIPDIR/bl31.img fip/ + $ cp u-boot.bin fip/bl33.bin + + $ $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + $ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \ + --bl31 fip/bl31.img \ + --bl33 fip/bl33.bin \ + fip/fip.bin + + $ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin + $ python3 $FIPDIR/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + + $ $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + $ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin + + $ $FIPDIR/aml_encrypt_gxb --bootsig \ + --input fip/boot_new.bin + --output fip/u-boot.bin + +Then write U-Boot to SD or eMMC with: + +.. code-block:: bash + + $ DEV=/dev/boot_device + $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync + $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc + $ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc + $ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc + $ ./aml_chksum fip/u-boot.bin.gxbb + $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440 diff --git a/doc/board/amlogic/wetek-play2.rst b/doc/board/amlogic/wetek-play2.rst new file mode 100644 index 0000000000..31c839dcd5 --- /dev/null +++ b/doc/board/amlogic/wetek-play2.rst @@ -0,0 +1,114 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for WeTek Play2 (S905) +============================= + +WeTek Play2 is an Android STB manufactured by WeTek with the following specification: + + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz + - ARM Mali 450 GPU + - 2GB DDR3 SDRAM + - 8GB eMMC + - Gigabit Ethernet + - AP6335 (v1) or AP6255 (v2) WiFi (b/g/n) and BT 4.0 + - HDMI 2.0 4K/60Hz display + - 2x USB 2.0 host + - 1x USB 2.0 otg + - microSD + - UART jack + - Infrared receiver + - Power LED (blue) + - Power button (case, front) + - Reset button (underside) + - DVB Card: DVB-S or DVB-T/C or ATSC + +Schematics are not publicly available but have been shared privately to maintainers. + +U-Boot Compilation +------------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-none-elf- + $ make wetek-play2_defconfig + $ make + +U-Boot Signing with Pre-Built FIP repo +-------------------------------------- + +.. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 + $ cd amlogic-boot-fip + $ mkdir my-output-dir + $ ./build-fip.sh wetek-play2 /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +--------------------- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image and WeTek has not publicly shared the U-Boot sources needed to build FIP binaries +for signing. However you can download them from the amlogic-fip-repo. + +.. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 + $ cd amlogic-boot-fip/wetek-play2 + $ export FIPDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + + $ mkdir fip + + $ cp $FIPDIR/bl2.bin fip/ + $ cp $FIPDIR/acs.bin fip/ + $ cp $FIPDIR/bl21.bin fip/ + $ cp $FIPDIR/bl30.bin fip/ + $ cp $FIPDIR/bl301.bin fip/ + $ cp $FIPDIR/bl31.img fip/ + $ cp u-boot.bin fip/bl33.bin + + $ $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + $ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \ + --bl31 fip/bl31.img \ + --bl33 fip/bl33.bin \ + fip/fip.bin + + $ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin + $ python3 $FIPDIR/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + + $ $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + $ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin + + $ $FIPDIR/aml_encrypt_gxb --bootsig \ + --input fip/boot_new.bin + --output fip/u-boot.bin + +Then write U-Boot to SD or eMMC with: + +.. code-block:: bash + + $ DEV=/dev/boot_device + $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync + $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc + $ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc + $ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc + $ ./aml_chksum fip/u-boot.bin.gxbb + $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440