From patchwork Fri Mar 24 22:49:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinay Belgaumkar X-Patchwork-Id: 13187455 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3CF3BC76195 for ; Fri, 24 Mar 2023 22:48:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AF04710E1BD; Fri, 24 Mar 2023 22:48:20 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 86D3310E1BD; Fri, 24 Mar 2023 22:48:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679698098; x=1711234098; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=WMddtaXRrK0DuYC0oYI3xM9twlMVXzvEFTSj97RQGg0=; b=au/0ct50gRDccumOfLr0Pp8Bxta28+XdG3pRygplItalfp6EpPJB+6IV YpkKihiFhsWkW9G3Bg90aBEsRu5IjSym95YgSM1+deQyzBkLP0aHf9pzp E2wtE01W0B8Hu9kObjP/piLNFjxGhVLYwz7gBveW/HbdDHl7QyuCPWcg8 /00n+974E0lRa8NwT2Gzot7kgzSri8Hm/J1ijCs5+QnJoPw2BgFGbrOHX XYm5Nr1qTht/KtvyWWoBwIzce08qcbLwHqZS90iao8ka66FGJgM1Z2Tzx tzYIJW1jWkXqaRnZEPhw/x6CbHJokNOeRJF/d/I54BiW48gA02yYi58Kq w==; X-IronPort-AV: E=McAfee;i="6600,9927,10659"; a="320303920" X-IronPort-AV: E=Sophos;i="5.98,289,1673942400"; d="scan'208";a="320303920" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2023 15:48:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10659"; a="1012444535" X-IronPort-AV: E=Sophos;i="5.98,289,1673942400"; d="scan'208";a="1012444535" Received: from vbelgaum-ubuntu.fm.intel.com ([10.1.27.27]) by fmsmga005.fm.intel.com with ESMTP; 24 Mar 2023 15:48:18 -0700 From: Vinay Belgaumkar To: intel-gfx@lists.freedesktop.org, igt-dev@lists.freedesktop.org Date: Fri, 24 Mar 2023 15:49:58 -0700 Message-Id: <20230324224959.1727662-2-vinay.belgaumkar@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230324224959.1727662-1-vinay.belgaumkar@intel.com> References: <20230324224959.1727662-1-vinay.belgaumkar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH i-g-t 1/2] lib/debugfs: Add per GT debugfs helpers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" These can be used to open per-gt debugfs files. Signed-off-by: Tvrtko Ursulin Signed-off-by: Vinay Belgaumkar --- lib/igt_debugfs.c | 60 +++++++++++++++++++++++++++++++++++++++++++++++ lib/igt_debugfs.h | 4 ++++ 2 files changed, 64 insertions(+) diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c index 05889bbe..afde2da6 100644 --- a/lib/igt_debugfs.c +++ b/lib/igt_debugfs.c @@ -217,6 +217,37 @@ int igt_debugfs_dir(int device) return open(path, O_RDONLY); } +/** + * igt_debugfs_gt_dir: + * @device: fd of the device + * @gt: GT instance number + * + * This opens the debugfs directory corresponding to device for use + * with igt_sysfs_get() and related functions. + * + * Returns: + * The directory fd, or -1 on failure. + */ +int igt_debugfs_gt_dir(int device, unsigned int gt) +{ + int debugfs_gt_dir_fd; + char path[PATH_MAX]; + char gtpath[16]; + int ret; + + if (!igt_debugfs_path(device, path, sizeof(path))) + return -1; + + ret = snprintf(gtpath, sizeof(gtpath), "/gt%u", gt); + igt_assert(ret < sizeof(gtpath)); + strncat(path, gtpath, sizeof(path) - 1); + + debugfs_gt_dir_fd = open(path, O_RDONLY); + igt_debug_on_f(debugfs_gt_dir_fd < 0, "path: %s\n", path); + + return debugfs_gt_dir_fd; +} + /** * igt_debugfs_connector_dir: * @device: fd of the device @@ -313,6 +344,35 @@ bool igt_debugfs_exists(int device, const char *filename, int mode) return false; } +/** + * igt_debugfs_gt_open: + * @device: open i915 drm fd + * @gt: gt instance number + * @filename: name of the debugfs node to open + * @mode: mode bits as used by open() + * + * This opens a debugfs file as a Unix file descriptor. The filename should be + * relative to the drm device's root, i.e. without "drm/$minor". + * + * Returns: + * The Unix file descriptor for the debugfs file or -1 if that didn't work out. + */ +int +igt_debugfs_gt_open(int device, unsigned int gt, const char *filename, int mode) +{ + int dir, ret; + + dir = igt_debugfs_gt_dir(device, gt); + if (dir < 0) + return dir; + + ret = openat(dir, filename, mode); + + close(dir); + + return ret; +} + /** * igt_debugfs_simple_read: * @dir: fd of the debugfs directory diff --git a/lib/igt_debugfs.h b/lib/igt_debugfs.h index 4824344a..3e6194ad 100644 --- a/lib/igt_debugfs.h +++ b/lib/igt_debugfs.h @@ -45,6 +45,10 @@ void __igt_debugfs_write(int fd, const char *filename, const char *buf, int size int igt_debugfs_simple_read(int dir, const char *filename, char *buf, int size); bool igt_debugfs_search(int fd, const char *filename, const char *substring); +int igt_debugfs_gt_dir(int device, unsigned int gt); +int igt_debugfs_gt_open(int device, unsigned int gt, const char *filename, + int mode); + /** * igt_debugfs_read: * @filename: name of the debugfs file From patchwork Fri Mar 24 22:49:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Vinay Belgaumkar X-Patchwork-Id: 13187456 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4BE87C76195 for ; Fri, 24 Mar 2023 22:48:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C59C110E1C2; Fri, 24 Mar 2023 22:48:24 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9646D10E1C2; Fri, 24 Mar 2023 22:48:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679698103; x=1711234103; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=AlKv8JH6v7RSXFtksamP2tDCpJ4Sb1vwsf6/0J5x9Cw=; b=Z4RZBbaRMbzusQdsXAVWHeIUX9miHdD1mhct3e9UUZG04C2qQfu8tcF5 0LbjkXNqjFQTk9aRSC9VKURFu+Ufj2/J4gU2Ul7pj6DVY6j96//FYSP7f jPWLtRV9/lrD6WII1pyMRCl0ZdLEih7+uFu38GDPDt5Z17+L1A0v4jbyM WqxyJ6jwU5/IAiTGcbl9JC8XWW6QX4vqfDKnraRVcbIsPZAxqeO85VtKa nXXBnOlz9hjNelQrqtkOzMBf6M1iz1Li+FROOTZIKUOOaKfKKBMuMHqHe 1+YB+q8cno9XwFKO/aj8ICdySVbn6OeOApjROk9HqiDKXdYgFCC8chY9M g==; X-IronPort-AV: E=McAfee;i="6600,9927,10659"; a="320303938" X-IronPort-AV: E=Sophos;i="5.98,289,1673942400"; d="scan'208";a="320303938" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2023 15:48:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10659"; a="1012444549" X-IronPort-AV: E=Sophos;i="5.98,289,1673942400"; d="scan'208";a="1012444549" Received: from vbelgaum-ubuntu.fm.intel.com ([10.1.27.27]) by fmsmga005.fm.intel.com with ESMTP; 24 Mar 2023 15:48:23 -0700 From: Vinay Belgaumkar To: intel-gfx@lists.freedesktop.org, igt-dev@lists.freedesktop.org Date: Fri, 24 Mar 2023 15:49:59 -0700 Message-Id: <20230324224959.1727662-3-vinay.belgaumkar@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230324224959.1727662-1-vinay.belgaumkar@intel.com> References: <20230324224959.1727662-1-vinay.belgaumkar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH i-g-t 2/2] i915_guc_pc: Add some basic SLPC igt tests X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use the xe_guc_pc test for i915 as well. Validate basic api for GT freq control. Also test interaction with GT reset. We skip rps tests with SLPC enabled, this will re-introduce some coverage. SLPC selftests are already covering some other workload related scenarios. Signed-off-by: Rodrigo Vivi Signed-off-by: Vinay Belgaumkar --- tests/i915/i915_guc_pc.c | 151 +++++++++++++++++++++++++++++++++++++++ tests/meson.build | 1 + 2 files changed, 152 insertions(+) create mode 100644 tests/i915/i915_guc_pc.c diff --git a/tests/i915/i915_guc_pc.c b/tests/i915/i915_guc_pc.c new file mode 100644 index 00000000..f9a0ed83 --- /dev/null +++ b/tests/i915/i915_guc_pc.c @@ -0,0 +1,151 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2023 Intel Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "drmtest.h" +#include "i915/gem.h" +#include "igt_sysfs.h" +#include "igt.h" + +IGT_TEST_DESCRIPTION("Test GuC PM features like SLPC and its interactions"); +/* + * Too many intermediate components and steps before freq is adjusted + * Specially if workload is under execution, so let's wait 100 ms. + */ +#define ACT_FREQ_LATENCY_US 100000 + +static uint32_t get_freq(int dirfd, uint8_t id) +{ + uint32_t val; + + igt_require(igt_sysfs_rps_scanf(dirfd, id, "%u", &val) == 1); + + return val; +} + +static int set_freq(int dirfd, uint8_t id, uint32_t val) +{ + return igt_sysfs_rps_printf(dirfd, id, "%u", val); +} + +static void test_freq_basic_api(int dirfd, int gt) +{ + uint32_t rpn, rp0, rpe; + + /* Save frequencies */ + rpn = get_freq(dirfd, RPS_RPn_FREQ_MHZ); + rp0 = get_freq(dirfd, RPS_RP0_FREQ_MHZ); + rpe = get_freq(dirfd, RPS_RP1_FREQ_MHZ); + igt_info("System min freq: %dMHz; max freq: %dMHz\n", rpn, rp0); + + /* + * Negative bound tests + * RPn is the floor + * RP0 is the ceiling + */ + igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rpn - 1) < 0); + igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rp0 + 1) < 0); + igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rpn - 1) < 0); + igt_assert(set_freq(dirfd, RPS_MAX_FREQ_MHZ, rp0 + 1) < 0); + + /* Assert min requests are respected from rp0 to rpn */ + igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rp0) > 0); + igt_assert(get_freq(dirfd, RPS_MIN_FREQ_MHZ) == rp0); + igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rpe) > 0); + igt_assert(get_freq(dirfd, RPS_MIN_FREQ_MHZ) == rpe); + igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rpn) > 0); + igt_assert(get_freq(dirfd, RPS_MIN_FREQ_MHZ) == rpn); + + /* Assert max requests are respected from rpn to rp0 */ + igt_assert(set_freq(dirfd, RPS_MAX_FREQ_MHZ, rpn) > 0); + igt_assert(get_freq(dirfd, RPS_MAX_FREQ_MHZ) == rpn); + igt_assert(set_freq(dirfd, RPS_MAX_FREQ_MHZ, rpe) > 0); + igt_assert(get_freq(dirfd, RPS_MAX_FREQ_MHZ) == rpe); + igt_assert(set_freq(dirfd, RPS_MAX_FREQ_MHZ, rp0) > 0); + igt_assert(get_freq(dirfd, RPS_MAX_FREQ_MHZ) == rp0); + +} + +static void test_reset(int i915, int dirfd, int gt) +{ + uint32_t rpn = get_freq(dirfd, RPS_RPn_FREQ_MHZ); + int fd; + + igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rpn) > 0); + igt_assert(set_freq(dirfd, RPS_MAX_FREQ_MHZ, rpn) > 0); + usleep(ACT_FREQ_LATENCY_US); + igt_assert(get_freq(dirfd, RPS_MIN_FREQ_MHZ) == rpn); + + /* Manually trigger a GT reset */ + fd = igt_debugfs_gt_open(i915, gt, "reset", O_WRONLY); + igt_require(fd >= 0); + igt_ignore_warn(write(fd, "1\n", 2)); + close(fd); + + igt_assert(get_freq(dirfd, RPS_MIN_FREQ_MHZ) == rpn); + igt_assert(get_freq(dirfd, RPS_MAX_FREQ_MHZ) == rpn); +} + +igt_main +{ + int i915 = -1; + uint32_t *stash_min, *stash_max; + + igt_fixture { + int num_gts, dirfd, gt; + + i915 = drm_open_driver(DRIVER_INTEL); + igt_require_gem(i915); + /* i915_pm_rps already covers execlist path */ + igt_require(gem_using_guc_submission(i915)); + + num_gts = igt_sysfs_get_num_gt(i915); + stash_min = (uint32_t*)malloc(sizeof(uint32_t) * num_gts); + stash_max = (uint32_t*)malloc(sizeof(uint32_t) * num_gts); + + /* Save curr min and max across GTs */ + for_each_sysfs_gt_dirfd(i915, dirfd, gt) { + stash_min[gt] = get_freq(dirfd, RPS_MIN_FREQ_MHZ); + stash_max[gt] = get_freq(dirfd, RPS_MAX_FREQ_MHZ); + } + } + + igt_describe("Test basic API for controlling min/max GT frequency"); + igt_subtest_with_dynamic_f("freq-basic-api") { + int dirfd, gt; + + for_each_sysfs_gt_dirfd(i915, dirfd, gt) + igt_dynamic_f("gt%u", gt) + test_freq_basic_api(dirfd, gt); + } + + igt_describe("Test basic freq API works after a reset"); + igt_subtest_with_dynamic_f("freq-reset") { + int dirfd, gt; + + for_each_sysfs_gt_dirfd(i915, dirfd, gt) + igt_dynamic_f("gt%u", gt) + test_reset(i915, dirfd, gt); + } + + igt_fixture { + int dirfd, gt; + /* Restore frequencies */ + for_each_sysfs_gt_dirfd(i915, dirfd, gt) { + igt_assert(set_freq(dirfd, RPS_MAX_FREQ_MHZ, stash_max[gt]) > 0); + igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, stash_min[gt]) > 0); + } + close(i915); + } +} diff --git a/tests/meson.build b/tests/meson.build index 7d2168be..3ebd3bf2 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -202,6 +202,7 @@ i915_progs = [ 'gem_workarounds', 'i915_fb_tiling', 'i915_getparams_basic', + 'i915_guc_pc', 'i915_hangman', 'i915_hwmon', 'i915_module_load',