From patchwork Sat Mar 25 11:28:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13187703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2B87C77B60 for ; Sat, 25 Mar 2023 11:29:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231886AbjCYL3P (ORCPT ); Sat, 25 Mar 2023 07:29:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231821AbjCYL3O (ORCPT ); Sat, 25 Mar 2023 07:29:14 -0400 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 751B912CE0; Sat, 25 Mar 2023 04:29:02 -0700 (PDT) Received: by mail-lf1-x12a.google.com with SMTP id q16so5379195lfe.10; Sat, 25 Mar 2023 04:29:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679743741; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=ht+M9qAwDcGzy0Oi5GFIk5LGEqROnuLchd2TnwqxBxs=; b=AM9xNCWXg1wmyrB1RoOB6p5kioHSwyTQw41FQf2b49pvAmiOqiiEN+IZtMhlrbuHiL Jl7UlaTt9aL0iHYgM8NrHQXG9Va2qBpgaKAuwPf2EI50mXZQnZGQeSFwCCV4NGpxpm2N s3jEMv4c0qDbjGrGYSBXpaKKQXnxhWIHE4WKxX/IQogWF8FnKwye9+7gWI96vBB5bAfS KmtdnA1JuDwYvuL/TBRZlOXjrcJ9Xj7SrpVo+RhJE8FRU40OSptdUqc5+SkFpUMZYKyz 3XRvzH3SEzaurmbf1ddM8DWHrcqfr830JB1j57U9lxrLeg4TNCbuSUdyugCmpjzeKDa9 VqBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679743741; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ht+M9qAwDcGzy0Oi5GFIk5LGEqROnuLchd2TnwqxBxs=; b=yTzrc8on/kYKywpkK2TFnYBjbuizBVxctBGzBj9zYKB5UFJfQSSKH41iwELxoDSWqu zFPbFikr8YHJg6fnkvYzFaAGU0zE+PXQpPphMVMIUXRUk3dzXljIx2a4GtcK5Pr8B9Rs FcTeYnJ9gWK56vPr3/aCvpA3HacSeGq5nHwxZKHRP+nsqjnlb8XTNsPrz2poZbZ4T6mU AyHWsWuhVmh88FlR1iX+GDTkPpR0QvE6lZBZ19X3OltzTB8F8cVP7O1FOPtvzjJB53t5 c6IAA7btwb0UjjV3huAXgv5IQxfPe1rUgXBSaWu/Yx9KjeSJ6NjHqd4gClqELAjx3Jwv dsBg== X-Gm-Message-State: AAQBX9eo+NMRPhPm+nNVczQivWixZc2o5HKeVT6SUt/lNLb3IudxIKO8 nQjyYqT3QkFn4qiLca2jqydDuUMCTcZ9Zg== X-Google-Smtp-Source: AKy350bejnySz6miPOH2OcjbHvHUExS1lkKqmmyuni0RJWWNhjWKW4qG7kFT3KIWm5uKzIt8zpKALg== X-Received: by 2002:ac2:5989:0:b0:4dd:a053:3baf with SMTP id w9-20020ac25989000000b004dda0533bafmr1727986lfn.35.1679743740443; Sat, 25 Mar 2023 04:29:00 -0700 (PDT) Received: from localhost.localdomain (cdb25.neoplus.adsl.tpnet.pl. [83.30.151.25]) by smtp.gmail.com with ESMTPSA id m30-20020ac24ade000000b004eaf55936eesm1502510lfp.233.2023.03.25.04.28.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Mar 2023 04:29:00 -0700 (PDT) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] arm64: dts: msm8953: Replace xo_board with rpmcc sourced xo Date: Sat, 25 Mar 2023 12:28:49 +0100 Message-Id: <20230325112852.18841-1-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Assign RPM_SMD_XO_CLK_SRC from rpmcc in place of fixed-clock where possible. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi index da00c2f04cda..438a70eb6152 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -2,6 +2,7 @@ /* Copyright (c) 2022, The Linux Foundation. All rights reserved. */ #include +#include #include #include #include @@ -637,7 +638,7 @@ gcc: clock-controller@1800000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - clocks = <&xo_board>, + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>, <0>, <0>, @@ -801,7 +802,7 @@ dsi0_phy: phy@1a94400 { #clock-cells = <1>; #phy-cells = <0>; - clocks = <&gcc GCC_MDSS_AHB_CLK>, <&xo_board>; + clocks = <&gcc GCC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "ref"; status = "disabled"; @@ -868,7 +869,7 @@ dsi1_phy: phy@1a96400 { #clock-cells = <1>; #phy-cells = <0>; - clocks = <&gcc GCC_MDSS_AHB_CLK>, <&xo_board>; + clocks = <&gcc GCC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "ref"; status = "disabled"; @@ -992,7 +993,7 @@ sdhc_1: mmc@7824900 { clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>, - <&xo_board>; + <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "core", "xo"; power-domains = <&rpmpd MSM8953_VDDCX>; @@ -1052,7 +1053,7 @@ sdhc_2: mmc@7864900 { clocks = <&gcc GCC_SDCC2_AHB_CLK>, <&gcc GCC_SDCC2_APPS_CLK>, - <&xo_board>; + <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "core", "xo"; power-domains = <&rpmpd MSM8953_VDDCX>; From patchwork Sat Mar 25 11:28:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13187702 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 338E0C761AF for ; Sat, 25 Mar 2023 11:29:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231871AbjCYL3O (ORCPT ); Sat, 25 Mar 2023 07:29:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231823AbjCYL3O (ORCPT ); Sat, 25 Mar 2023 07:29:14 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33F9813D44; Sat, 25 Mar 2023 04:29:03 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id k37so5448520lfv.0; Sat, 25 Mar 2023 04:29:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679743741; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x/omv0XmiZuQK7Oc5l5JxiCh3msEP6oIygvtCwqgkM8=; b=p7xcQ6uCAoD3CBoBMAhx1yaM5fVT2XSS+akgG50HuFR+gyN5heLw0dwC8uN29OnE+m eOO/NYERfWw9Fu3dSjX2ZH+beaAIxW/9dGah9wqmmoXO/pYQWfPjZNhmE6uxRZh9H7cm fqQwQ1S+LP/EKS+wJBSzAZTDXOZ9JubwC5/+iY5AvaaaOyVVhIKOT9nFUWCpEiwSrF4k iXRS/dTOHxwK8gMiCeov/QjX/4aZgPxPjJKDeOrFZneEPJzotLOn6t5Fdi/KktS87SJg jekdQuQuxPHSxbd4VJxfCb1utA2E9N4iBL0obJv7El8o6/1T6VN90K6k6u1CokSP7V/a HfxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679743741; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=x/omv0XmiZuQK7Oc5l5JxiCh3msEP6oIygvtCwqgkM8=; b=JlP5MKF1+xP5EfusBGCpJtO6MAJYNTfoqlRQkxcRzMhL/m2NH3x1KQKIeAP0aDEUTS 04GQHUv5BLYn9kIfiUlczXLEwqs2PCAhTFA1Ay+kVWBVuVkmtsjcy/RQoheINZA+Iqkx WctgwVPjrFg+/3LKJf/+ApbbPwnOs/WK86dIsFMMS/GYXLAO3SroaRp4mp2A3OE5insb 0IbpPZ9CmtD3vbe8TlkF6lXedoZOmxx/lu7TwO/yQbBEieJG8NGry/uMcp/C742las3J VztzXQgQTC16+JwzdupoCLa9EUyf1GoFsXTYIIdi/eBh8Ncng2jA4pNqqcLeuuBTmO3a hthA== X-Gm-Message-State: AAQBX9e+q1KD0GOkeLj8oOmqjYxnOPhQQD3SobfEa5j6TFsrf6tnvFkY RfAqVl4qCYi3Ocv4xe0K9TxiV6Q9H5RrIQ== X-Google-Smtp-Source: AKy350ZjOER9Q7QbZRS4yqQNlLQKE+EPnMFgvDdoZNzaYj2ltWfRV2oBNHrBMZa3NH4HrVpiHHsPbA== X-Received: by 2002:a05:6512:951:b0:4ca:98ec:7d9a with SMTP id u17-20020a056512095100b004ca98ec7d9amr1624745lft.15.1679743741616; Sat, 25 Mar 2023 04:29:01 -0700 (PDT) Received: from localhost.localdomain (cdb25.neoplus.adsl.tpnet.pl. [83.30.151.25]) by smtp.gmail.com with ESMTPSA id m30-20020ac24ade000000b004eaf55936eesm1502510lfp.233.2023.03.25.04.29.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Mar 2023 04:29:01 -0700 (PDT) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] arm64: dts: msm8953: Provide dsi_phy clocks to gcc Date: Sat, 25 Mar 2023 12:28:50 +0100 Message-Id: <20230325112852.18841-2-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230325112852.18841-1-a39.skl@gmail.com> References: <20230325112852.18841-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Provide clocks from dsi_phy to gcc, this will make sure we don't fallback to global name lookup. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 438a70eb6152..5dd10c35ee0d 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -640,10 +640,10 @@ gcc: clock-controller@1800000 { #power-domain-cells = <1>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>, - <0>, - <0>, - <0>, - <0>; + <&dsi0_phy 1>, + <&dsi0_phy 0>, + <&dsi1_phy 1>, + <&dsi1_phy 0>; clock-names = "xo", "sleep", "dsi0pll", From patchwork Sat Mar 25 11:28:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13187704 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59961C761AF for ; Sat, 25 Mar 2023 11:29:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231968AbjCYL33 (ORCPT ); Sat, 25 Mar 2023 07:29:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47090 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231873AbjCYL3Q (ORCPT ); Sat, 25 Mar 2023 07:29:16 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 578B112862; Sat, 25 Mar 2023 04:29:04 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id y20so5418512lfj.2; Sat, 25 Mar 2023 04:29:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679743742; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ybH5MmJH8SEpMVxdPkHcz9qeJYxFxp9Si4fjLNySVz4=; b=e4bhS2MNPPaxZ+gOkVSWjISSLuT9vdGBX3ASlFA9eWXEOJONvYTSJc5A1RNnz4Ucnh pp++W5XGLStcH3jlGYkjMvR3h+U1330IrCbxGibQZQf+8ULAVQMhvdOzROIn0PSaDvGb +hMN9gK/h5O+sTLXprnVzTF46wfUu2ZMy8DeSUCXDiAmsPSZwTWE03dzulwJv8bMP5dA nrr07oGqgnL3iLqM7sQe1zHjw6NgplP0XJfvtu3qNl/pNmXxGFbrSXCRTaHSgpW5K9xS ptuItdXSc9dT+uvNh7J5Ou0GY/qSfEHFdPDIOecj2OSHwG/UASABzpzUSieahnlSWibX j7Cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679743742; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ybH5MmJH8SEpMVxdPkHcz9qeJYxFxp9Si4fjLNySVz4=; b=ij/YQaptxpfdBEo9gGxwO1uUjTT/Kwd39stS9wV3zHJsYh+C0gLx9o6g8JRun7onJK cXSBZaKxJJGTv9OX2LOk9I1xFu5bmvoKDgX58DR6dGMsirKkdqk6Y864K5UM+Us/lXT0 8doUQc9Bn6Qxzy1f6FqYFFrUdvYFuZmrzVAJRThw8xZCVBMD9UXlV6BqsnKQ+KFXuFXQ P8flUKX5QGlpyFNUJrTXMlGzK3H1mxV/o44vuAh2OgHaltu99XEoetmCMplUDLx6DtEi KrJrDglCl43hhw79CPBWFlyPnOiKY/CPAURj1wgLM9z1Dk5c+hrfB8jsaEXg4LhuOEuO XCqQ== X-Gm-Message-State: AAQBX9cwZjHN1SnRrnqwqG882OzFKGJD8JUsu1zhuyZO76pTX/iPTlSk 0+QviNYstdBch8nC3g89fJ01so9bysxCCQ== X-Google-Smtp-Source: AKy350ZQM7LhtZUypMbWYPj4Mbe/WHfriKtSP6gN3WlTuJclJolM9dYoT4FoGsEmaP+PgQFNCH41zQ== X-Received: by 2002:ac2:4c11:0:b0:4dc:65c0:c74e with SMTP id t17-20020ac24c11000000b004dc65c0c74emr1452103lfq.29.1679743742780; Sat, 25 Mar 2023 04:29:02 -0700 (PDT) Received: from localhost.localdomain (cdb25.neoplus.adsl.tpnet.pl. [83.30.151.25]) by smtp.gmail.com with ESMTPSA id m30-20020ac24ade000000b004eaf55936eesm1502510lfp.233.2023.03.25.04.29.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Mar 2023 04:29:02 -0700 (PDT) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] arm64: dts: msm8953: Drop unsupported dwc3 flag Date: Sat, 25 Mar 2023 12:28:51 +0100 Message-Id: <20230325112852.18841-3-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230325112852.18841-1-a39.skl@gmail.com> References: <20230325112852.18841-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Property phy_mode according to binding checker does not exist, drop it. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 5dd10c35ee0d..0a1bf1058cbf 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -977,7 +977,6 @@ usb3_dwc3: usb@7000000 { snps,hird-threshold = /bits/ 8 <0x00>; maximum-speed = "high-speed"; - phy_mode = "utmi"; }; }; From patchwork Sat Mar 25 11:28:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13187705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F6F7C76196 for ; Sat, 25 Mar 2023 11:29:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231926AbjCYL3a (ORCPT ); Sat, 25 Mar 2023 07:29:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231949AbjCYL31 (ORCPT ); Sat, 25 Mar 2023 07:29:27 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EDB5212CDE; Sat, 25 Mar 2023 04:29:05 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id g17so5401654lfv.4; Sat, 25 Mar 2023 04:29:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679743744; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pqojHmxDqpx2GPiUKbXqxXhw5zwdp35Yf/FdDi53lVM=; b=E+qLd6D3IBWrXNJWdvXpCGGyn2FHMUBfdfUpO4DErx3Bv2X/O7uxbGNP69xmAPfV43 tIeOelKglRpACbCd4XRF9Q+aemcNPy6th/FALBoFg5QPcKs6sLD9EZLOwyjJ5hYrVXLk T83Ikz3GZbIGC9EwmtJijR9Gt3kh+0ubUtENrRP3zjKjqduqwscmvhkIQr+2XaSnIlRK nPhs0/HHZqEkN5r8YCv4UVgOs8S2or9TtyPXqqcfEI/gpsqRufKIujpgrar24rx/zEqx hGMUA6CCzlp7OOwUlNmoNTreK+g9nRaxdMPDJWO+tGF7+fjCov4VjtjCWEgPzbeKtcRN Gk7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679743744; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pqojHmxDqpx2GPiUKbXqxXhw5zwdp35Yf/FdDi53lVM=; b=mRNyTpBkGUKDUqMjlffIW9IJbQ8IiiBQBFJl6Y0vqW1EHKJ10GmDpvJIV4z6axNW8P zTUyKjmnfIPC2yLlThFal30iFu/KZg3PMoXEI9V2GAMLBh37bVJ77FRlzikeE5blJ1Le frTtJ9giymTM0OXS2+ieuKE/uejg80jQh2RbXSqL/W+o6ygceQuzYP9LRbMdwYDRyZRo 4Y6jvoZX+dBiIT08NCAmdE0t18eiq7LSbHdlfQuRCJUeUnMmKwT4vS8Si0m1ufU+2x9u fe0NCWxRTd0uQQZE2EbtdD4fg/dlAcJ5N03IUepZR1VezJeQQRwjhCcs2bTW3OJR5gAM BmgQ== X-Gm-Message-State: AAQBX9eIkRCEPOv9fBiW+8ARJizL3spQRflcFZjxJXshQQnjs9+X3Eb2 9zZ+HJzlCP5GrDvd6RTQVqZ9wEhc9KLrfg== X-Google-Smtp-Source: AKy350ZJiFNHgeszcLJLtls1SDbcilB7bjdmB7/DtYOR+nav6cvhspC+75BvWRo5KUY50AHGBjfyeA== X-Received: by 2002:a19:5208:0:b0:4eb:680:3920 with SMTP id m8-20020a195208000000b004eb06803920mr1392204lfb.40.1679743744158; Sat, 25 Mar 2023 04:29:04 -0700 (PDT) Received: from localhost.localdomain (cdb25.neoplus.adsl.tpnet.pl. [83.30.151.25]) by smtp.gmail.com with ESMTPSA id m30-20020ac24ade000000b004eaf55936eesm1502510lfp.233.2023.03.25.04.29.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Mar 2023 04:29:03 -0700 (PDT) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] arm64: dts: msm8953: Pad regs to 8 digits Date: Sat, 25 Mar 2023 12:28:52 +0100 Message-Id: <20230325112852.18841-4-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230325112852.18841-1-a39.skl@gmail.com> References: <20230325112852.18841-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Follow other dtses and pad regs to 8 digits. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 98 +++++++++++++-------------- 1 file changed, 49 insertions(+), 49 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 0a1bf1058cbf..684668170353 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -350,12 +350,12 @@ soc: soc@0 { rpm_msg_ram: sram@60000 { compatible = "qcom,rpm-msg-ram"; - reg = <0x60000 0x8000>; + reg = <0x00060000 0x8000>; }; hsusb_phy: phy@79000 { compatible = "qcom,msm8953-qusb2-phy"; - reg = <0x79000 0x180>; + reg = <0x00079000 0x180>; #phy-cells = <0>; clocks = <&gcc GCC_USB_PHY_CFG_AHB_CLK>, @@ -378,8 +378,8 @@ rng@e3000 { tsens0: thermal-sensor@4a9000 { compatible = "qcom,msm8953-tsens", "qcom,tsens-v2"; - reg = <0x4a9000 0x1000>, /* TM */ - <0x4a8000 0x1000>; /* SROT */ + reg = <0x004a9000 0x1000>, /* TM */ + <0x004a8000 0x1000>; /* SROT */ #qcom,sensors = <16>; interrupts = , ; @@ -389,12 +389,12 @@ tsens0: thermal-sensor@4a9000 { restart@4ab000 { compatible = "qcom,pshold"; - reg = <0x4ab000 0x4>; + reg = <0x004ab000 0x4>; }; tlmm: pinctrl@1000000 { compatible = "qcom,msm8953-pinctrl"; - reg = <0x1000000 0x300000>; + reg = <0x01000000 0x300000>; interrupts = ; gpio-controller; gpio-ranges = <&tlmm 0 0 142>; @@ -634,7 +634,7 @@ i2c_8_sleep: i2c-8-sleep-state { gcc: clock-controller@1800000 { compatible = "qcom,gcc-msm8953"; - reg = <0x1800000 0x80000>; + reg = <0x01800000 0x80000>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; @@ -654,25 +654,25 @@ gcc: clock-controller@1800000 { tcsr_mutex: hwlock@1905000 { compatible = "qcom,tcsr-mutex"; - reg = <0x1905000 0x20000>; + reg = <0x01905000 0x20000>; #hwlock-cells = <1>; }; tcsr: syscon@1937000 { compatible = "qcom,tcsr-msm8953", "syscon"; - reg = <0x1937000 0x30000>; + reg = <0x01937000 0x30000>; }; tcsr_phy_clk_scheme_sel: syscon@193f044 { compatible = "qcom,tcsr-msm8953", "syscon"; - reg = <0x193f044 0x4>; + reg = <0x0193f044 0x4>; }; mdss: display-subsystem@1a00000 { compatible = "qcom,mdss"; - reg = <0x1a00000 0x1000>, - <0x1ab0000 0x1040>; + reg = <0x01a00000 0x1000>, + <0x01ab0000 0x1040>; reg-names = "mdss_phys", "vbif_phys"; @@ -699,7 +699,7 @@ mdss: display-subsystem@1a00000 { mdp: display-controller@1a01000 { compatible = "qcom,msm8953-mdp5", "qcom,mdp5"; - reg = <0x1a01000 0x89000>; + reg = <0x01a01000 0x89000>; reg-names = "mdp_phys"; interrupt-parent = <&mdss>; @@ -740,7 +740,7 @@ mdp5_intf2_out: endpoint { dsi0: dsi@1a94000 { compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl"; - reg = <0x1a94000 0x400>; + reg = <0x01a94000 0x400>; reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; @@ -792,9 +792,9 @@ dsi0_out: endpoint { dsi0_phy: phy@1a94400 { compatible = "qcom,dsi-phy-14nm-8953"; - reg = <0x1a94400 0x100>, - <0x1a94500 0x300>, - <0x1a94800 0x188>; + reg = <0x01a94400 0x100>, + <0x01a94500 0x300>, + <0x01a94800 0x188>; reg-names = "dsi_phy", "dsi_phy_lane", "dsi_pll"; @@ -810,7 +810,7 @@ dsi0_phy: phy@1a94400 { dsi1: dsi@1a96000 { compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl"; - reg = <0x1a96000 0x400>; + reg = <0x01a96000 0x400>; reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; @@ -859,9 +859,9 @@ dsi1_out: endpoint { dsi1_phy: phy@1a96400 { compatible = "qcom,dsi-phy-14nm-8953"; - reg = <0x1a96400 0x100>, - <0x1a96500 0x300>, - <0x1a96800 0x188>; + reg = <0x01a96400 0x100>, + <0x01a96500 0x300>, + <0x01a96800 0x188>; reg-names = "dsi_phy", "dsi_phy_lane", "dsi_pll"; @@ -878,7 +878,7 @@ dsi1_phy: phy@1a96400 { apps_iommu: iommu@1e00000 { compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v1"; - ranges = <0 0x1e20000 0x20000>; + ranges = <0 0x01e20000 0x20000>; clocks = <&gcc GCC_SMMU_CFG_CLK>, <&gcc GCC_APSS_TCU_ASYNC_CLK>; @@ -914,11 +914,11 @@ iommu-ctx@16000 { spmi_bus: spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; - reg = <0x200f000 0x1000>, - <0x2400000 0x800000>, - <0x2c00000 0x800000>, - <0x3800000 0x200000>, - <0x200a000 0x2100>; + reg = <0x0200f000 0x1000>, + <0x02400000 0x800000>, + <0x02c00000 0x800000>, + <0x03800000 0x200000>, + <0x0200a000 0x2100>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; interrupts = ; @@ -933,7 +933,7 @@ spmi_bus: spmi@200f000 { usb3: usb@70f8800 { compatible = "qcom,msm8953-dwc3", "qcom,dwc3"; - reg = <0x70f8800 0x400>; + reg = <0x070f8800 0x400>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -983,7 +983,7 @@ usb3_dwc3: usb@7000000 { sdhc_1: mmc@7824900 { compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"; - reg = <0x7824900 0x500>, <0x7824000 0x800>; + reg = <0x07824900 0x500>, <0x07824000 0x800>; reg-names = "hc", "core"; interrupts = , @@ -1043,7 +1043,7 @@ opp-384000000 { sdhc_2: mmc@7864900 { compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"; - reg = <0x7864900 0x500>, <0x7864000 0x800>; + reg = <0x07864900 0x500>, <0x07864000 0x800>; reg-names = "hc", "core"; interrupts = , @@ -1098,7 +1098,7 @@ opp-200000000 { uart_0: serial@78af000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x78af000 0x200>; + reg = <0x078af000 0x200>; interrupts = ; clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; @@ -1109,7 +1109,7 @@ uart_0: serial@78af000 { i2c_1: i2c@78b5000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b5000 0x600>; + reg = <0x078b5000 0x600>; interrupts = ; clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>, @@ -1127,7 +1127,7 @@ i2c_1: i2c@78b5000 { i2c_2: i2c@78b6000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b6000 0x600>; + reg = <0x078b6000 0x600>; interrupts = ; clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, @@ -1145,7 +1145,7 @@ i2c_2: i2c@78b6000 { i2c_3: i2c@78b7000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b7000 0x600>; + reg = <0x078b7000 0x600>; interrupts = ; clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, @@ -1162,7 +1162,7 @@ i2c_3: i2c@78b7000 { i2c_4: i2c@78b8000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b8000 0x600>; + reg = <0x078b8000 0x600>; interrupts = ; clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>, @@ -1179,7 +1179,7 @@ i2c_4: i2c@78b8000 { i2c_5: i2c@7af5000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x7af5000 0x600>; + reg = <0x07af5000 0x600>; interrupts = ; clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>, @@ -1196,7 +1196,7 @@ i2c_5: i2c@7af5000 { i2c_6: i2c@7af6000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x7af6000 0x600>; + reg = <0x07af6000 0x600>; interrupts = ; clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>, @@ -1213,7 +1213,7 @@ i2c_6: i2c@7af6000 { i2c_7: i2c@7af7000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x7af7000 0x600>; + reg = <0x07af7000 0x600>; interrupts = ; clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>, @@ -1230,7 +1230,7 @@ i2c_7: i2c@7af7000 { i2c_8: i2c@7af8000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x7af8000 0x600>; + reg = <0x07af8000 0x600>; interrupts = ; clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP2_QUP4_I2C_APPS_CLK>, @@ -1254,13 +1254,13 @@ intc: interrupt-controller@b000000 { apcs: mailbox@b011000 { compatible = "qcom,msm8953-apcs-kpss-global", "syscon"; - reg = <0xb011000 0x1000>; + reg = <0x0b011000 0x1000>; #mbox-cells = <1>; }; timer@b120000 { compatible = "arm,armv7-timer-mem"; - reg = <0xb120000 0x1000>; + reg = <0x0b120000 0x1000>; #address-cells = <0x01>; #size-cells = <0x01>; ranges; @@ -1269,49 +1269,49 @@ frame@b121000 { frame-number = <0>; interrupts = , ; - reg = <0xb121000 0x1000>, - <0xb122000 0x1000>; + reg = <0x0b121000 0x1000>, + <0x0b122000 0x1000>; }; frame@b123000 { frame-number = <1>; interrupts = ; - reg = <0xb123000 0x1000>; + reg = <0x0b123000 0x1000>; status = "disabled"; }; frame@b124000 { frame-number = <2>; interrupts = ; - reg = <0xb124000 0x1000>; + reg = <0x0b124000 0x1000>; status = "disabled"; }; frame@b125000 { frame-number = <3>; interrupts = ; - reg = <0xb125000 0x1000>; + reg = <0x0b125000 0x1000>; status = "disabled"; }; frame@b126000 { frame-number = <4>; interrupts = ; - reg = <0xb126000 0x1000>; + reg = <0x0b126000 0x1000>; status = "disabled"; }; frame@b127000 { frame-number = <5>; interrupts = ; - reg = <0xb127000 0x1000>; + reg = <0x0b127000 0x1000>; status = "disabled"; }; frame@b128000 { frame-number = <6>; interrupts = ; - reg = <0xb128000 0x1000>; + reg = <0x0b128000 0x1000>; status = "disabled"; }; };