From patchwork Mon Mar 27 13:12:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 13189303 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 223D6C76195 for ; Mon, 27 Mar 2023 13:13:07 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pgmeF-0006Fl-N5; Mon, 27 Mar 2023 09:12:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pgmeD-0006Dj-US; Mon, 27 Mar 2023 09:12:30 -0400 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pgmeB-00015c-Si; Mon, 27 Mar 2023 09:12:29 -0400 Received: by mail-pj1-x1034.google.com with SMTP id f6-20020a17090ac28600b0023b9bf9eb63so8753249pjt.5; Mon, 27 Mar 2023 06:12:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679922746; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=vD3clw3JVdGa9oC9XYxYZAunXVlX+f0D0gOjgPJxem8=; b=frqm23H50pHzpkDdXGIIdb+XuAzADNjFe/KETRVqLoL0ZbcuYpOLxU83o3R2DPPa47 68vMRMu6BUmCphPNTW4LCRMiGORryW2xIBykkYVjZeZXBkC1hH9HllRCTaD2g6SsXB85 XYgKAghJaYgz+QIuucAsegIPEDOtBj5Rt7m8y7ax43Legrop8KG6hDfoejMnEz8/pzDE W7zb4eOixRDDTufuDY+wWgG552+21I77sHHHSZmo3n6QGMQDW6KI6S1va8fsq0aKK1Cp OQKP/fxuqrg0Iw4zuP2XBehlWy98dczUUW8FpzClWTU/7s1RxV1Nlefx+OE0ta9HuHwz tUFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679922746; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=vD3clw3JVdGa9oC9XYxYZAunXVlX+f0D0gOjgPJxem8=; b=gWnNhYNWLzh53b/ghjFsOYIIiHG4yONZqEMS2ykuqrR/N7/QZ0G9/Jt1XpacY2CUO6 DrIbj0844vhqRKqKlXGOkjhu90TX3gZ3h00mUinrgoVyI/kzsv7B1oBMMZAENxcFO6Mb 8HLYCMC/UHmpACriAT/B0VY5grnm+LxYNdoMNAbecIt/gyaf34pNndrhJnriQDOiQUzZ 38ry99GgyfqS4GTfaFyHA3paXajl5Du7Euw0UAALGeFotF39gs0RAxQARMRC8FyrNzuH sprbhv40CRZejyDcXTZDvSkb0/zKQvZ/oF0GkQy53MiP4X3I+p2DpjmyJcGjzjxaRiY2 nIZQ== X-Gm-Message-State: AAQBX9fJ//gxAzQnYcdRxp18NkRYHGTLqjbJmNxhRRlIfO7PblK7XaEf pj35ZynONqu5ylEf5kyqOxMvXIZBNvs= X-Google-Smtp-Source: AKy350Z8HUjmwpd8Gp//SNyx2pJ2lIcTRwfqA/GNL9JaVuRXdT5e1b6ogEnu10NKdIkudVBMDkEQJg== X-Received: by 2002:a17:90a:3:b0:233:f786:35ca with SMTP id 3-20020a17090a000300b00233f78635camr12444564pja.35.1679922745663; Mon, 27 Mar 2023 06:12:25 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.221.180.225]) by smtp.gmail.com with ESMTPSA id w12-20020a63f50c000000b0050bcf117643sm17301638pgh.17.2023.03.27.06.12.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 06:12:25 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , qemu-devel@nongnu.org, Fabiano Rosas , Daniel Henrique Barboza Subject: [PATCH v2 1/6] target/ppc: Fix width of some 32-bit SPRs Date: Mon, 27 Mar 2023 23:12:13 +1000 Message-Id: <20230327131218.2721044-1-npiggin@gmail.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=npiggin@gmail.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Some 32-bit SPRs are incorrectly implemented as 64-bits on 64-bit targets. This changes VRSAVE, DSISR, HDSISR, DAWRX0, PIDR, LPIDR, DEXCR, HDEXCR, CTRL, TSCR, MMCRH, and PMC[1-6] from to be 32-bit registers. This only goes by the 32/64 classification in the architecture, it does not try to implement finer details of SPR implementation (e.g., not all bits implemented as simple read/write storage). Signed-off-by: Nicholas Piggin --- target/ppc/cpu_init.c | 18 +++++++++--------- target/ppc/helper_regs.c | 2 +- target/ppc/misc_helper.c | 4 ++-- target/ppc/power8-pmu.c | 2 +- target/ppc/translate.c | 2 +- 5 files changed, 14 insertions(+), 14 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 0ce2e3c91d..5aa0b3f0f1 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5085,8 +5085,8 @@ static void register_book3s_altivec_sprs(CPUPPCState *env) } spr_register_kvm(env, SPR_VRSAVE, "VRSAVE", - &spr_read_generic, &spr_write_generic, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic32, + &spr_read_generic, &spr_write_generic32, KVM_REG_PPC_VRSAVE, 0x00000000); } @@ -5120,7 +5120,7 @@ static void register_book3s_207_dbg_sprs(CPUPPCState *env) spr_register_kvm_hv(env, SPR_DAWRX0, "DAWRX0", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic32, KVM_REG_PPC_DAWRX, 0x00000000); spr_register_kvm_hv(env, SPR_CIABR, "CIABR", SPR_NOACCESS, SPR_NOACCESS, @@ -5376,7 +5376,7 @@ static void register_book3s_ids_sprs(CPUPPCState *env) spr_register_hv(env, SPR_TSCR, "TSCR", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic32, 0x00000000); spr_register_hv(env, SPR_HMER, "HMER", SPR_NOACCESS, SPR_NOACCESS, @@ -5406,7 +5406,7 @@ static void register_book3s_ids_sprs(CPUPPCState *env) spr_register_hv(env, SPR_MMCRC, "MMCRC", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic32, 0x00000000); spr_register_hv(env, SPR_MMCRH, "MMCRH", SPR_NOACCESS, SPR_NOACCESS, @@ -5441,7 +5441,7 @@ static void register_book3s_ids_sprs(CPUPPCState *env) spr_register_hv(env, SPR_HDSISR, "HDSISR", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic32, 0x00000000); spr_register_hv(env, SPR_HRMOR, "HRMOR", SPR_NOACCESS, SPR_NOACCESS, @@ -5665,7 +5665,7 @@ static void register_power7_book4_sprs(CPUPPCState *env) KVM_REG_PPC_ACOP, 0); spr_register_kvm(env, SPR_BOOKS_PID, "PID", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic32, KVM_REG_PPC_PID, 0); #endif } @@ -5730,7 +5730,7 @@ static void register_power10_dexcr_sprs(CPUPPCState *env) { spr_register(env, SPR_DEXCR, "DEXCR", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic32, 0); spr_register(env, SPR_UDEXCR, "DEXCR", @@ -5741,7 +5741,7 @@ static void register_power10_dexcr_sprs(CPUPPCState *env) spr_register_hv(env, SPR_HDEXCR, "HDEXCR", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic32, 0); spr_register(env, SPR_UHDEXCR, "HDEXCR", diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 779e7db513..fb351c303f 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -448,7 +448,7 @@ void register_non_embedded_sprs(CPUPPCState *env) /* Exception processing */ spr_register_kvm(env, SPR_DSISR, "DSISR", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic32, KVM_REG_PPC_DSISR, 0x00000000); spr_register_kvm(env, SPR_DAR, "DAR", SPR_NOACCESS, SPR_NOACCESS, diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index a9bc1522e2..40ddc5c08c 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -190,13 +190,13 @@ void helper_store_dpdes(CPUPPCState *env, target_ulong val) void helper_store_pidr(CPUPPCState *env, target_ulong val) { - env->spr[SPR_BOOKS_PID] = val; + env->spr[SPR_BOOKS_PID] = (uint32_t)val; tlb_flush(env_cpu(env)); } void helper_store_lpidr(CPUPPCState *env, target_ulong val) { - env->spr[SPR_LPIDR] = val; + env->spr[SPR_LPIDR] = (uint32_t)val; /* * We need to flush the TLB on LPID changes as we only tag HV vs diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c index 1381072b9e..64a64865d7 100644 --- a/target/ppc/power8-pmu.c +++ b/target/ppc/power8-pmu.c @@ -272,7 +272,7 @@ void helper_store_pmc(CPUPPCState *env, uint32_t sprn, uint64_t value) { pmu_update_cycles(env); - env->spr[sprn] = value; + env->spr[sprn] = (uint32_t)value; pmc_update_overflow_timer(env, sprn); } diff --git a/target/ppc/translate.c b/target/ppc/translate.c index df324fc7ff..58fa509057 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -413,7 +413,7 @@ void spr_write_generic(DisasContext *ctx, int sprn, int gprn) void spr_write_CTRL(DisasContext *ctx, int sprn, int gprn) { - spr_write_generic(ctx, sprn, gprn); + spr_write_generic32(ctx, sprn, gprn); /* * SPR_CTRL writes must force a new translation block, From patchwork Mon Mar 27 13:12:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 13189306 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 89503C7619A for ; Mon, 27 Mar 2023 13:13:28 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pgmeS-0006MR-H3; Mon, 27 Mar 2023 09:12:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pgmeG-0006Ir-KS; Mon, 27 Mar 2023 09:12:32 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pgmeF-000164-4G; Mon, 27 Mar 2023 09:12:32 -0400 Received: by mail-pl1-x630.google.com with SMTP id f22so4264177plr.0; Mon, 27 Mar 2023 06:12:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679922749; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nyq0pQCVaR7tQ5J0BWrgvGNg57mKGgj/17nqWtHTu0w=; b=NfMUhAGcDPtZhc0wAMeo0Rw+AO5n+bpkAb2N9kmOrNWW5atfBrmp8BJKwHyVwJtivB dMY1TITv6c5/Ei4XyZn4z6RSe/G8ulmYN1fvLfQURVukWSFQfe9JakMtNJaWYw0C+cFQ 4XSfC/uDj9vkJMV5mP+Oc0ZQoszoMi6jMi/5764GbvAsx2kBLAYou650EtlvdCGt9Ci4 /y9dKqnLaruO9lxMHKHKSZCU+9cq6aVW1KOht9DljAQciR56VFYk5gnreoSG2oy139cn DL8HILuVxrHaeqSi1N+eow3BGt/+0V+OHaKqB7OswZd0Rq/zbIF/43pHMgE6evj6Key7 1fFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679922749; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nyq0pQCVaR7tQ5J0BWrgvGNg57mKGgj/17nqWtHTu0w=; b=Cu6rVerXOzNMcg6geOruesssaL5pv6skcoiGqZ5h1w2NKZnH349vcukGjWM6dSA39B 6T1uDiBeRy5cbQZLBxWSaBsRTZUbbdk48Vymfy4/mi8PqMaC7p332Qd4UB0FJri7S1LR /4VEz9puRXo4mLo0Yso7uiZxVzEqOFcwNgpVdwPQGZ7p/jE42+jVQFP/+TYJZXjBX/nW PYE3JzGlemFE0Tv7YFt+lN9g2FolcNMxcief+vPP+gVm1SjKvncor540/Xab15gZ4hEJ iSBcafYjX+wok5R7pOBa4Ftxze0rtMrqXuJeTck9+8ZkZAhBN2qglDzDYnAKGVw8Zqr/ Qabg== X-Gm-Message-State: AAQBX9eqhqCFQ2QLHPhQyscgEmJeAKq9yR3670a7+Gybyn008PK3bLQY WDK9wjpKj9BMyJmhy4yrdZ8n4vqC6gc= X-Google-Smtp-Source: AKy350bpwSXdF8owxT8Xkt/GzSRN4dHHuZ2aljcEWwqi0mIcfhUQxksl3Q6RZ1PE+o+m1ej0Rltinw== X-Received: by 2002:a17:902:e749:b0:1a2:19c1:a952 with SMTP id p9-20020a170902e74900b001a219c1a952mr14320352plf.61.1679922748907; Mon, 27 Mar 2023 06:12:28 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.221.180.225]) by smtp.gmail.com with ESMTPSA id w12-20020a63f50c000000b0050bcf117643sm17301638pgh.17.2023.03.27.06.12.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 06:12:28 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , qemu-devel@nongnu.org, Fabiano Rosas , Daniel Henrique Barboza Subject: [PATCH v2 2/6] target/ppc: Better CTRL SPR implementation Date: Mon, 27 Mar 2023 23:12:14 +1000 Message-Id: <20230327131218.2721044-2-npiggin@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327131218.2721044-1-npiggin@gmail.com> References: <20230327131218.2721044-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=npiggin@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The CTRL register is able to write bit zero, and that is reflected in a bit field in the register that reflects the state of all threads in the core. TCG does not implement SMT, so this just requires mirroring that bit into the first bit of the thread state field. Signed-off-by: Nicholas Piggin --- target/ppc/translate.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 58fa509057..d699acb3d0 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -413,7 +413,14 @@ void spr_write_generic(DisasContext *ctx, int sprn, int gprn) void spr_write_CTRL(DisasContext *ctx, int sprn, int gprn) { - spr_write_generic32(ctx, sprn, gprn); + /* This does not implement >1 thread */ + TCGv t0 = tcg_temp_new(); + TCGv t1 = tcg_temp_new(); + tcg_gen_extract_tl(t0, cpu_gpr[gprn], 0, 1); /* Extract RUN field */ + tcg_gen_shli_tl(t1, t0, 8); /* Duplicate the bit in TS */ + tcg_gen_or_tl(t1, t1, t0); + gen_store_spr(sprn, t1); + spr_store_dump_spr(sprn); /* * SPR_CTRL writes must force a new translation block, From patchwork Mon Mar 27 13:12:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 13189308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D884C76195 for ; Mon, 27 Mar 2023 13:13:54 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pgmeY-0006Td-Mk; Mon, 27 Mar 2023 09:12:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pgmeN-0006MK-1l; Mon, 27 Mar 2023 09:12:39 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pgmeI-00016X-4v; Mon, 27 Mar 2023 09:12:35 -0400 Received: by mail-pg1-x531.google.com with SMTP id d22so5113795pgw.2; Mon, 27 Mar 2023 06:12:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679922752; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qa0vcpWHUsucp4ekiEDRDxADCO2tmJt2k/q/xtqrpbk=; b=SiU0tP50hK232SAW8JVk7eoUT/GazfvhbWoaR6MALoFthkPN1veaNuwqkzv2PmRpd2 HbTiG/sPUgjzF+fX9p3lX9VxuytZbUVy+HCMQz71AcjwGvu67tmhJz+dqq6Pw++j7AEk WiDQCAfr7h4+uScnSOeXv8PYz+3CANlzduyzOgJzt/MfZX825bIo4uaxJq/odvIZGza0 GskvnAMZJWj5gPTaTOPdaQOVktYad8iN7nYeDRe+4Iviv+q6/qn6mlv+h6ZgOTiKa4m2 Colhh2qAsUgZtKQDG47+twDJVyVZ2uIm5xA9DpdYmpdV//4iF7t+ogTvYIlSpxRntArc 3CjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679922752; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qa0vcpWHUsucp4ekiEDRDxADCO2tmJt2k/q/xtqrpbk=; b=S7myz7yUkyaTTg/qMolMepNLNPN3C+2jrfx6Pr//QpxzIhvcOxq3dsF42BONibeLUC hW380unZndIIoWPaSSUzhSicBAfjx8ugUNYlxTg+fcuHiTXmgPThb4llMCujIRd9FqNO RrtY0ey1HbIdlt4x+Tntqwu9RsYamS7vowYQ5dSLepWUvoxdWLxMNhKLR+Cowl5QzZcu McEHsyK22fNGX+t39IXHogbT/Hxsg+f1ibmn/UQdwxHXoTibSNHBSrR0gUHZoJFOXloR 8zYGbQv3h50Q6x/pmXP17qqGz8XjQe4keBnxehbZtb2ZftHxlz1cN3fOtzPP4pZfx4/E flBA== X-Gm-Message-State: AAQBX9eyoydupBQY71Q3/DRqIWFw8gQ7di8WronJPP5XBI00RF9YAk7s 0q+dUUbKEiJ2O231hXzy7eT5E9q1fIc= X-Google-Smtp-Source: AKy350YrmGsB18c/eGH+uV77F+kmtf7A+PtwZfOC9eDSYM7hi5wISyqMjvi84Ytto+Vd2opRQiM4Yw== X-Received: by 2002:a62:65c6:0:b0:625:d630:4e1b with SMTP id z189-20020a6265c6000000b00625d6304e1bmr8615654pfb.31.1679922751949; Mon, 27 Mar 2023 06:12:31 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.221.180.225]) by smtp.gmail.com with ESMTPSA id w12-20020a63f50c000000b0050bcf117643sm17301638pgh.17.2023.03.27.06.12.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 06:12:31 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , qemu-devel@nongnu.org, Fabiano Rosas , Daniel Henrique Barboza Subject: [PATCH v2 3/6] target/ppc: Fix instruction loading endianness in alignment interrupt Date: Mon, 27 Mar 2023 23:12:15 +1000 Message-Id: <20230327131218.2721044-3-npiggin@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327131218.2721044-1-npiggin@gmail.com> References: <20230327131218.2721044-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=npiggin@gmail.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org powerpc ifetch endianness depends on MSR[LE] so it has to byteswap after cpu_ldl_code(). This corrects DSISR bits in alignment interrupts when running in little endian mode. Signed-off-by: Nicholas Piggin Reviewed-by: Fabiano Rosas --- Since v1: - Removed big endian ifdef [Fabiano review] - Acaually use need_byswap helper. target/ppc/excp_helper.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 287659c74d..07729967b5 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -133,6 +133,24 @@ static void dump_hcall(CPUPPCState *env) env->nip); } +/* Return true iff byteswap is needed in a scalar memop */ +static inline bool need_byteswap(CPUArchState *env) +{ + /* SOFTMMU builds TARGET_BIG_ENDIAN. Need to swap when MSR[LE] is set */ + return !!(env->msr & ((target_ulong)1 << MSR_LE)); +} + +static uint32_t ppc_ldl_code(CPUArchState *env, abi_ptr addr) +{ + uint32_t insn = cpu_ldl_code(env, addr); + + if (need_byteswap(env)) { + insn = bswap32(insn); + } + + return insn; +} + static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp) { const char *es; @@ -3097,7 +3115,7 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, /* Restore state and reload the insn we executed, for filling in DSISR. */ cpu_restore_state(cs, retaddr); - insn = cpu_ldl_code(env, env->nip); + insn = ppc_ldl_code(env, env->nip); switch (env->mmu_model) { case POWERPC_MMU_SOFT_4xx: From patchwork Mon Mar 27 13:12:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 13189305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 668ADC761A6 for ; Mon, 27 Mar 2023 13:13:20 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pgmeZ-0006Ug-MJ; Mon, 27 Mar 2023 09:12:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pgmeS-0006N4-9s; Mon, 27 Mar 2023 09:12:44 -0400 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pgmeN-000171-4a; Mon, 27 Mar 2023 09:12:43 -0400 Received: by mail-pl1-x62f.google.com with SMTP id o2so8388572plg.4; Mon, 27 Mar 2023 06:12:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679922755; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xi1uYvklRj2SMeAqNt1YnuyX67YxXB8cWYLUFKUd5bs=; b=SEyo+0bxxj8isMmhluV5sk2P+BxTjBbnPT3qNX0U5fUZafeit352AFN+ko1wHFWAlm yw4bNGxt/ltcTnWYj8dyvFJ1mZAUv9S4EqL0zGFRDG7Z98kUZPQmfaJNcsQI25hi6GZ6 GU0ioYG3QxZpvqbnQJSBf6Jj6n987GNPaosGGAfF7ik04vtO53yinORM4iiEQ5zej9Mx d0z3Pft2nxhFWj8BxIdHJZ1s+0/ZPq+EM86acUHd+WoEVSqIkOLx9joV/wy+80DNRE3G tayT7pdlIWdlthOzA8nUiTwh89+e8L4SDJEtgDhFMrZdNEKYUUzH6jH7+5gqZmA4eEv4 I4Kw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679922755; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xi1uYvklRj2SMeAqNt1YnuyX67YxXB8cWYLUFKUd5bs=; b=IbT1a3b39IquI1mVCnCidZXuzRiyWrJD+RqNogwXg8oN/9ne+gXopuEYEIvtUuZ18E LYK7i7disH0WKRNAX9AVfu6tcTPbM+ahUSwROF/KceZX/qlFk9fK1lFWOaTqci/1Tkr6 PaDBKv7j+dZ/sJ7UOG8Lz5PZFoUoL50FjAI9t1Zjdq7nKmtz/aSl33Inw4G/sq74IxTW scDSdSNqWw8JsSnFpjHKHgRQlVKsRAhL6nRdCPKl2jFVo+xvVVrh6cnPaVF2TN6AfDXm hcgKZPBumIfSnNFvTFrcJlNV/NCMXOgYyOhAnusmlNoNpqjs4d9PBBedK/lPBAzuhKFC pZKA== X-Gm-Message-State: AO0yUKXQ7zshdCHZCbEI3kymvE/OZ5q9smJ9e3p/oRjsFtRv/1XAQLHB RLZbWU41JrdBehJimpHNNCfFx9B+TWY= X-Google-Smtp-Source: AK7set/tKoe2tIn67ymm1oljl5nSFtKgm0a35661xTdX77ExKGepQg2T53zAhfH4j9krtk7/Qw1Xog== X-Received: by 2002:a05:6a20:4d92:b0:da:aaec:9455 with SMTP id gj18-20020a056a204d9200b000daaaec9455mr10679187pzb.43.1679922754992; Mon, 27 Mar 2023 06:12:34 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.221.180.225]) by smtp.gmail.com with ESMTPSA id w12-20020a63f50c000000b0050bcf117643sm17301638pgh.17.2023.03.27.06.12.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 06:12:34 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , qemu-devel@nongnu.org, Fabiano Rosas , Daniel Henrique Barboza Subject: [PATCH v2 4/6] target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward Date: Mon, 27 Mar 2023 23:12:16 +1000 Message-Id: <20230327131218.2721044-4-npiggin@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327131218.2721044-1-npiggin@gmail.com> References: <20230327131218.2721044-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=npiggin@gmail.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This optional behavior was removed from the ISA in v3.0, see Summary of Changes preface: Data Storage Interrupt Status Register for Alignment Interrupt: Simplifies the Alignment interrupt by remov- ing the Data Storage Interrupt Status Register (DSISR) from the set of registers modified by the Alignment interrupt. Signed-off-by: Nicholas Piggin Reviewed-by: Fabiano Rosas --- Since v1: - Use insns_flags instead of excp_model [Fabiano review] target/ppc/excp_helper.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 07729967b5..6ac003bcd5 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1449,13 +1449,16 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp) break; } case POWERPC_EXCP_ALIGN: /* Alignment exception */ - /* Get rS/rD and rA from faulting opcode */ - /* - * Note: the opcode fields will not be set properly for a - * direct store load/store, but nobody cares as nobody - * actually uses direct store segments. - */ - env->spr[SPR_DSISR] |= (env->error_code & 0x03FF0000) >> 16; + /* Optional DSISR update was removed from ISA v3.0 */ + if (!(env->insns_flags2 & PPC2_ISA300)) { + /* Get rS/rD and rA from faulting opcode */ + /* + * Note: the opcode fields will not be set properly for a + * direct store load/store, but nobody cares as nobody + * actually uses direct store segments. + */ + env->spr[SPR_DSISR] |= (env->error_code & 0x03FF0000) >> 16; + } break; case POWERPC_EXCP_PROGRAM: /* Program exception */ switch (env->error_code & ~0xF) { From patchwork Mon Mar 27 13:12:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 13189307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 79898C7619A for ; Mon, 27 Mar 2023 13:13:52 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pgmea-0006Uy-19; Mon, 27 Mar 2023 09:12:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pgmeQ-0006Mu-3D; Mon, 27 Mar 2023 09:12:44 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pgmeO-00017S-HS; Mon, 27 Mar 2023 09:12:41 -0400 Received: by mail-pj1-x102f.google.com with SMTP id qe8-20020a17090b4f8800b0023f07253a2cso8751630pjb.3; Mon, 27 Mar 2023 06:12:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679922758; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9gSor7mkAJ6QbuhewJCouEkbM5T6yFksX9iZ2HrNk2I=; b=hQNekoqrkzWS+n9dJoY1bttMtyPHgcN7emb6/xgiSU1gWd66F9k8UzCe2fu3B6ZRu7 BZmB2R9IUrw6MCcqfKbXldZ/VfVc7dSiFDXlBTNaqELHfAOQKsUZM7M7FAywd5bGm/+h k8Xf/ZZORIKneMjRiz3q37VgRo18OxtGU5SFrghYSf3M4JDzGCDEAQyAAl072jjTyLm6 Iv3y6ZpqacreWdxzf/iCVUXPtjoRx1FCiAnNukonMcA8bVeqp6PCCXj9nQWG0EvtU4nh wicVbD/4t4xFUnVuGUA3UQLTp38QiLnDKpfFI5LL8AXt5eL2brIoKlMUmYSP/NhuxE64 fcRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679922758; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9gSor7mkAJ6QbuhewJCouEkbM5T6yFksX9iZ2HrNk2I=; b=bKQPbqY7KSNOH8ihD2b+WKYNJvWeQJCKAqiHGMECB7EnJYr8Vb/8M9RI3ZtkMUkCqf +6dVnxQAc6dYTQWbz8Fb0AXo6B9d8W911cOU7RdhR+5V57Pr5B+uTsyShLFHbjzc26nF NkhtV+2NNjqcusxBk7fvDNp3iikDBpnW2SgOVX8HodOt6y4ZggcFilyn2CfAG1kWxtqk DAYEFtT3W/3zFsl5hFjI5sGe04UI1zXZMJm1xJgdDzubfNrXtFHXmlBIKsUJLgvD8VNi 4HMu4PmLfelPusXi1KnOma4PEGahKsSYLkVmis2Fw9OGHSjyKiZZnlZCg3mGi3pbCqQM +89g== X-Gm-Message-State: AO0yUKWVyW9z3TIRESU4RyUwYNrC3XILXaNamgtMVLG57RDLv3Ptsimb qd/puNSiBfu9JnfBvdFGJG7T2jHJrAk= X-Google-Smtp-Source: AK7set+pWO/sJ2C2HR/t0c6ZuSRjiCUz6Bhg9gq3UaRlo5fo1ubrCKyU58+FhKSZy95z49gLKhJllQ== X-Received: by 2002:a05:6a20:811a:b0:d7:3b62:3cf with SMTP id g26-20020a056a20811a00b000d73b6203cfmr10289553pza.54.1679922758513; Mon, 27 Mar 2023 06:12:38 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.221.180.225]) by smtp.gmail.com with ESMTPSA id w12-20020a63f50c000000b0050bcf117643sm17301638pgh.17.2023.03.27.06.12.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 06:12:37 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , qemu-devel@nongnu.org, Fabiano Rosas , Daniel Henrique Barboza Subject: [PATCH v2 5/6] target/ppc: Add SRR1 prefix indication to interrupt handlers Date: Mon, 27 Mar 2023 23:12:17 +1000 Message-Id: <20230327131218.2721044-5-npiggin@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327131218.2721044-1-npiggin@gmail.com> References: <20230327131218.2721044-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=npiggin@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org ISA v3.1 introduced prefix instructions. Among the changes, various synchronous interrupts report whether they were caused by a prefix instruction in (H)SRR1. Signed-off-by: Nicholas Piggin Reviewed-by: Fabiano Rosas --- Since v1: - Use insns_flags instead of excp_model [Fabiano review] target/ppc/excp_helper.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 6ac003bcd5..4e119c4dfc 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1346,12 +1346,21 @@ static bool books_vhyp_handles_hv_excp(PowerPCCPU *cpu) return false; } +static bool is_prefix_excp(CPUPPCState *env, uint32_t insn) +{ + if (!(env->insns_flags2 & PPC2_ISA310)) { + return false; + } + return ((insn & 0xfc000000) == 0x04000000); +} + static void powerpc_excp_books(PowerPCCPU *cpu, int excp) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; target_ulong msr, new_msr, vector; int srr0, srr1, lev = -1; + uint32_t insn = 0; /* new srr1 value excluding must-be-zero bits */ msr = env->msr & ~0x783f0000ULL; @@ -1390,6 +1399,29 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp) vector |= env->excp_prefix; + switch (excp) { + case POWERPC_EXCP_MCHECK: + case POWERPC_EXCP_DSI: + case POWERPC_EXCP_DSEG: + case POWERPC_EXCP_ALIGN: + case POWERPC_EXCP_PROGRAM: + case POWERPC_EXCP_FPU: + case POWERPC_EXCP_TRACE: + case POWERPC_EXCP_HDSI: + case POWERPC_EXCP_HV_EMU: + case POWERPC_EXCP_VPU: + case POWERPC_EXCP_VSXU: + case POWERPC_EXCP_FU: + case POWERPC_EXCP_HV_FU: + insn = ppc_ldl_code(env, env->nip); + if (is_prefix_excp(env, insn)) { + msr |= PPC_BIT(34); + } + break; + default: + break; + } + switch (excp) { case POWERPC_EXCP_MCHECK: /* Machine check exception */ if (!FIELD_EX64(env->msr, MSR, ME)) { From patchwork Mon Mar 27 13:12:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 13189304 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B6B8C7619A for ; Mon, 27 Mar 2023 13:13:12 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pgmeb-0006X4-5b; Mon, 27 Mar 2023 09:12:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pgmeU-0006R1-IX; Mon, 27 Mar 2023 09:12:49 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pgmeS-00018D-CA; Mon, 27 Mar 2023 09:12:46 -0400 Received: by mail-pj1-x1036.google.com with SMTP id fy10-20020a17090b020a00b0023b4bcf0727so8791367pjb.0; Mon, 27 Mar 2023 06:12:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679922762; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=avdBuU0PTVH+NPw2m7B7nROfO4MKkIro1XNd6foKyk0=; b=iLwQQOeVQytIj5NLPXUNYbVKFD9b9wJFT2NUr8f0pBENRHafXU1Z4jd3klNv5MvbyF kj36LmUX3P9cRLKYZrn3eIsMFvlxZ9UXsfo80vKt05s9hfrJrDXXUqztrZwUd4hZl//K cvsgbfVuGL/xjo0BkOUMRamqwXQcdAOIMhT+dcd6vyZRkQj4WrxAXeU+Hqf5C8nYfQZI opVe3/KrW0LB5mqQXjYRVHKTPKu2KQiEupBKwABheeIUepQcgBBFFGbbDQbbdhQpNp4p HkXY6S2JNjUYxwOW+vYxLzwn+ZKeVO6Fa7DsPvRxrtvsK35xm9yLrEJ6VIgkZNrGAQNM jJnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679922762; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=avdBuU0PTVH+NPw2m7B7nROfO4MKkIro1XNd6foKyk0=; b=yb/4FYf2k/zVSTldr9O7exI+Vnsvvkk0poR/uUZdQbiUu/Aph+63f/Vfke5G/Ch2Hw KJ1qUFaf4CFAW6Io1OW8IIOnKtlnp3CGc200e38xrGc5wVGTBPoWMqUiFR1+4eAMUKsU E6j2nluNDaB7Ek1z2zt0eFK93Dlnqp2mEOhFts6zTpserR4K83swQOT4RMGXQlD95CeP cty5N630N8LiUkcNah3RkbE+g3TiTy6mKvLhZhh2AZn6vYyiJHOWvYI1l8J7rsinw3t1 HZL0++uA5Zi8iucF6vsiGGc/FNnuTWc5ivqlvv5lf9u4kHebii/PcTgdHRdE6hyDthwB VmQQ== X-Gm-Message-State: AAQBX9fuVTsJblFzN3YlysvrPtaWdnYmk0S0hIBr0foeW2n7RKwKnhZP EAqhARxRqAyEqHsC2/5i0gag0Nj7tVE= X-Google-Smtp-Source: AKy350YWlg1dMCmlTkpvPr0Ws6ZCmdpkZmXQKny6IN3eV0xdYSTgmsi/4k1k7Zfe8vNh+QKOSms+iA== X-Received: by 2002:a17:903:32d1:b0:1a1:80ea:4352 with SMTP id i17-20020a17090332d100b001a180ea4352mr12580664plr.0.1679922761688; Mon, 27 Mar 2023 06:12:41 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.221.180.225]) by smtp.gmail.com with ESMTPSA id w12-20020a63f50c000000b0050bcf117643sm17301638pgh.17.2023.03.27.06.12.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 06:12:41 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , qemu-devel@nongnu.org, Fabiano Rosas , Daniel Henrique Barboza Subject: [PATCH v2 6/6] target/ppc: Implement HEIR SPR Date: Mon, 27 Mar 2023 23:12:18 +1000 Message-Id: <20230327131218.2721044-6-npiggin@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327131218.2721044-1-npiggin@gmail.com> References: <20230327131218.2721044-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=npiggin@gmail.com; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The hypervisor emulation assistance interrupt modifies HEIR to contain the value of the instruction which caused the exception. Signed-off-by: Nicholas Piggin --- target/ppc/cpu.h | 1 + target/ppc/cpu_init.c | 23 +++++++++++++++++++++++ target/ppc/excp_helper.c | 12 +++++++++++- 3 files changed, 35 insertions(+), 1 deletion(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 557d736dab..8c4a203ecb 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1653,6 +1653,7 @@ void ppc_compat_add_property(Object *obj, const char *name, #define SPR_HMER (0x150) #define SPR_HMEER (0x151) #define SPR_PCR (0x152) +#define SPR_HEIR (0x153) #define SPR_BOOKE_LPIDR (0x152) #define SPR_BOOKE_TCR (0x154) #define SPR_BOOKE_TLB0PS (0x158) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 5aa0b3f0f1..ff73be1812 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -1629,6 +1629,7 @@ static void register_8xx_sprs(CPUPPCState *env) * HSRR0 => SPR 314 (Power 2.04 hypv) * HSRR1 => SPR 315 (Power 2.04 hypv) * LPIDR => SPR 317 (970) + * HEIR => SPR 339 (Power 2.05 hypv) (64-bit reg from 3.1) * EPR => SPR 702 (Power 2.04 emb) * perf => 768-783 (Power 2.04) * perf => 784-799 (Power 2.04) @@ -5522,6 +5523,24 @@ static void register_power6_common_sprs(CPUPPCState *env) 0x00000000); } +static void register_HEIR32_spr(CPUPPCState *env) +{ + spr_register_hv(env, SPR_HEIR, "HEIR", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic32, + 0x00000000); +} + +static void register_HEIR64_spr(CPUPPCState *env) +{ + spr_register_hv(env, SPR_HEIR, "HEIR", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); +} + static void register_power8_tce_address_control_sprs(CPUPPCState *env) { spr_register_kvm(env, SPR_TAR, "TAR", @@ -5950,6 +5969,7 @@ static void init_proc_POWER7(CPUPPCState *env) register_power5p_ear_sprs(env); register_power5p_tb_sprs(env); register_power6_common_sprs(env); + register_HEIR32_spr(env); register_power6_dbg_sprs(env); register_power7_book4_sprs(env); @@ -6072,6 +6092,7 @@ static void init_proc_POWER8(CPUPPCState *env) register_power5p_ear_sprs(env); register_power5p_tb_sprs(env); register_power6_common_sprs(env); + register_HEIR32_spr(env); register_power6_dbg_sprs(env); register_power8_tce_address_control_sprs(env); register_power8_ids_sprs(env); @@ -6234,6 +6255,7 @@ static void init_proc_POWER9(CPUPPCState *env) register_power5p_ear_sprs(env); register_power5p_tb_sprs(env); register_power6_common_sprs(env); + register_HEIR32_spr(env); register_power6_dbg_sprs(env); register_power8_tce_address_control_sprs(env); register_power8_ids_sprs(env); @@ -6409,6 +6431,7 @@ static void init_proc_POWER10(CPUPPCState *env) register_power5p_ear_sprs(env); register_power5p_tb_sprs(env); register_power6_common_sprs(env); + register_HEIR64_spr(env); register_power6_dbg_sprs(env); register_power8_tce_address_control_sprs(env); register_power8_ids_sprs(env); diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 4e119c4dfc..84f222ba1d 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1596,13 +1596,23 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ case POWERPC_EXCP_SDOOR_HV: /* Hypervisor Doorbell interrupt */ - case POWERPC_EXCP_HV_EMU: case POWERPC_EXCP_HVIRT: /* Hypervisor virtualization */ srr0 = SPR_HSRR0; srr1 = SPR_HSRR1; new_msr |= (target_ulong)MSR_HVB; new_msr |= env->msr & ((target_ulong)1 << MSR_RI); break; + case POWERPC_EXCP_HV_EMU: + env->spr[SPR_HEIR] = insn; + if (is_prefix_excp(env, insn)) { + uint32_t insn2 = ppc_ldl_code(env, env->nip + 4); + env->spr[SPR_HEIR] |= (uint64_t)insn2 << 32; + } + srr0 = SPR_HSRR0; + srr1 = SPR_HSRR1; + new_msr |= (target_ulong)MSR_HVB; + new_msr |= env->msr & ((target_ulong)1 << MSR_RI); + break; case POWERPC_EXCP_VPU: /* Vector unavailable exception */ case POWERPC_EXCP_VSXU: /* VSX unavailable exception */ case POWERPC_EXCP_FU: /* Facility unavailable exception */