From patchwork Mon Mar 27 15:04:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 13189518 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7AA21C6FD1D for ; Mon, 27 Mar 2023 15:06:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References:Message-ID :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4VUzeF/E60RKOm0u+3DiN1xrbp36/zbPT3wsTLitibM=; b=zuu1/xZYTHsR3K sh830vwCd+HUViZ81tozAXZ0IbirwJpswUUXqvgeB7GTTTe+ifi1P75OrL7q5TcFxkWaavQuN74Nj xmHIN5m56HUlQK3x7sPHGtJzK5wS7dapOYYULaTU01f4263GI/PmJFV1GE0AcmhB8BOTHpry5XPP4 0hZ1Q1Suu8Qv3fvpeo34cwfzSBiN5gFAFE8+00p9fzweVLCjR/LCSbTRiqbrDdWiTHlg8Q04SiHRE /Zs39bD4d3cgPEt3fU0tSQKwFFFLmJPSIM6fEEdsiQk1oluHDp384HX2GlmOIRq0YV+KbasoEROYK lQliZEUDB86haUpyjx5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pgoPK-00BRQq-0E; Mon, 27 Mar 2023 15:05:14 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pgoP1-00BRIM-1c for linux-arm-kernel@lists.infradead.org; Mon, 27 Mar 2023 15:04:57 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32RF4afY068463; Mon, 27 Mar 2023 10:04:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1679929476; bh=bYvDC0LkZ7byc6AJsJjUZacTMv84gCVdtic17FdtJLk=; h=From:Date:Subject:References:In-Reply-To:To:CC; b=bONDLQ5vxkqW8qD9KfddYzwG+WqVzydZ6SvIcGJCc6tls12OyStB4tR/phH+xsy9O BtdDvM6Ee9iq9musliiT5Qhw/TVzZoFVpzAF+flselaSxIUnfpZpEHq8/LQKAGbu7v e9uozgoU7kk6VmSsy+7NFZ5OCtdl7HRM+AhIkuv8= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32RF4ax1010429 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 27 Mar 2023 10:04:36 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Mon, 27 Mar 2023 10:04:36 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Mon, 27 Mar 2023 10:04:36 -0500 Received: from [127.0.1.1] (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32RF4VTk080647; Mon, 27 Mar 2023 10:04:34 -0500 From: Vignesh Raghavendra Date: Mon, 27 Mar 2023 20:34:26 +0530 Subject: [PATCH RFC v2 1/2] irqchip: irq-ti-sci-inta: Allocates VINTs at probe MIME-Version: 1.0 Message-ID: <20230327-irq-affinity-upstream-v2-1-1474e518f1cb@ti.com> References: <20230327-irq-affinity-upstream-v2-0-1474e518f1cb@ti.com> In-Reply-To: <20230327-irq-affinity-upstream-v2-0-1474e518f1cb@ti.com> To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Thomas Gleixner , Marc Zyngier CC: , , Vignesh Raghavendra X-Mailer: b4 0.12.2 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230327_080455_621589_F0B58AEE X-CRM114-Status: GOOD ( 25.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Simplify driver by allocating all VINTs at probe instead of allocating on IRQ request. This will allow dedicating few VINTs as direct IRQs without aggregation in future. Signed-off-by: Vignesh Raghavendra --- drivers/irqchip/irq-ti-sci-inta.c | 144 +++++----- 1 file changed, 67 insertions(+), 77 deletions(-) diff --git a/drivers/irqchip/irq-ti-sci-inta.c b/drivers/irqchip/irq-ti-sci-inta.c index a6ecc53d055c..a3a22edbe0f0 100644 --- a/drivers/irqchip/irq-ti-sci-inta.c +++ b/drivers/irqchip/irq-ti-sci-inta.c @@ -96,6 +96,7 @@ struct ti_sci_inta_vint_desc { * device identifier in place of the source device * identifier to let sysfw know where it has to program the * Global Event number. + * @num_vints: Number of VINT lines allocated to this IA. */ struct ti_sci_inta_irq_domain { const struct ti_sci_handle *sci; @@ -110,6 +111,7 @@ struct ti_sci_inta_irq_domain { int unmapped_cnt; u16 *unmapped_dev_ids; + int num_vints; }; #define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \ @@ -197,12 +199,12 @@ static int ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain *inta, } /** - * ti_sci_inta_alloc_parent_irq() - Allocate parent irq to Interrupt aggregator + * ti_sci_inta_alloc_parent_irqs() - Allocate parent irqs to Interrupt aggregator * @domain: IRQ domain corresponding to Interrupt Aggregator * * Return 0 if all went well else corresponding error value. */ -static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_domain *domain) +static int ti_sci_inta_alloc_parent_irqs(struct irq_domain *domain) { struct ti_sci_inta_irq_domain *inta = domain->host_data; struct ti_sci_inta_vint_desc *vint_desc; @@ -211,61 +213,69 @@ static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_dom unsigned int parent_virq; int p_hwirq, ret; u16 vint_id; + int i; - vint_id = ti_sci_get_free_resource(inta->vint); - if (vint_id == TI_SCI_RESOURCE_NULL) - return ERR_PTR(-EINVAL); - - p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id); - if (p_hwirq < 0) { - ret = p_hwirq; - goto free_vint; - } + parent_node = of_irq_find_parent(dev_of_node(&inta->pdev->dev)); + parent_fwspec.fwnode = of_node_to_fwnode(parent_node); - vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL); - if (!vint_desc) { - ret = -ENOMEM; - goto free_vint; - } + for (i = 0; i < inta->num_vints; i++) { + vint_id = ti_sci_get_free_resource(inta->vint); + if (vint_id == TI_SCI_RESOURCE_NULL) + break; - vint_desc->domain = domain; - vint_desc->vint_id = vint_id; - INIT_LIST_HEAD(&vint_desc->list); + p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id); + if (p_hwirq < 0) { + ret = p_hwirq; + goto free_vint; + } - parent_node = of_irq_find_parent(dev_of_node(&inta->pdev->dev)); - parent_fwspec.fwnode = of_node_to_fwnode(parent_node); + vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL); + if (!vint_desc) { + ret = -ENOMEM; + goto free_vint; + } - if (of_device_is_compatible(parent_node, "arm,gic-v3")) { - /* Parent is GIC */ - parent_fwspec.param_count = 3; - parent_fwspec.param[0] = 0; - parent_fwspec.param[1] = p_hwirq - 32; - parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH; - } else { - /* Parent is Interrupt Router */ - parent_fwspec.param_count = 1; - parent_fwspec.param[0] = p_hwirq; - } + INIT_LIST_HEAD(&vint_desc->list); + vint_desc->domain = domain; + vint_desc->vint_id = vint_id; + + if (of_device_is_compatible(parent_node, "arm,gic-v3")) { + /* Parent is GIC */ + parent_fwspec.param_count = 3; + parent_fwspec.param[0] = 0; + parent_fwspec.param[1] = p_hwirq - 32; + parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH; + } else { + /* Parent is Interrupt Router */ + parent_fwspec.param_count = 1; + parent_fwspec.param[0] = p_hwirq; + } - parent_virq = irq_create_fwspec_mapping(&parent_fwspec); - if (parent_virq == 0) { - dev_err(&inta->pdev->dev, "Parent IRQ allocation failed\n"); - ret = -EINVAL; - goto free_vint_desc; + parent_virq = irq_create_fwspec_mapping(&parent_fwspec); + if (parent_virq == 0) { + dev_dbg(&inta->pdev->dev, "Parent IRQ allocation failed\n"); + /* + * Certain versions of firmwares don't have + * enough INTR lines allocated to match number + * of VINTs, hence don't error out to maintain + * backward compatibility. + */ + ret = 0; + goto free_vint_desc; + } + vint_desc->parent_virq = parent_virq; + list_add_tail(&vint_desc->list, &inta->vint_list); + irq_set_chained_handler_and_data(vint_desc->parent_virq, + ti_sci_inta_irq_handler, vint_desc); } - vint_desc->parent_virq = parent_virq; - list_add_tail(&vint_desc->list, &inta->vint_list); - irq_set_chained_handler_and_data(vint_desc->parent_virq, - ti_sci_inta_irq_handler, vint_desc); - - return vint_desc; + return 0; free_vint_desc: kfree(vint_desc); free_vint: ti_sci_release_resource(inta->vint, vint_id); - return ERR_PTR(ret); + return ret; } /** @@ -335,22 +345,14 @@ static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_irq(struct irq_domain *d MAX_EVENTS_PER_VINT); if (free_bit != MAX_EVENTS_PER_VINT) { set_bit(free_bit, vint_desc->event_map); - goto alloc_event; + break; } } - - /* No free bits available. Allocate a new vint */ - vint_desc = ti_sci_inta_alloc_parent_irq(domain); - if (IS_ERR(vint_desc)) { - event_desc = ERR_CAST(vint_desc); + if (free_bit == MAX_EVENTS_PER_VINT) { + event_desc = NULL; goto unlock; } - free_bit = find_first_zero_bit(vint_desc->event_map, - MAX_EVENTS_PER_VINT); - set_bit(free_bit, vint_desc->event_map); - -alloc_event: event_desc = ti_sci_inta_alloc_event(vint_desc, free_bit, hwirq); if (IS_ERR(event_desc)) clear_bit(free_bit, vint_desc->event_map); @@ -360,22 +362,6 @@ static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_irq(struct irq_domain *d return event_desc; } -/** - * ti_sci_inta_free_parent_irq() - Free a parent irq to INTA - * @inta: Pointer to inta domain. - * @vint_desc: Pointer to vint_desc that needs to be freed. - */ -static void ti_sci_inta_free_parent_irq(struct ti_sci_inta_irq_domain *inta, - struct ti_sci_inta_vint_desc *vint_desc) -{ - if (find_first_bit(vint_desc->event_map, MAX_EVENTS_PER_VINT) == MAX_EVENTS_PER_VINT) { - list_del(&vint_desc->list); - ti_sci_release_resource(inta->vint, vint_desc->vint_id); - irq_dispose_mapping(vint_desc->parent_virq); - kfree(vint_desc); - } -} - /** * ti_sci_inta_free_irq() - Free an IRQ within INTA domain * @event_desc: Pointer to event_desc that needs to be freed. @@ -405,7 +391,6 @@ static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc, event_desc->global_event = TI_SCI_RESOURCE_NULL; event_desc->hwirq = 0; - ti_sci_inta_free_parent_irq(inta, vint_desc); mutex_unlock(&inta->vint_mutex); } @@ -414,8 +399,7 @@ static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc, * @data: Pointer to corresponding irq_data * * Note: This is the core api where the actual allocation happens for input - * hwirq. This allocation involves creating a parent irq for vint. - * If this is done in irq_domain_ops.alloc() then a deadlock is reached + * hwirq. If this is done in irq_domain_ops.alloc() then a deadlock is reached * for allocation. So this allocation is being done in request_resources() * * Return: 0 if all went well else corresponding error. @@ -437,8 +421,7 @@ static int ti_sci_inta_request_resources(struct irq_data *data) * ti_sci_inta_release_resources - Release resources for input irq * @data: Pointer to corresponding irq_data * - * Note: Corresponding to request_resources(), all the unmapping and deletion - * of parent vint irqs happens in this api. + * Note: Corresponding to request_resources(), release event mapping */ static void ti_sci_inta_release_resources(struct irq_data *data) { @@ -701,8 +684,9 @@ static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) if (ret) return ret; + inta->num_vints = ti_sci_get_num_resources(inta->vint); domain = irq_domain_add_linear(dev_of_node(dev), - ti_sci_get_num_resources(inta->vint), + inta->num_vints, &ti_sci_inta_irq_domain_ops, inta); if (!domain) { dev_err(dev, "Failed to allocate IRQ domain\n"); @@ -721,6 +705,12 @@ static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) INIT_LIST_HEAD(&inta->vint_list); mutex_init(&inta->vint_mutex); + ret = ti_sci_inta_alloc_parent_irqs(domain); + if (ret) { + irq_domain_remove(msi_domain); + irq_domain_remove(domain); + } + dev_info(dev, "Interrupt Aggregator domain %d created\n", inta->ti_sci_id); return 0; From patchwork Mon Mar 27 15:04:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 13189517 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02F9DC76195 for ; Mon, 27 Mar 2023 15:06:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References:Message-ID :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Mon, 27 Mar 2023 10:04:39 -0500 Received: from [127.0.1.1] (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32RF4VTl080647; Mon, 27 Mar 2023 10:04:37 -0500 From: Vignesh Raghavendra Date: Mon, 27 Mar 2023 20:34:27 +0530 Subject: [PATCH RFC v2 2/2] irqchip: irq-ti-sci-inta: Add direct mapped interrupts MIME-Version: 1.0 Message-ID: <20230327-irq-affinity-upstream-v2-2-1474e518f1cb@ti.com> References: <20230327-irq-affinity-upstream-v2-0-1474e518f1cb@ti.com> In-Reply-To: <20230327-irq-affinity-upstream-v2-0-1474e518f1cb@ti.com> To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Thomas Gleixner , Marc Zyngier CC: , , Vignesh Raghavendra X-Mailer: b4 0.12.2 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230327_080454_378754_D97A16A2 X-CRM114-Status: GOOD ( 24.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Certain high throughput peripherals such as ethernet etc may need dedicated IRQ lines so the IRQ load can be balanced across cores using IRQ affinity controls. Current driver aggregates multiple events/IRQ to single wired IRQ line/VINT thus making it impossible to migrate events selectively. In order to overcome this limitation, reserve a set of VINTs as direct interrupts and map them to events that are known to generate high IRQ load. Use SoC specific table to determine such events. This allows affinity management at parent irqchip level (GIC or ti-sci-intr + GIC). Signed-off-by: Vignesh Raghavendra --- drivers/irqchip/irq-ti-sci-inta.c | 149 +++++++++- 1 file changed, 147 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-ti-sci-inta.c b/drivers/irqchip/irq-ti-sci-inta.c index a3a22edbe0f0..db098bd95edc 100644 --- a/drivers/irqchip/irq-ti-sci-inta.c +++ b/drivers/irqchip/irq-ti-sci-inta.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #define TI_SCI_DEV_ID_MASK 0xffff @@ -40,6 +41,20 @@ #define VINT_STATUS_OFFSET 0x18 #define VINT_STATUS_MASKED_OFFSET 0x20 +#define DEV_DMASS0_INTAGGR_0 28 +#define DEV_DMASS0_PKTDMA_0 30 + +/** + * struct ti_sci_inta_soc_data - Description of SoC specific data + * @events_list: Pointer to array of events requiring direct IRQ + * mapping + * @events_list_size: size of event_list array + */ +struct ti_sci_inta_soc_data { + unsigned int *events_list; + int events_list_size; +}; + /** * struct ti_sci_inta_event_desc - Description of an event coming to * Interrupt Aggregator. This serves @@ -64,6 +79,7 @@ struct ti_sci_inta_event_desc { * @events: Array of event descriptors assigned to this vint. * @parent_virq: Linux IRQ number that gets attached to parent * @vint_id: TISCI vint ID + * @reserved: Indicate if this VINT is reserved for direct mapping */ struct ti_sci_inta_vint_desc { struct irq_domain *domain; @@ -72,6 +88,7 @@ struct ti_sci_inta_vint_desc { struct ti_sci_inta_event_desc events[MAX_EVENTS_PER_VINT]; unsigned int parent_virq; u16 vint_id; + bool reserved; }; /** @@ -81,6 +98,8 @@ struct ti_sci_inta_vint_desc { * @vint: TISCI resource pointer representing IA interrupts. * @global_event: TISCI resource pointer representing global events. * @vint_list: List of the vints active in the system + * @resv_vint_list: List of the direct vints active in the system. + * @resv_events: Pointer to list of direct events * @vint_mutex: Mutex to protect vint_list * @base: Base address of the memory mapped IO registers * @pdev: Pointer to platform device. @@ -97,12 +116,15 @@ struct ti_sci_inta_vint_desc { * identifier to let sysfw know where it has to program the * Global Event number. * @num_vints: Number of VINT lines allocated to this IA. + * @num_resv_vints: Number of VINT lines reserved for direct mapping. */ struct ti_sci_inta_irq_domain { const struct ti_sci_handle *sci; struct ti_sci_resource *vint; struct ti_sci_resource *global_event; struct list_head vint_list; + struct list_head resv_vint_list; + unsigned int *resv_events; /* Mutex to protect vint list */ struct mutex vint_mutex; void __iomem *base; @@ -112,6 +134,7 @@ struct ti_sci_inta_irq_domain { int unmapped_cnt; u16 *unmapped_dev_ids; int num_vints; + int num_resv_vints; }; #define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \ @@ -265,7 +288,11 @@ static int ti_sci_inta_alloc_parent_irqs(struct irq_domain *domain) } vint_desc->parent_virq = parent_virq; - list_add_tail(&vint_desc->list, &inta->vint_list); + if (i < inta->num_resv_vints) + list_add_tail(&vint_desc->list, &inta->resv_vint_list); + else + list_add_tail(&vint_desc->list, &inta->vint_list); + irq_set_chained_handler_and_data(vint_desc->parent_virq, ti_sci_inta_irq_handler, vint_desc); } @@ -390,8 +417,58 @@ static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc, ti_sci_release_resource(inta->global_event, event_desc->global_event); event_desc->global_event = TI_SCI_RESOURCE_NULL; event_desc->hwirq = 0; + vint_desc->reserved = false; +} + +/** + * ti_sci_inta_alloc_direct_irq - Allocate non-aggregated events/IRQs + * @data: Pointer to corresponding irq_data + * + * Returns allocated event_desc, ERR_PTR otherwise. + */ +static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_direct_irq(struct irq_data *data) +{ + struct ti_sci_inta_irq_domain *inta = data->domain->host_data; + struct ti_sci_inta_event_desc *event_desc = NULL; + struct ti_sci_inta_vint_desc *vint_desc; + + mutex_lock(&inta->vint_mutex); + list_for_each_entry(vint_desc, &inta->resv_vint_list, list) { + if (vint_desc->reserved) + continue; + + vint_desc->reserved = true; + event_desc = ti_sci_inta_alloc_event(vint_desc, 0, data->hwirq); + if (IS_ERR(event_desc)) + goto unlock; + data->parent_data = irq_get_irq_data(vint_desc->parent_virq); + break; + } +unlock: mutex_unlock(&inta->vint_mutex); + + return event_desc; +} + +/** + * ti_sci_inta_direct_irq - Allocate non-aggregated events/IRQs + * @data: Pointer to corresponding irq_data + * + * Returns true if this IRQ is to be direct mapped on given platform, + * false otherwise. + */ +static bool ti_sci_inta_direct_irq(struct irq_data *data) +{ + struct ti_sci_inta_irq_domain *inta = data->domain->host_data; + int i; + + for (i = 0; i < inta->num_resv_vints; i++) { + if (data->hwirq == inta->resv_events[i]) + return true; + } + + return false; } /** @@ -408,7 +485,11 @@ static int ti_sci_inta_request_resources(struct irq_data *data) { struct ti_sci_inta_event_desc *event_desc; - event_desc = ti_sci_inta_alloc_irq(data->domain, data->hwirq); + if (ti_sci_inta_direct_irq(data)) + event_desc = ti_sci_inta_alloc_direct_irq(data); + else + event_desc = ti_sci_inta_alloc_irq(data->domain, data->hwirq); + if (IS_ERR(event_desc)) return PTR_ERR(event_desc); @@ -485,6 +566,15 @@ static void ti_sci_inta_ack_irq(struct irq_data *data) static int ti_sci_inta_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force) { + int ret; + + if (d->parent_data) { + ret = irq_chip_set_affinity_parent(d, mask_val, force); + irq_data_update_effective_affinity(d, mask_val); + + return ret; + } + return -EINVAL; } @@ -627,9 +717,54 @@ static int ti_sci_inta_get_unmapped_sources(struct ti_sci_inta_irq_domain *inta) return 0; } +static unsigned int ti_sci_inta_direct_events_am62x[] = { + /* CPSW etherenti DMA events */ + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4627), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4635), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4643), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4651), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4659), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4667), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4675), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4683), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 5651), +}; + +static struct ti_sci_inta_soc_data soc_data_am62x = { + .events_list = ti_sci_inta_direct_events_am62x, + .events_list_size = ARRAY_SIZE(ti_sci_inta_direct_events_am62x), +}; + +static unsigned int ti_sci_inta_direct_events_am64x[] = { + /* CPSW etherenti DMA events */ + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4624), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4632), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4640), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4648), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4656), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4664), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4672), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 4680), + TO_HWIRQ(DEV_DMASS0_PKTDMA_0, 5648), +}; + +static struct ti_sci_inta_soc_data soc_data_am64x = { + .events_list = ti_sci_inta_direct_events_am64x, + .events_list_size = ARRAY_SIZE(ti_sci_inta_direct_events_am64x), +}; + +static const struct soc_device_attribute k3_soc_devices[] = { + { .family = "AM64X", .data = &soc_data_am64x }, + { .family = "AM62X", .data = &soc_data_am62x }, + { .family = "AM62AX", .data = &soc_data_am62x }, + { /* sentinel */ } +}; + static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) { struct irq_domain *parent_domain, *domain, *msi_domain; + const struct ti_sci_inta_soc_data *soc_data; + const struct soc_device_attribute *soc; struct device_node *parent_node, *node; struct ti_sci_inta_irq_domain *inta; struct device *dev = &pdev->dev; @@ -703,8 +838,18 @@ static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) } INIT_LIST_HEAD(&inta->vint_list); + INIT_LIST_HEAD(&inta->resv_vint_list); mutex_init(&inta->vint_mutex); + soc = soc_device_match(k3_soc_devices); + if (soc) { + soc_data = soc->data; + if (inta->num_vints > soc_data->events_list_size) { + inta->num_resv_vints = soc_data->events_list_size; + inta->resv_events = soc_data->events_list; + } + } + ret = ti_sci_inta_alloc_parent_irqs(domain); if (ret) { irq_domain_remove(msi_domain);