From patchwork Mon Mar 27 18:43:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rob Herring (Arm)" X-Patchwork-Id: 13189939 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 937E3C6FD1D for ; Mon, 27 Mar 2023 18:43:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232745AbjC0Snj (ORCPT ); Mon, 27 Mar 2023 14:43:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58104 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232755AbjC0Snb (ORCPT ); Mon, 27 Mar 2023 14:43:31 -0400 Received: from mail-oi1-f180.google.com (mail-oi1-f180.google.com [209.85.167.180]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9FF83AB1; Mon, 27 Mar 2023 11:43:24 -0700 (PDT) Received: by mail-oi1-f180.google.com with SMTP id w133so7123214oib.1; Mon, 27 Mar 2023 11:43:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679942604; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kEGgZynpOWxMMcgnhx5oPKpn1kXWJspMTBnhIlRJRTE=; b=S4kJ4C3v6vQmSKRETD46OhwWPgU4Bf2zEnniGtxAO45xVzcsTHiQkFo3UU/ohZFBRz Tk4qZkyt/pzlEebpGDNNZcbtcuQAn+rabfVywUd5iFO3Y1PcV/GcVecCXvc+t5vTFsDp XwSAlbUop39S1g6ALB4AjdpYMUXpgHTPCbE6ODAsi0r+5LoPp865PZrJSqKAo0PfoGBd KIFAQJ2fAH9Lpc66SGf3efMI3uiqUv/ixKHB5l97F0rVNXc90K2YPtBqqh7J9MRIOLNB dMnDtvkCW0QTqxgb+KcIikWxO7hlfEVOj7B2ONmgVlCcIIEoYVgoJrATcV92Q62z8IcC upYA== X-Gm-Message-State: AO0yUKWk60iS5N5WOZ0vJKIFlIbVQkZb1WTZGnSJVQ72m383YI6f6YQu dIe0/j+VtyRvwEGD9qC3BsP3WHGBOQ== X-Google-Smtp-Source: AK7set97PHnpHnNcJd0YvHu98kxp/1+R4hE13vkhtRYsN9y0C0ya9L6PqEFAa2u7vAGLV9IfWhm4tg== X-Received: by 2002:a05:6808:1389:b0:37f:936d:b5d9 with SMTP id c9-20020a056808138900b0037f936db5d9mr7045261oiw.12.1679942603966; Mon, 27 Mar 2023 11:43:23 -0700 (PDT) Received: from robh_at_kernel.org (66-90-144-107.dyn.grandenetworks.net. [66.90.144.107]) by smtp.gmail.com with ESMTPSA id s9-20020a4a9689000000b005255e556399sm11758101ooi.43.2023.03.27.11.43.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 11:43:23 -0700 (PDT) Received: (nullmailer pid 250777 invoked by uid 1000); Mon, 27 Mar 2023 18:43:19 -0000 From: Rob Herring Date: Mon, 27 Mar 2023 13:43:18 -0500 Subject: [PATCH 1/3] MAINTAINERS: Add Marvell mvebu clock drivers MIME-Version: 1.0 Message-Id: <20230327-mvebu-clk-fixes-v1-1-438de1026efd@kernel.org> References: <20230327-mvebu-clk-fixes-v1-0-438de1026efd@kernel.org> In-Reply-To: <20230327-mvebu-clk-fixes-v1-0-438de1026efd@kernel.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Michael Turquette , Stephen Boyd Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org X-Mailer: b4 0.13-dev Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org drivers/clk/mvebu/ is missing a maintainers entry. Add it to the existing entry for the Marvell mvebu platforms. Signed-off-by: Rob Herring Reviewed-by: Andrew Lunn --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8d5bc223f305..b9d04f781524 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2356,6 +2356,7 @@ F: arch/arm/configs/mvebu_*_defconfig F: arch/arm/mach-mvebu/ F: arch/arm64/boot/dts/marvell/armada* F: arch/arm64/boot/dts/marvell/cn913* +F: drivers/clk/mvebu/ F: drivers/cpufreq/armada-37xx-cpufreq.c F: drivers/cpufreq/armada-8k-cpufreq.c F: drivers/cpufreq/mvebu-cpufreq.c From patchwork Mon Mar 27 18:43:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rob Herring (Arm)" X-Patchwork-Id: 13189937 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D98F5C76195 for ; Mon, 27 Mar 2023 18:43:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232700AbjC0Sni (ORCPT ); Mon, 27 Mar 2023 14:43:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232707AbjC0Sn3 (ORCPT ); Mon, 27 Mar 2023 14:43:29 -0400 Received: from mail-oo1-f54.google.com (mail-oo1-f54.google.com [209.85.161.54]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E8D635BC; Mon, 27 Mar 2023 11:43:22 -0700 (PDT) Received: by mail-oo1-f54.google.com with SMTP id p2-20020a056820044200b0053e5914a50fso229890oou.2; Mon, 27 Mar 2023 11:43:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679942601; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7mYF/p73swKVMGgtJSK6eBueBgSxph1TeoNqsitRFwA=; b=XjRttvbJRCUx82ASH1d5wEA5halSg15OyoYCZ9w3v3R75MM/Xh6VZWRDx3dNSpoe+E SoYDHw+kIeuMIdEdNYb0FXHHa3rhO/f/mQNfPD56F9NGctjcUQOE+6Rx+ArpQohLNdhB Oyeq9DCt/+bbL95Aqx3KogLfatZM34D2Xwcal0PAPEkzqdQCsuEP9F1KNLaMIls0HB/G G5ZsDXRBon4VOaFOGBHKeWXM+oXCnDlCZoMZRTPUkGwTbLr92AvTFTZUpdEWbqLbWSbR XMJU95fXd8S3Ud7uVtvPfus/b7U8aUD+nfrxkrCtxhcdVdndfuQf0urNzqPsXqUplPWc ajMQ== X-Gm-Message-State: AO0yUKV7id96TJFijdZvZBRHL/t92VeQ7vE4gxs7F7pkg6e0XEtdA+6O UMPoNCT3/IiMacefM745yg== X-Google-Smtp-Source: AK7set93rXSYxq6KWYshAjTfCfw3AeV65pKHZdMYG56Xbhfos4ATeuSH5uZ8XV3z5yG6pRXhevkRtQ== X-Received: by 2002:a4a:2c86:0:b0:525:2b54:d6a4 with SMTP id o128-20020a4a2c86000000b005252b54d6a4mr5858648ooo.0.1679942601498; Mon, 27 Mar 2023 11:43:21 -0700 (PDT) Received: from robh_at_kernel.org (66-90-144-107.dyn.grandenetworks.net. [66.90.144.107]) by smtp.gmail.com with ESMTPSA id u63-20020a4a5742000000b0051aa196ac82sm11759997ooa.14.2023.03.27.11.43.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 11:43:21 -0700 (PDT) Received: (nullmailer pid 250779 invoked by uid 1000); Mon, 27 Mar 2023 18:43:19 -0000 From: Rob Herring Date: Mon, 27 Mar 2023 13:43:19 -0500 Subject: [PATCH 2/3] clk: mvebu: Use of_get_cpu_hwid() to read CPU ID MIME-Version: 1.0 Message-Id: <20230327-mvebu-clk-fixes-v1-2-438de1026efd@kernel.org> References: <20230327-mvebu-clk-fixes-v1-0-438de1026efd@kernel.org> In-Reply-To: <20230327-mvebu-clk-fixes-v1-0-438de1026efd@kernel.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Michael Turquette , Stephen Boyd Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org X-Mailer: b4 0.13-dev Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Use of_get_cpu_hwid() rather than the open coded reading of the CPU nodes "reg" property. The existing code is in fact wrong as the "reg" address cells size is 2 cells for arm64. The existing code happens to work because the DTS files are wrong as well. Signed-off-by: Rob Herring --- Note this should be marked for stable so that if/when the DTS files are fixed, then at least stable kernels will work. This is untested, so I didn't mark for stable. --- drivers/clk/mvebu/ap-cpu-clk.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/clk/mvebu/ap-cpu-clk.c b/drivers/clk/mvebu/ap-cpu-clk.c index 71bdd7c3ff03..d8a7a4c90d54 100644 --- a/drivers/clk/mvebu/ap-cpu-clk.c +++ b/drivers/clk/mvebu/ap-cpu-clk.c @@ -253,12 +253,12 @@ static int ap_cpu_clock_probe(struct platform_device *pdev) */ nclusters = 1; for_each_of_cpu_node(dn) { - int cpu, err; + u64 cpu; - err = of_property_read_u32(dn, "reg", &cpu); - if (WARN_ON(err)) { + cpu = of_get_cpu_hwid(dn, 0); + if (WARN_ON(cpu == OF_BAD_ADDR)) { of_node_put(dn); - return err; + return -EINVAL; } /* If cpu2 or cpu3 is enabled */ @@ -288,12 +288,12 @@ static int ap_cpu_clock_probe(struct platform_device *pdev) struct clk_init_data init; const char *parent_name; struct clk *parent; - int cpu, err; + u64 cpu; - err = of_property_read_u32(dn, "reg", &cpu); - if (WARN_ON(err)) { + cpu = of_get_cpu_hwid(dn, 0); + if (WARN_ON(cpu == OF_BAD_ADDR)) { of_node_put(dn); - return err; + return -EINVAL; } cluster_index = cpu & APN806_CLUSTER_NUM_MASK; From patchwork Mon Mar 27 18:43:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rob Herring (Arm)" X-Patchwork-Id: 13189938 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68C7EC77B60 for ; Mon, 27 Mar 2023 18:43:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231375AbjC0Sni (ORCPT ); Mon, 27 Mar 2023 14:43:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232715AbjC0Sn3 (ORCPT ); Mon, 27 Mar 2023 14:43:29 -0400 Received: from mail-oi1-f175.google.com (mail-oi1-f175.google.com [209.85.167.175]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7FB564233; Mon, 27 Mar 2023 11:43:23 -0700 (PDT) Received: by mail-oi1-f175.google.com with SMTP id bk5so7113435oib.6; Mon, 27 Mar 2023 11:43:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679942603; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pE6BrZSZEIfHJZnlEnBPUpJidRJVROMBg6S+6nxssKs=; b=ZACpH1ZMacEp/TxE9cfU6Laq6ZIhQrEM923Er/7LuS2OO8lj84a0fDCFzAvl+H3INl dl0LdhLJcdymjCJbAILUAU01b0i+6Sc+MFI6Zb/smco1l4O8NbvVXLLI45dK7JQ8jMAD Dt61h3hZT+WrP6a3DR23FRwWZRbh6lEUN9mmRJk6Qd/6Yz3MIfL5BHK6LBlAmnVR16Ic IWPO0VAOyX52S1k/M58Nc4pBu45z1khk2dE6dHzzNF5/nhiVpzkKh0aVxw43gFCtlguL h+0AY9hfNlwddx1LBDpi2+pJPL7DZFNU7bdnzcT6PqK/XcBRIeWCB13ltFNjuoUXoN3w 1ovw== X-Gm-Message-State: AAQBX9dauqxDY5yHUM+6pUiEF6Svg6BD/7uVzSj0kj9UvuTB7/4YcNUo Zv3/r/yOhODKEBx1DrXvwQ== X-Google-Smtp-Source: AKy350Yoe4hgpUKbCUxvQlP6BHpmdYrkR/97D44BpHvO6gg9kj9r4j/ALflcwvzpNOeozVL7I6D0Jw== X-Received: by 2002:aca:919:0:b0:388:f3b6:edb0 with SMTP id 25-20020aca0919000000b00388f3b6edb0mr3671558oij.51.1679942602755; Mon, 27 Mar 2023 11:43:22 -0700 (PDT) Received: from robh_at_kernel.org (66-90-144-107.dyn.grandenetworks.net. [66.90.144.107]) by smtp.gmail.com with ESMTPSA id q204-20020a4a33d5000000b0053853156b5csm11154922ooq.8.2023.03.27.11.43.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 11:43:22 -0700 (PDT) Received: (nullmailer pid 250781 invoked by uid 1000); Mon, 27 Mar 2023 18:43:19 -0000 From: Rob Herring Date: Mon, 27 Mar 2023 13:43:20 -0500 Subject: [PATCH 3/3] clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes MIME-Version: 1.0 Message-Id: <20230327-mvebu-clk-fixes-v1-3-438de1026efd@kernel.org> References: <20230327-mvebu-clk-fixes-v1-0-438de1026efd@kernel.org> In-Reply-To: <20230327-mvebu-clk-fixes-v1-0-438de1026efd@kernel.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Michael Turquette , Stephen Boyd Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org X-Mailer: b4 0.13-dev Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Rework iterating over DT CPU nodes to iterate over possible CPUs instead. There's no need to walk the DT CPU nodes again. Possible CPUs is equal to the number of CPUs defined in the DT. Using the "reg" value for an array index is fragile as it assumes "reg" is 0-N which often is not the case. Signed-off-by: Rob Herring --- drivers/clk/mvebu/clk-cpu.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/clk/mvebu/clk-cpu.c b/drivers/clk/mvebu/clk-cpu.c index c2af3395cf13..db2b38c21304 100644 --- a/drivers/clk/mvebu/clk-cpu.c +++ b/drivers/clk/mvebu/clk-cpu.c @@ -168,8 +168,8 @@ static void __init of_cpu_clk_setup(struct device_node *node) struct cpu_clk *cpuclk; void __iomem *clock_complex_base = of_iomap(node, 0); void __iomem *pmu_dfs_base = of_iomap(node, 1); - int ncpus = 0; - struct device_node *dn; + int ncpus = num_possible_cpus(); + int cpu; if (clock_complex_base == NULL) { pr_err("%s: clock-complex base register not set\n", @@ -181,9 +181,6 @@ static void __init of_cpu_clk_setup(struct device_node *node) pr_warn("%s: pmu-dfs base register not set, dynamic frequency scaling not available\n", __func__); - for_each_of_cpu_node(dn) - ncpus++; - cpuclk = kcalloc(ncpus, sizeof(*cpuclk), GFP_KERNEL); if (WARN_ON(!cpuclk)) goto cpuclk_out; @@ -192,19 +189,14 @@ static void __init of_cpu_clk_setup(struct device_node *node) if (WARN_ON(!clks)) goto clks_out; - for_each_of_cpu_node(dn) { + for_each_possible_cpu(cpu) { struct clk_init_data init; struct clk *clk; char *clk_name = kzalloc(5, GFP_KERNEL); - int cpu, err; if (WARN_ON(!clk_name)) goto bail_out; - err = of_property_read_u32(dn, "reg", &cpu); - if (WARN_ON(err)) - goto bail_out; - sprintf(clk_name, "cpu%d", cpu); cpuclk[cpu].parent_name = of_clk_get_parent_name(node, 0);