From patchwork Thu Mar 30 03:26:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TmFuY3kgTGluICjmnpfmrKPonqIp?= X-Patchwork-Id: 13193361 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6378C6FD1D for ; Thu, 30 Mar 2023 03:26:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BC99F10ECC8; Thu, 30 Mar 2023 03:26:23 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id ED38F10ECC3 for ; Thu, 30 Mar 2023 03:26:21 +0000 (UTC) X-UUID: a1be57f8ceaa11eda9a90f0bb45854f4-20230330 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=WoJKdEQIfvGalQRfL+XtubdnsJCZ9nJUfiXfe+9wORA=; b=RHCeGJ3D25lsROLguJmQdTWCKFcpkpKqvn3HnRyL0jF+8UotYXRwicwiZcEBszJgbD70mCqDCRn+9eLG/UNETxr5dIq3rLspL7r2SIsk1I4pi6gD2hAfuuK4cnB7OOzqxJdNvb5IdAPHqC/vAxd/lGKP3fEkIktLEah77O9YjPs=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.22, REQID:d9a7740f-8b88-49e2-8bd3-6ca9496c9359, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:120426c, CLOUDID:108ceb29-564d-42d9-9875-7c868ee415ec, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-UUID: a1be57f8ceaa11eda9a90f0bb45854f4-20230330 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 580680964; Thu, 30 Mar 2023 11:26:17 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Thu, 30 Mar 2023 11:26:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Thu, 30 Mar 2023 11:26:15 +0800 From: Nancy.Lin To: Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno Subject: [PATCH v3 1/2] drm/mediatek: Add mdp_rdma get format function Date: Thu, 30 Mar 2023 11:26:13 +0800 Message-ID: <20230330032614.18837-2-nancy.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230330032614.18837-1-nancy.lin@mediatek.com> References: <20230330032614.18837-1-nancy.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shawn.sung@mediatek.com, singo.chang@mediatek.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, "Nancy.Lin" , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add mdp_rdma get_format and get_num_formats function. Signed-off-by: Nancy.Lin --- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +++ drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 24 ++++++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h index 0d28b2e2069c..17b169530beb 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h @@ -152,4 +152,7 @@ void mtk_mdp_rdma_start(struct device *dev, struct cmdq_pkt *cmdq_pkt); void mtk_mdp_rdma_stop(struct device *dev, struct cmdq_pkt *cmdq_pkt); void mtk_mdp_rdma_config(struct device *dev, struct mtk_mdp_rdma_cfg *cfg, struct cmdq_pkt *cmdq_pkt); +const u32 *mtk_mdp_rdma_get_formats(struct device *dev); +size_t mtk_mdp_rdma_get_num_formats(struct device *dev); + #endif diff --git a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c index eecfa98ff52e..e06db6e56b5f 100644 --- a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c @@ -62,6 +62,20 @@ #define RDMA_CSC_FULL709_TO_RGB 5 #define RDMA_CSC_BT601_TO_RGB 6 +static const u32 formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_BGRX8888, + DRM_FORMAT_BGRA8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_RGB888, + DRM_FORMAT_BGR888, + DRM_FORMAT_RGB565, + DRM_FORMAT_UYVY, + DRM_FORMAT_YUYV, +}; + enum rdma_format { RDMA_INPUT_FORMAT_RGB565 = 0, RDMA_INPUT_FORMAT_RGB888 = 1, @@ -219,6 +233,16 @@ void mtk_mdp_rdma_config(struct device *dev, struct mtk_mdp_rdma_cfg *cfg, MDP_RDMA_MF_CLIP_SIZE, FLD_MF_CLIP_H); } +const u32 *mtk_mdp_rdma_get_formats(struct device *dev) +{ + return formats; +} + +size_t mtk_mdp_rdma_get_num_formats(struct device *dev) +{ + return ARRAY_SIZE(formats); +} + int mtk_mdp_rdma_clk_enable(struct device *dev) { struct mtk_mdp_rdma *rdma = dev_get_drvdata(dev); From patchwork Thu Mar 30 03:26:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TmFuY3kgTGluICjmnpfmrKPonqIp?= X-Patchwork-Id: 13193362 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3EFFAC74A5B for ; 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Thu, 30 Mar 2023 11:26:17 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Thu, 30 Mar 2023 11:26:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Thu, 30 Mar 2023 11:26:15 +0800 From: Nancy.Lin To: Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno Subject: [PATCH v3 2/2] drm/mediatek: Add ovl_adaptor get format function Date: Thu, 30 Mar 2023 11:26:14 +0800 Message-ID: <20230330032614.18837-3-nancy.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230330032614.18837-1-nancy.lin@mediatek.com> References: <20230330032614.18837-1-nancy.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shawn.sung@mediatek.com, singo.chang@mediatek.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, "Nancy.Lin" , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" 1. Add ovl_adaptor get_format and get_num_formats component function. The two functions are needed for getting the supported format in mtk_plane_init(). 2. Get supported format from the ovl_adaptor's rdma engine - mdp_rdma. Signed-off-by: Nancy.Lin --- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 ++ drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 14 ++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++ 3 files changed, 18 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h index 17b169530beb..2254038519e1 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h @@ -124,6 +124,8 @@ void mtk_ovl_adaptor_start(struct device *dev); void mtk_ovl_adaptor_stop(struct device *dev); unsigned int mtk_ovl_adaptor_layer_nr(struct device *dev); struct device *mtk_ovl_adaptor_dma_dev_get(struct device *dev); +const u32 *mtk_ovl_adaptor_get_formats(struct device *dev); +size_t mtk_ovl_adaptor_get_num_formats(struct device *dev); void mtk_rdma_bypass_shadow(struct device *dev); int mtk_rdma_clk_enable(struct device *dev); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c index 046217828ab3..c0a38f5217ee 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c @@ -297,6 +297,20 @@ void mtk_ovl_adaptor_disable_vblank(struct device *dev) mtk_ethdr_disable_vblank(ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]); } +const u32 *mtk_ovl_adaptor_get_formats(struct device *dev) +{ + struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev); + + return mtk_mdp_rdma_get_formats(ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MDP_RDMA0]); +} + +size_t mtk_ovl_adaptor_get_num_formats(struct device *dev) +{ + struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev); + + return mtk_mdp_rdma_get_num_formats(ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MDP_RDMA0]); +} + void mtk_ovl_adaptor_add_comp(struct device *dev, struct mtk_mutex *mutex) { mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA0); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 1a0c4f7e352a..f114da4d36a9 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -410,6 +410,8 @@ static const struct mtk_ddp_comp_funcs ddp_ovl_adaptor = { .disconnect = mtk_ovl_adaptor_disconnect, .add = mtk_ovl_adaptor_add_comp, .remove = mtk_ovl_adaptor_remove_comp, + .get_formats = mtk_ovl_adaptor_get_formats, + .get_num_formats = mtk_ovl_adaptor_get_num_formats, }; static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {