From patchwork Fri Mar 31 15:46:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 13196126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC472C77B6E for ; Fri, 31 Mar 2023 15:47:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233266AbjCaPrc (ORCPT ); Fri, 31 Mar 2023 11:47:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233228AbjCaPrb (ORCPT ); Fri, 31 Mar 2023 11:47:31 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 512E76E98; Fri, 31 Mar 2023 08:47:30 -0700 (PDT) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32VDsgnj010401; Fri, 31 Mar 2023 17:47:18 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=w9ILhYsOTZvuxzQYlPD9R8Ib3F4vFKSWlfhzjruH6nM=; b=xGrE7u0ouxNc3tQtzmyx/VyqCaQAa62qt6PtmS7wzEF18jsY3S1m2WvotXBjp0BnC9Sr kwub1o4269ISZH4nquOX8i9rPiVmbSKiSCJLv53mxh01ahRlw9SFgGlreFDldA9UdMLJ PbO6rja7T6UYoyS2ftrOqdiQohgn2o8dI3OBv+ijCQGwYcDlEcNU6E3+PFJ9qrVUAjaD J6GmSQPhu8iM94NylhExE0AdNRb5vtO4BROppMjJ0nicdyJstQbXzdkGecm+5zUNun+g PBfyLFAV6oZjif8J5oGQrZtOYQ4nKN08GlRF+Nt2Hw/SzKr8cETg+LWbfOFWvNz2bglD vQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pnw9c24rw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 31 Mar 2023 17:47:18 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 97E3110002A; Fri, 31 Mar 2023 17:47:17 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 91E09222CAD; Fri, 31 Mar 2023 17:47:17 +0200 (CEST) Received: from localhost (10.201.21.178) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Fri, 31 Mar 2023 17:47:15 +0200 From: Arnaud Pouliquen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Alexandre Torgue CC: , , , , Subject: [PATCH 1/5] dt-bindings: remoteproc: st,stm32-rproc: Rework reset declarations Date: Fri, 31 Mar 2023 17:46:47 +0200 Message-ID: <20230331154651.3107173-2-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> References: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.178] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-31_07,2023-03-31_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org With the introduction of the SCMI server it is now possible to use the SCMI to handle the hold boot instead of a dedicated smc call. As consequences two configurations are possible: - use the Linux rcc reset service and use syscon for the MCU hold boot - use the SCMI reset service for both the MCU reset and the MCU hold boot. This patch: - suppresses the use of the property st,syscfg-tz which was used to check if the trusted Zone was enable to use scm call to manage the hold boot (the reset controller phandle is used instead to select the configurations) - adds properties check on resets definitions. - adds an example of the SCMI reset service usage. Signed-off-by: Arnaud Pouliquen --- .../bindings/remoteproc/st,stm32-rproc.yaml | 52 +++++++++++++------ 1 file changed, 37 insertions(+), 15 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml index 66b1e3efdaa3..98d98e9114fc 100644 --- a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml @@ -25,7 +25,14 @@ properties: maxItems: 3 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 + + reset-names: + items: + - const: mcu_rst + - const: hold_boot + minItems: 1 st,syscfg-holdboot: description: remote processor reset hold boot @@ -36,16 +43,6 @@ properties: - description: The offset of the hold boot setting register - description: The field mask of the hold boot - st,syscfg-tz: - description: - Reference to the system configuration which holds the RCC trust zone mode - $ref: "/schemas/types.yaml#/definitions/phandle-array" - items: - - items: - - description: Phandle of syscon block - - description: The offset of the trust zone setting register - - description: The field mask of the trust zone state - interrupts: description: Should contain the WWDG1 watchdog reset interrupt maxItems: 1 @@ -135,22 +132,47 @@ required: - compatible - reg - resets - - st,syscfg-holdboot - - st,syscfg-tz + - reset-names + +allOf: + - if: + properties: + reset-names: + not: + contains: + const: hold_boot + then: + required: + - st,syscfg-holdboot + else: + properties: + st,syscfg-holdboot: false additionalProperties: false examples: - | #include - m4_rproc: m4@10000000 { + m4_rproc_example1: m4@10000000 { compatible = "st,stm32mp1-m4"; reg = <0x10000000 0x40000>, <0x30000000 0x40000>, <0x38000000 0x10000>; resets = <&rcc MCU_R>; + reset-names = "mcu_rst"; st,syscfg-holdboot = <&rcc 0x10C 0x1>; - st,syscfg-tz = <&rcc 0x000 0x1>; + st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; + st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; + }; + - | + #include + m4_rproc_example2: m4@10000000 { + compatible = "st,stm32mp1-m4"; + reg = <0x10000000 0x40000>, + <0x30000000 0x40000>, + <0x38000000 0x10000>; + resets = <&scmi MCU_R>, <&scmi MCU_HOLD_BOOT_R>; + reset-names = "mcu_rst", "hold_boot"; st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; }; From patchwork Fri Mar 31 15:46:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 13196127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21AF2C77B62 for ; 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Fri, 31 Mar 2023 17:47:15 +0200 From: Arnaud Pouliquen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Alexandre Torgue CC: , , , , Subject: [PATCH 2/5] ARM: dts: stm32: Remove the st,syscfg-tz property Date: Fri, 31 Mar 2023 17:46:48 +0200 Message-ID: <20230331154651.3107173-3-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> References: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.178] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-31_07,2023-03-31_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Since the introduction of the SCMI server for the management of the MCU hold boot in OPTEE, management of the hold boot by smc call is deprecated. Clean the st,syscfg-tz which allows to determine if the trust zone is enable. Signed-off-by: Arnaud Pouliquen --- arch/arm/boot/dts/stm32mp151.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 4e437d3f2ed6..25626797db94 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1820,8 +1820,8 @@ m4_rproc: m4@10000000 { <0x30000000 0x40000>, <0x38000000 0x10000>; resets = <&rcc MCU_R>; + reset-names = "mcu_rst"; st,syscfg-holdboot = <&rcc 0x10C 0x1>; - st,syscfg-tz = <&rcc 0x000 0x1>; st,syscfg-pdds = <&pwr_mcu 0x0 0x1>; st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; From patchwork Fri Mar 31 15:46:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 13196125 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 356A8C761A6 for ; Fri, 31 Mar 2023 15:47:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233249AbjCaPrb (ORCPT ); Fri, 31 Mar 2023 11:47:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232342AbjCaPra (ORCPT ); Fri, 31 Mar 2023 11:47:30 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54F5830F0; Fri, 31 Mar 2023 08:47:29 -0700 (PDT) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32VDr4QB010311; Fri, 31 Mar 2023 17:47:17 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=eRrWNW+wqxD3/GwUf/qHnZc761vbTu9x3KnHNUXIaMQ=; b=cz8ZHWXiFdhsnvsBJYYP/G4lo7Z4lnX8n/kpxRSmUuQUJcKfIUTWOWYndEdBqxFI6ngR aAQFOBLD7hVJm6lOx7hznLY1KaMB8YlgaOHFQ94KnBA1z6eSwMsjSHD2B3HvMf05L/mr 2DQ+Po1KLyJD9Mh4hN2O7ZL4jJvY1fEUlqoCBowSYkjUS21YJlH4oXpiFofLnaVaLxuQ mJGFQHStVcU7DytGR3R+zP6ZKSeUN4VsjnYxFZUknahpNqhB0qj+HhNp0FpNfMFnw+mI KZCA0hkSqv6EjsSyEkHMnn+wTR20us/uoQie6FzcYsADht6MHx4YWroOiZzK79Rk4hap rw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pnw9c24ru-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 31 Mar 2023 17:47:17 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B8E1A100034; Fri, 31 Mar 2023 17:47:16 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B0CB2222CAD; Fri, 31 Mar 2023 17:47:16 +0200 (CEST) Received: from localhost (10.201.21.178) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Fri, 31 Mar 2023 17:47:16 +0200 From: Arnaud Pouliquen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Alexandre Torgue CC: , , , , Subject: [PATCH 3/5] remoteproc: stm32: Clean-up the management of the hold boot by SMC call Date: Fri, 31 Mar 2023 17:46:49 +0200 Message-ID: <20230331154651.3107173-4-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> References: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.178] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-31_07,2023-03-31_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org There are two ways to manage the Cortex-M4 hold boot: - by Linux thanks to a sys config controller - by the secure context when the hold boot is protected. Since the introduction of the SCMI server, the use of the SMC call is deprecated. If the trust zone is activated, the management of the hold boot must be done by the secure context thanks to a SCMI reset controller. This patch cleans-up the code related to the SMC call, replaced by the SCMI server. Signed-off-by: Arnaud Pouliquen --- drivers/remoteproc/stm32_rproc.c | 34 ++------------------------------ 1 file changed, 2 insertions(+), 32 deletions(-) diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c index 7d782ed9e589..4be651e734ee 100644 --- a/drivers/remoteproc/stm32_rproc.c +++ b/drivers/remoteproc/stm32_rproc.c @@ -5,7 +5,6 @@ * Fabien Dessenne for STMicroelectronics. */ -#include #include #include #include @@ -88,7 +87,6 @@ struct stm32_rproc { struct stm32_rproc_mem *rmems; struct stm32_mbox mb[MBOX_NB_MBX]; struct workqueue_struct *workqueue; - bool secured_soc; void __iomem *rsc_va; }; @@ -398,20 +396,12 @@ static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold) { struct stm32_rproc *ddata = rproc->priv; struct stm32_syscon hold_boot = ddata->hold_boot; - struct arm_smccc_res smc_res; int val, err; val = hold ? HOLD_BOOT : RELEASE_BOOT; - if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->secured_soc) { - arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE, - hold_boot.reg, val, 0, 0, 0, 0, &smc_res); - err = smc_res.a0; - } else { - err = regmap_update_bits(hold_boot.map, hold_boot.reg, - hold_boot.mask, val); - } - + err = regmap_update_bits(hold_boot.map, hold_boot.reg, + hold_boot.mask, val); if (err) dev_err(&rproc->dev, "failed to set hold boot\n"); @@ -680,8 +670,6 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev, { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; - struct stm32_syscon tz; - unsigned int tzen; int err, irq; irq = platform_get_irq(pdev, 0); @@ -710,24 +698,6 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev, return dev_err_probe(dev, PTR_ERR(ddata->rst), "failed to get mcu_reset\n"); - /* - * if platform is secured the hold boot bit must be written by - * smc call and read normally. - * if not secure the hold boot bit could be read/write normally - */ - err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz); - if (err) { - dev_err(dev, "failed to get tz syscfg\n"); - return err; - } - - err = regmap_read(tz.map, tz.reg, &tzen); - if (err) { - dev_err(dev, "failed to read tzen\n"); - return err; - } - ddata->secured_soc = tzen & tz.mask; - err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", &ddata->hold_boot); if (err) { From patchwork Fri Mar 31 15:46:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 13196128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73CDEC761AF for ; Fri, 31 Mar 2023 15:47:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233277AbjCaPrg (ORCPT ); Fri, 31 Mar 2023 11:47:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233151AbjCaPrd (ORCPT ); Fri, 31 Mar 2023 11:47:33 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5695F11EBA; Fri, 31 Mar 2023 08:47:32 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32VF0v6C026206; Fri, 31 Mar 2023 17:47:18 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=eVxle4TZWTvY6ewnUGV7xXIwPe0XQBzxVHISXKvAK0I=; b=nUJSieOepSoDq3tZcQ7NCX3glSM8qzRxPOM8pf94ZfSrudj0WbRc9p0supAnzRQnqH/V GoQRdgEGgPxL8eOBart5OkW7YPkT8wc4/ntvMHMSJV3hA0dR2JAe9CRxmP4f9rf7mp3F tG5rkl8FIE9RNltfwXfgAIJHH7Nnzmr9BAoQQ33f1UHQO1hrVwbFGRJ7kRo1rfR5x3EV 4XLR/J92/OW6PUiOz0hRWWUx0tIFMAR5wfRgjmXfgfuDZ+TIVd3n/DPlixDFz+ySUqXv XXUZk/gqfT/gPWCOpsrwu8XRei8p5FgaAKCgR/+Uq2I5NDiX0Hfwr6zxFhahjK4UP01x 7w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pns3ekscn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 31 Mar 2023 17:47:18 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3EC8F10003B; Fri, 31 Mar 2023 17:47:17 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 38368222CAD; Fri, 31 Mar 2023 17:47:17 +0200 (CEST) Received: from localhost (10.201.21.178) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Fri, 31 Mar 2023 17:47:16 +0200 From: Arnaud Pouliquen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Alexandre Torgue CC: , , , , Subject: [PATCH 4/5] remoteproc: stm32: Allow hold boot management by the SCMI reset controller Date: Fri, 31 Mar 2023 17:46:50 +0200 Message-ID: <20230331154651.3107173-5-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> References: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.178] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-31_07,2023-03-31_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org The hold boot can be managed by the SCMI controller as a reset. If the "hold_boot" reset is defined in the device tree, use it. Else use the syscon controller directly to access to the register. Signed-off-by: Arnaud Pouliquen --- drivers/remoteproc/stm32_rproc.c | 34 ++++++++++++++++++++++++++------ 1 file changed, 28 insertions(+), 6 deletions(-) diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c index 4be651e734ee..6b0d8f30a5c7 100644 --- a/drivers/remoteproc/stm32_rproc.c +++ b/drivers/remoteproc/stm32_rproc.c @@ -78,6 +78,7 @@ struct stm32_mbox { struct stm32_rproc { struct reset_control *rst; + struct reset_control *hold_boot_rst; struct stm32_syscon hold_boot; struct stm32_syscon pdds; struct stm32_syscon m4_state; @@ -398,6 +399,14 @@ static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold) struct stm32_syscon hold_boot = ddata->hold_boot; int val, err; + if (ddata->hold_boot_rst) { + /* Use the SCMI reset controller */ + if (!hold) + return reset_control_deassert(ddata->hold_boot_rst); + else + return reset_control_assert(ddata->hold_boot_rst); + } + val = hold ? HOLD_BOOT : RELEASE_BOOT; err = regmap_update_bits(hold_boot.map, hold_boot.reg, @@ -693,16 +702,29 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev, dev_info(dev, "wdg irq registered\n"); } - ddata->rst = devm_reset_control_get_by_index(dev, 0); + ddata->rst = devm_reset_control_get(dev, "mcu_rst"); if (IS_ERR(ddata->rst)) return dev_err_probe(dev, PTR_ERR(ddata->rst), "failed to get mcu_reset\n"); - err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", - &ddata->hold_boot); - if (err) { - dev_err(dev, "failed to get hold boot\n"); - return err; + ddata->hold_boot_rst = devm_reset_control_get(dev, "hold_boot"); + if (IS_ERR(ddata->hold_boot_rst)) { + if (PTR_ERR(ddata->hold_boot_rst) == -EPROBE_DEFER) + return PTR_ERR(ddata->hold_boot_rst); + ddata->hold_boot_rst = NULL; + } + + if (!ddata->hold_boot_rst) { + /* + * If the hold boot is not managed by the SCMI reset controller, + * manage it through the syscon controller + */ + err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", + &ddata->hold_boot); + if (err) { + dev_err(dev, "failed to get hold boot\n"); + return err; + } } err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds); From patchwork Fri Mar 31 15:46:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 13196129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F799C76196 for ; Fri, 31 Mar 2023 15:48:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232679AbjCaPsy (ORCPT ); Fri, 31 Mar 2023 11:48:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232720AbjCaPsx (ORCPT ); Fri, 31 Mar 2023 11:48:53 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60CCB191C1; Fri, 31 Mar 2023 08:48:34 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32VDDdpe027526; Fri, 31 Mar 2023 17:48:28 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=tr01CIe/LpDGGpoPafu39bOHteV6ORG+tu0CkFYJUD0=; b=6gQgalJF+K4NJ6LEfL4kaEPoUTGxHFNR79jAl81jhjF0Mx+FTLJBcgznJsFwI/Wn+O6j rn4h+hBzm3NaU4Gz7RerhnlnzSEQIKAcfjmjPygSvtgGbBhzxazHoDMaJV2eBKPGSl6M XSnuApau6a1mK8r3ft+wjcE8L2LR/ZDhJhCDxiRPFj957Sp4xXTNDtA74NgXweXWyXBb KPCOSYJCqBNZgzLObPFttzw7ZNZO9Z6t5V2G3dsBLl6EmSOnd7x1vB6cpPi/lCuzx6tF 2Prf3R0qEOsBA9lJW3xe3gb8culD7JV+kttFsd4RdhSOG7QwjLROQhneUXd66L6Bs8JV dg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pns3eksj9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 31 Mar 2023 17:48:28 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C786D10002A; Fri, 31 Mar 2023 17:48:27 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id C191F21ED4D; Fri, 31 Mar 2023 17:48:27 +0200 (CEST) Received: from localhost (10.201.21.178) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Fri, 31 Mar 2023 17:48:27 +0200 From: Arnaud Pouliquen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Alexandre Torgue CC: , , , , Subject: [PATCH 5/5] ARM: dts: stm32: fix m4_rproc references to use scmi Date: Fri, 31 Mar 2023 17:46:51 +0200 Message-ID: <20230331154651.3107173-6-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> References: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.178] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-31_07,2023-03-31_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Fixes stm32mp15*-scmi DTS files introduced in [1]: This patch fixes the node which uses the MCU reset and adds the missing HOLD_BOOT which is also handled by the SCMI reset service. This change cannot be applied as a fix on commit [1], the management of the hold boot impacts also the stm32_rproc driver. [1] 'commit 5b7e58313a77 ("ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)")' Signed-off-by: Arnaud Pouliquen --- arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts | 6 ++++-- arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts | 6 ++++-- arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts | 6 ++++-- arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts | 6 ++++-- 4 files changed, 16 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts index e539cc80bef8..134788e64265 100644 --- a/arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts +++ b/arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts @@ -55,8 +55,10 @@ &mdma1 { resets = <&scmi_reset RST_SCMI_MDMA>; }; -&mlahb { - resets = <&scmi_reset RST_SCMI_MCU>; +&m4_rproc { + resets = <&scmi_reset RST_SCMI_MCU>, + <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts index 97e4f94b0a24..c42e658debfb 100644 --- a/arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts +++ b/arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts @@ -61,8 +61,10 @@ &mdma1 { resets = <&scmi_reset RST_SCMI_MDMA>; }; -&mlahb { - resets = <&scmi_reset RST_SCMI_MCU>; +&m4_rproc { + resets = <&scmi_reset RST_SCMI_MCU>, + <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts index 9cf0a44d2f47..7a56ff2d4185 100644 --- a/arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts +++ b/arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts @@ -60,8 +60,10 @@ &mdma1 { resets = <&scmi_reset RST_SCMI_MDMA>; }; -&mlahb { - resets = <&scmi_reset RST_SCMI_MCU>; +&m4_rproc { + resets = <&scmi_reset RST_SCMI_MCU>, + <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts index 3b9dd6f4ccc9..119874dd91e4 100644 --- a/arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts +++ b/arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts @@ -66,8 +66,10 @@ &mdma1 { resets = <&scmi_reset RST_SCMI_MDMA>; }; -&mlahb { - resets = <&scmi_reset RST_SCMI_MCU>; +&m4_rproc { + resets = <&scmi_reset RST_SCMI_MCU>, + <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; + reset-names = "mcu_rst", "hold_boot"; }; &rcc {