From patchwork Fri Apr 7 06:07:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U3RhbmxleSBDaGFuZ1vmmIzogrLlvrdd?= X-Patchwork-Id: 13204451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2143EC6FD1D for ; Fri, 7 Apr 2023 06:07:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233087AbjDGGHM (ORCPT ); Fri, 7 Apr 2023 02:07:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233079AbjDGGHL (ORCPT ); Fri, 7 Apr 2023 02:07:11 -0400 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3FE7C61BE for ; Thu, 6 Apr 2023 23:07:09 -0700 (PDT) Authenticated-By: X-SpamFilter-By: ArmorX SpamTrap 5.77 with qID 33766iI22023101, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (rtexh36506.realtek.com.tw[172.21.6.27]) by rtits2.realtek.com.tw (8.15.2/2.81/5.90) with ESMTPS id 33766iI22023101 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Fri, 7 Apr 2023 14:06:44 +0800 Received: from RTEXH36505.realtek.com.tw (172.21.6.25) by RTEXH36506.realtek.com.tw (172.21.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Fri, 7 Apr 2023 14:07:04 +0800 Received: from localhost.localdomain (172.21.252.101) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server id 15.1.2375.32 via Frontend Transport; Fri, 7 Apr 2023 14:07:04 +0800 From: Stanley Chang To: Thinh Nguyen CC: Subject: [PATCH v1 1/2] usb: dwc3: core: add support for remapping global register start address Date: Fri, 7 Apr 2023 14:07:02 +0800 Message-ID: <20230407060703.19469-1-stanley_chang@realtek.com> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 X-KSE-Antispam-Frontend-Serialized-Headers: RnJvbTogU3RhbmxleSBDaGFuZyA8c3RhbmxleV9jaGFuZ0ByZWFsdGVrLmNvbT4NClRvOiBUaGluaCBOZ3V5ZW4gPFRoaW5oLk5ndXllbkBzeW5vcHN5cy5jb20+DQpDYzogbGludXgtdXNiQHZnZXIua2VybmVsLm9yZw0KU3ViamVjdDogW1BBVENIIHYxIDEvMl0gdXNiOiBkd2MzOiBjb3JlOiBhZGQgc3VwcG9ydCBmb3IgcmVtYXBwaW5nIGdsb2JhbCByZWdpc3RlciBzdGFydCBhZGRyZXNzDQpEYXRlOiBGcmksICA3IEFwciAyMDIzIDE0OjA3OjAyICswODAwDQpNZXNzYWdlLUlkOiA8MjAyMzA0MDcwNjA3MDMuMTk0NjktMS1zdGFubGV5X2NoYW5nQHJlYWx0ZWsuY29tPg0KWC1NYWlsZXI6IGdpdC1zZW5kLWVtYWlsIDIuMzkuMA0KTUlNRS1WZXJzaW9uOiAxLjANCkNvbnRlbnQtVHJhbnNmZXItRW5jb2Rpbmc6IDhiaXQNCg0K Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The RTK DHC SoCs were designed the global register address offset at 0x8100. The default address is at DWC3_GLOBALS_REGS_START (0xc100). Therefore, add the property of device-tree to adjust this start address. Signed-off-by: Stanley Chang --- drivers/usb/dwc3/core.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 476b63618511..771b35449376 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1785,6 +1785,23 @@ static int dwc3_probe(struct platform_device *pdev) dwc_res = *res; dwc_res.start += DWC3_GLOBALS_REGS_START; + /* For some dwc3 controller, the dwc3 global register start address is + * not at DWC3_GLOBALS_REGS_START (0xc100). + */ + if (dev) { + int fixed_dwc3_globals_regs_start; + + device_property_read_u32(dev, "snps,fixed_dwc3_globals_regs_start", + &fixed_dwc3_globals_regs_start); + if (fixed_dwc3_globals_regs_start) { + dwc_res.start -= DWC3_GLOBALS_REGS_START; + dwc_res.start += fixed_dwc3_globals_regs_start; + dev_info(dev, + "fixed dwc3 globals register start address from 0x%x to end 0x%x\n", + (int)dwc_res.start, (int)dwc_res.end); + } + } + regs = devm_ioremap_resource(dev, &dwc_res); if (IS_ERR(regs)) return PTR_ERR(regs); From patchwork Fri Apr 7 06:07:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U3RhbmxleSBDaGFuZ1vmmIzogrLlvrdd?= X-Patchwork-Id: 13204452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18678C76196 for ; Fri, 7 Apr 2023 06:07:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233084AbjDGGHM (ORCPT ); Fri, 7 Apr 2023 02:07:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231658AbjDGGHL (ORCPT ); Fri, 7 Apr 2023 02:07:11 -0400 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43FFB93C4 for ; Thu, 6 Apr 2023 23:07:09 -0700 (PDT) Authenticated-By: X-SpamFilter-By: ArmorX SpamTrap 5.77 with qID 33766iA22023106, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (rtexh36505.realtek.com.tw[172.21.6.25]) by rtits2.realtek.com.tw (8.15.2/2.81/5.90) with ESMTPS id 33766iA22023106 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Fri, 7 Apr 2023 14:06:44 +0800 Received: from RTEXH36505.realtek.com.tw (172.21.6.25) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.32; Fri, 7 Apr 2023 14:07:04 +0800 Received: from localhost.localdomain (172.21.252.101) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server id 15.1.2375.32 via Frontend Transport; Fri, 7 Apr 2023 14:07:04 +0800 From: Stanley Chang To: Thinh Nguyen CC: Subject: [PATCH v1 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,fixed_dwc3_globals_regs_start' quirk Date: Fri, 7 Apr 2023 14:07:03 +0800 Message-ID: <20230407060703.19469-2-stanley_chang@realtek.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230407060703.19469-1-stanley_chang@realtek.com> References: <20230407060703.19469-1-stanley_chang@realtek.com> MIME-Version: 1.0 X-KSE-ServerInfo: RTEXH36505.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add a new 'snps,fixed_dwc3_globals_regs_start' DT to dwc3 core to remap the global register start address The RTK DHC SoCs were designed the global register address offset at 0x8100. The default address is at DWC3_GLOBALS_REGS_START (0xc100). Therefore, add the property of device-tree to adjust this start address. Signed-off-by: Stanley Chang --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index be36956af53b..a5599d977db6 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -359,6 +359,13 @@ properties: items: enum: [1, 4, 8, 16, 32, 64, 128, 256] + snps,fixed_dwc3_globals_regs_start: + description: + value for remapping global register start address. For some dwc3 + controller, the dwc3 global register start address is not at + default DWC3_GLOBALS_REGS_START (0xc100). This property is added to + adjust the address. + port: $ref: /schemas/graph.yaml#/properties/port description: