From patchwork Sat Apr 8 15:27:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Lunn X-Patchwork-Id: 13205768 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 147E3C77B6F for ; Sat, 8 Apr 2023 15:28:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229981AbjDHP23 (ORCPT ); Sat, 8 Apr 2023 11:28:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229933AbjDHP21 (ORCPT ); Sat, 8 Apr 2023 11:28:27 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A07811707 for ; Sat, 8 Apr 2023 08:28:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:From:Sender:Reply-To:Subject:Date: Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=dswgCTyQVXhgC3c9wzvYFYw3LU1vGeVN40KU37gkIyA=; b=ui/nlYbm9kEslT2bI/0SdksAUl J6qZ7bQw3BkIJvGLGPwtE2YaRzqCo5YD5+Qsu6Tb5z02l3gAWyW/TGgNdLSfkwdpzw+AhnIRkgHZu EH4wfQtU3VweDl64T8LQtI+/OrP493OegNk0ZLLNVNmVFEGUWhKKwZc/P7cX5IrOgcEQ=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1plAUD-009niK-Uz; Sat, 08 Apr 2023 17:28:17 +0200 From: Andrew Lunn To: shawnguo@kernel.org Cc: s.hauer@pengutronix.de, Russell King , Vladimir Oltean , arm-soc , netdev , Andrew Lunn Subject: [PATCH v2 1/3] ARM: dts: imx51: ZII: Add missing phy-mode Date: Sat, 8 Apr 2023 17:27:59 +0200 Message-Id: <20230408152801.2336041-2-andrew@lunn.ch> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230408152801.2336041-1-andrew@lunn.ch> References: <20230408152801.2336041-1-andrew@lunn.ch> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The DSA framework has got more picky about always having a phy-mode for the CPU port. The imx51 Ethernet supports MII, and RMII. Set the switch phy-mode based on how the SoC Ethernet port has been configured. Additionally, the cpu label has never actually been used in the binding, so remove it. Signed-off-by: Andrew Lunn Reviewed-by: Vladimir Oltean --- v2: Use rev-mii for the side 'playing PHY'. --- arch/arm/boot/dts/imx51-zii-rdu1.dts | 2 +- arch/arm/boot/dts/imx51-zii-scu2-mezz.dts | 2 +- arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 1 - 3 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/imx51-zii-rdu1.dts b/arch/arm/boot/dts/imx51-zii-rdu1.dts index e537e06e11d7..ab539a68b9ac 100644 --- a/arch/arm/boot/dts/imx51-zii-rdu1.dts +++ b/arch/arm/boot/dts/imx51-zii-rdu1.dts @@ -181,7 +181,7 @@ ports { port@0 { reg = <0>; - label = "cpu"; + phy-mode = "rev-mii"; ethernet = <&fec>; fixed-link { diff --git a/arch/arm/boot/dts/imx51-zii-scu2-mezz.dts b/arch/arm/boot/dts/imx51-zii-scu2-mezz.dts index 21dd3f7abd48..625f9ac671ae 100644 --- a/arch/arm/boot/dts/imx51-zii-scu2-mezz.dts +++ b/arch/arm/boot/dts/imx51-zii-scu2-mezz.dts @@ -82,7 +82,7 @@ port@3 { port@4 { reg = <4>; - label = "cpu"; + phy-mode = "rev-mii"; ethernet = <&fec>; fixed-link { diff --git a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts index 9f857eb44bf7..19a3b142c964 100644 --- a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts +++ b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts @@ -267,7 +267,6 @@ fixed-link { port@6 { reg = <6>; - label = "cpu"; phy-mode = "mii"; ethernet = <&fec>; From patchwork Sat Apr 8 15:28:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Lunn X-Patchwork-Id: 13205769 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49EC3C7619A for ; Sat, 8 Apr 2023 15:28:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229988AbjDHP2b (ORCPT ); Sat, 8 Apr 2023 11:28:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229944AbjDHP21 (ORCPT ); Sat, 8 Apr 2023 11:28:27 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A00AA1B5 for ; Sat, 8 Apr 2023 08:28:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:From:Sender:Reply-To:Subject:Date: Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=5zU0gqJVDqo7gkFt/d5CXMbc8f3jf1PQ9yGD+q4gyGk=; b=YHzgaiVf4pT1QyKGRYsUfyupcZ RANeMNtV++uttxTu25Aep9jX9a7LeIAFpJjMSU45D4tmaZcxcCqbjUS9rVdsNeECpl0ZoJEVfnUgN DMWUd9pj2h9lNtkWfwmvYwgBRu2BSUCif1KXwOebHJ0jQbHzHOIbvHtTBpdSQY2G0Wt0=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1plAUD-009niO-W1; Sat, 08 Apr 2023 17:28:17 +0200 From: Andrew Lunn To: shawnguo@kernel.org Cc: s.hauer@pengutronix.de, Russell King , Vladimir Oltean , arm-soc , netdev , Andrew Lunn Subject: [PATCH v2 2/3] ARM: dts: imx6qdl: Add missing phy-mode and fixed links Date: Sat, 8 Apr 2023 17:28:00 +0200 Message-Id: <20230408152801.2336041-3-andrew@lunn.ch> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230408152801.2336041-1-andrew@lunn.ch> References: <20230408152801.2336041-1-andrew@lunn.ch> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The DSA framework has got more picky about always having a phy-mode for the CPU port. Add a phy-mode based on what the SoC ethernet is using. For RGMII mode, have the switch add the delays. Additionally, the cpu label has never actually been used in the binding, so remove it. Lastly add a fixed-link node indicating the expected speed/duplex of the link to the SoC. Signed-off-by: Andrew Lunn Reviewed-by: Vladimir Oltean --- v2: Use rev-rmii for the side 'playing PHY' --- arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 7 ++++++- arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi index 9fc79af2bc9a..9594bc5745ed 100644 --- a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi @@ -238,8 +238,13 @@ port@3 { port@5 { reg = <5>; - label = "cpu"; ethernet = <&fec>; + phy-mode = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; }; }; }; diff --git a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi index 5bb47c79a4da..abd72d72ae99 100644 --- a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +++ b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi @@ -757,7 +757,7 @@ port@1 { port@2 { reg = <2>; - label = "cpu"; + phy-mode = "rev-rmii"; ethernet = <&fec>; fixed-link { From patchwork Sat Apr 8 15:28:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Lunn X-Patchwork-Id: 13205766 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B96D8C77B6C for ; Sat, 8 Apr 2023 15:28:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229954AbjDHP21 (ORCPT ); Sat, 8 Apr 2023 11:28:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229689AbjDHP20 (ORCPT ); Sat, 8 Apr 2023 11:28:26 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FF54136 for ; Sat, 8 Apr 2023 08:28:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:From:Sender:Reply-To:Subject:Date: Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=7bfB5aBL/DFj4awR7YVB4a+CvLLp5aOCExZOWLIccQE=; b=d5zuv9lRyDaV+mtkN+NVHWZ7wl HpyOw82wGIsiBabhUhF3RA56xkkZt0herEhht+MnzDMpnYZxuFKl9Rdq1oDI8MSUJjsjsh4/8f+XG F8q/SoJL4xvIbP/YNRXl0tst0YvRptqLh6+RusS+r0NbjgSXn89xMwhU7vtNkm8Skox4=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1plAUE-009niS-0j; Sat, 08 Apr 2023 17:28:18 +0200 From: Andrew Lunn To: shawnguo@kernel.org Cc: s.hauer@pengutronix.de, Russell King , Vladimir Oltean , arm-soc , netdev , Andrew Lunn Subject: [PATCH v2 3/3] ARM64: dts: freescale: ZII: Add missing phy-mode Date: Sat, 8 Apr 2023 17:28:01 +0200 Message-Id: <20230408152801.2336041-4-andrew@lunn.ch> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230408152801.2336041-1-andrew@lunn.ch> References: <20230408152801.2336041-1-andrew@lunn.ch> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The DSA framework has got more picky about always having a phy-mode for the CPU port. The imx8mq Ethernet is being configured to RMII. Set the switch phy-mode based on this. Additionally, the cpu label has never actually been used in the binding, so remove it. Signed-off-by: Andrew Lunn Reviewed-by: Vladimir Oltean --- v2: Use rev-rmii for the side 'playing PHY' --- arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi index 3a52679ecd68..cb777b47baf9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi @@ -177,7 +177,7 @@ port@1 { port@2 { reg = <2>; - label = "cpu"; + phy-mode = "rev-rmii"; ethernet = <&fec1>; fixed-link {