From patchwork Wed Apr 12 21:30:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Shyti X-Patchwork-Id: 13209546 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D4BD8C77B6C for ; Wed, 12 Apr 2023 21:30:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AEDCC10E99F; Wed, 12 Apr 2023 21:30:52 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id D759910E997; Wed, 12 Apr 2023 21:30:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681335050; x=1712871050; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TvGsopZIEWmGTgOjIe+0dfr3xptgWZUwAvputZ7xGHI=; b=ZiC2sh23us2Dgj+maKrk/jMOjQL6A2AmxfcUaju9/x9P5QVZZq3YEw5R tEEauIp9wNZQR1UjdECxxc6/tg20M1IJoG/gz5HgHZP4G0um7dZc7CbQ2 Cs9djAbj95BFua/QYCK9bA0XfvkT5gmzRVHqPx0Bcxrd+/lbjDTAg7hHF /nM0VBfne1NLGuxntuzj9ijI+QKUa3/J1t5WwE3ih1cCnaHbEK7BeMwum Nz6mJTkajpP1BgN1DnNAPVyjahyHvrUyXwPb1B/p/Fy68KIp6MFZweX/L QUgpbiQ5mit67w0RSfMWd5ie9SLi7T32YiFa9Cq4gx0LN0c/1J64A/9aB Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10678"; a="341519553" X-IronPort-AV: E=Sophos;i="5.98,339,1673942400"; d="scan'208";a="341519553" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Apr 2023 14:30:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10678"; a="800497748" X-IronPort-AV: E=Sophos;i="5.98,339,1673942400"; d="scan'208";a="800497748" Received: from zbiro-mobl.ger.corp.intel.com (HELO intel.com) ([10.251.212.144]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Apr 2023 14:30:46 -0700 From: Andi Shyti To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Jonathan Cavitt Date: Wed, 12 Apr 2023 23:30:07 +0200 Message-Id: <20230412213008.919630-2-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230412213008.919630-1-andi.shyti@linux.intel.com> References: <20230412213008.919630-1-andi.shyti@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v6 1/2] drm/i915: Migrate platform-dependent mock hugepage selftests to live X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Auld , Andi Shyti Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Jonathan Cavitt Convert the igt_mock_ppgtt_huge_fill and igt_mock_ppgtt_64K mock selftests into live selftests as their requirements have recently become platform-dependent. Additionally, apply necessary platform dependency checks to these tests. Signed-off-by: Jonathan Cavitt Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld Signed-off-by: Andi Shyti --- .../gpu/drm/i915/gem/selftests/huge_pages.c | 88 +++++++++++++++---- 1 file changed, 69 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c index defece0bcb811..51866cbfa6a4a 100644 --- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c +++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c @@ -695,8 +695,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg) return err; } -static void close_object_list(struct list_head *objects, - struct i915_ppgtt *ppgtt) +static void close_object_list(struct list_head *objects) { struct drm_i915_gem_object *obj, *on; @@ -710,17 +709,35 @@ static void close_object_list(struct list_head *objects, } } -static int igt_mock_ppgtt_huge_fill(void *arg) +static int igt_ppgtt_huge_fill(void *arg) { - struct i915_ppgtt *ppgtt = arg; - struct drm_i915_private *i915 = ppgtt->vm.i915; - unsigned long max_pages = ppgtt->vm.total >> PAGE_SHIFT; + struct drm_i915_private *i915 = arg; + unsigned int supported = RUNTIME_INFO(i915)->page_sizes; + struct i915_address_space *vm; + struct i915_gem_context *ctx; + unsigned long max_pages; unsigned long page_num; + struct file *file; bool single = false; LIST_HEAD(objects); IGT_TIMEOUT(end_time); int err = -ENODEV; + if (supported == I915_GTT_PAGE_SIZE_4K) + return 0; + + file = mock_file(i915); + if (IS_ERR(file)) + return PTR_ERR(file); + + ctx = hugepage_ctx(i915, file); + if (IS_ERR(ctx)) { + err = PTR_ERR(ctx); + goto out; + } + vm = i915_gem_context_get_eb_vm(ctx); + max_pages = vm->total >> PAGE_SHIFT; + for_each_prime_number_from(page_num, 1, max_pages) { struct drm_i915_gem_object *obj; u64 size = page_num << PAGE_SHIFT; @@ -750,7 +767,7 @@ static int igt_mock_ppgtt_huge_fill(void *arg) list_add(&obj->st_link, &objects); - vma = i915_vma_instance(obj, &ppgtt->vm, NULL); + vma = i915_vma_instance(obj, vm, NULL); if (IS_ERR(vma)) { err = PTR_ERR(vma); break; @@ -784,7 +801,8 @@ static int igt_mock_ppgtt_huge_fill(void *arg) GEM_BUG_ON(!expected_gtt); GEM_BUG_ON(size); - if (expected_gtt & I915_GTT_PAGE_SIZE_4K) + if (expected_gtt & I915_GTT_PAGE_SIZE_4K && + GRAPHICS_VER_FULL(i915) < IP_VER(12, 50)) expected_gtt &= ~I915_GTT_PAGE_SIZE_64K; i915_vma_unpin(vma); @@ -823,19 +841,24 @@ static int igt_mock_ppgtt_huge_fill(void *arg) single = !single; } - close_object_list(&objects, ppgtt); + close_object_list(&objects); if (err == -ENOMEM || err == -ENOSPC) err = 0; + i915_vm_put(vm); +out: + fput(file); return err; } -static int igt_mock_ppgtt_64K(void *arg) +static int igt_ppgtt_64K(void *arg) { - struct i915_ppgtt *ppgtt = arg; - struct drm_i915_private *i915 = ppgtt->vm.i915; + struct drm_i915_private *i915 = arg; struct drm_i915_gem_object *obj; + struct i915_address_space *vm; + struct i915_gem_context *ctx; + struct file *file; const struct object_info { unsigned int size; unsigned int gtt; @@ -907,16 +930,40 @@ static int igt_mock_ppgtt_64K(void *arg) if (!HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_64K)) return 0; + file = mock_file(i915); + if (IS_ERR(file)) + return PTR_ERR(file); + + ctx = hugepage_ctx(i915, file); + if (IS_ERR(ctx)) { + err = PTR_ERR(ctx); + goto out; + } + vm = i915_gem_context_get_eb_vm(ctx); + for (i = 0; i < ARRAY_SIZE(objects); ++i) { unsigned int size = objects[i].size; unsigned int expected_gtt = objects[i].gtt; unsigned int offset = objects[i].offset; unsigned int flags = PIN_USER; + /* + * For modern GTT models, the requirements for marking a page-table + * as 64K have been relaxed. Account for this. + */ + + if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) { + expected_gtt = 0; + expected_gtt |= size & (SZ_64K | SZ_2M) ? I915_GTT_PAGE_SIZE_64K : 0; + expected_gtt |= size & SZ_4K ? I915_GTT_PAGE_SIZE_4K : 0; + } + for (single = 0; single <= 1; single++) { obj = fake_huge_pages_object(i915, size, !!single); - if (IS_ERR(obj)) - return PTR_ERR(obj); + if (IS_ERR(obj)) { + err = PTR_ERR(obj); + goto out_vm; + } err = i915_gem_object_pin_pages_unlocked(obj); if (err) @@ -928,7 +975,7 @@ static int igt_mock_ppgtt_64K(void *arg) */ obj->mm.page_sizes.sg &= ~I915_GTT_PAGE_SIZE_2M; - vma = i915_vma_instance(obj, &ppgtt->vm, NULL); + vma = i915_vma_instance(obj, vm, NULL); if (IS_ERR(vma)) { err = PTR_ERR(vma); goto out_object_unpin; @@ -982,7 +1029,7 @@ static int igt_mock_ppgtt_64K(void *arg) } } - return 0; + goto out_vm; out_vma_unpin: i915_vma_unpin(vma); @@ -992,7 +1039,10 @@ static int igt_mock_ppgtt_64K(void *arg) i915_gem_object_unlock(obj); out_object_put: i915_gem_object_put(obj); - +out_vm: + i915_vm_put(vm); +out: + fput(file); return err; } @@ -1910,8 +1960,6 @@ int i915_gem_huge_page_mock_selftests(void) SUBTEST(igt_mock_exhaust_device_supported_pages), SUBTEST(igt_mock_memory_region_huge_pages), SUBTEST(igt_mock_ppgtt_misaligned_dma), - SUBTEST(igt_mock_ppgtt_huge_fill), - SUBTEST(igt_mock_ppgtt_64K), }; struct drm_i915_private *dev_priv; struct i915_ppgtt *ppgtt; @@ -1962,6 +2010,8 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_ppgtt_sanity_check), SUBTEST(igt_ppgtt_compact), SUBTEST(igt_ppgtt_mixed), + SUBTEST(igt_ppgtt_huge_fill), + SUBTEST(igt_ppgtt_64K), }; if (!HAS_PPGTT(i915)) { From patchwork Wed Apr 12 21:30:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Shyti X-Patchwork-Id: 13209548 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 101B6C77B6E for ; Wed, 12 Apr 2023 21:31:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A39E710E9A2; Wed, 12 Apr 2023 21:31:34 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1EF9D10E997; Wed, 12 Apr 2023 21:31:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681335091; x=1712871091; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KYs7k1xwNWowFSX2RtdwLSYXdef2iIQbzG6UPT80JBc=; b=AVpKBsU/hJ0q6nt1WkwWh38kNnX3OYmKvmb7r1qiEHJ3VFP1CvUSZa9t RtEhIwvhTLAMcawkpyIANtTph7+alTXBKLVpnsTB2SElrIO/NqF2+zq1d PSS5auFlQ7koKglT+HXO0T6z6lMmsM/B8p7RNBjbYSlD/ByCA2msYPeIp QXeyGt0TJzDDV+SbLMCre+4KX5s/OKaMspbdsydqs+mZsINBPS7A5iAV0 fdYMDfxcWZ9pMbNG8iORrd9VRpGNIevTTDIvA7FxNITvqLHlrgWPQKaxV FrKv6t7knetZkMHidtTaLBcu4079/5ms37apkz8A2IdhCeXQ0y0x5a7zk Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10678"; a="328142045" X-IronPort-AV: E=Sophos;i="5.98,339,1673942400"; d="scan'208";a="328142045" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Apr 2023 14:31:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10678"; a="639389227" X-IronPort-AV: E=Sophos;i="5.98,339,1673942400"; d="scan'208";a="639389227" Received: from zbiro-mobl.ger.corp.intel.com (HELO intel.com) ([10.251.212.144]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Apr 2023 14:30:52 -0700 From: Andi Shyti To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Jonathan Cavitt Date: Wed, 12 Apr 2023 23:30:08 +0200 Message-Id: <20230412213008.919630-3-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230412213008.919630-1-andi.shyti@linux.intel.com> References: <20230412213008.919630-1-andi.shyti@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v6 2/2] drm/i915: Use correct huge page manager for MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Auld , Andi Shyti Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Jonathan Cavitt MTL currently uses gen8_ppgtt_insert_huge when managing huge pages. This is because MTL reports as not supporting 64K pages, or more accurately, the system that reports whether a platform has 64K pages reports false for MTL. This is only half correct, as the 64K page support reporting system only cares about 64K page support for LMEM, which MTL doesn't have. MTL should be using xehpsdv_ppgtt_insert_huge. However, simply changing over to using that manager doesn't resolve the issue because MTL is expecting the virtual address space for the page table to be flushed after initialization, so we must also add a flush statement there. Signed-off-by: Jonathan Cavitt Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld Signed-off-by: Andi Shyti --- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c index 4daaa6f556688..9c571185395f4 100644 --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c @@ -570,6 +570,7 @@ xehpsdv_ppgtt_insert_huge(struct i915_address_space *vm, } } while (rem >= page_size && index < max); + drm_clflush_virt_range(vaddr, PAGE_SIZE); vma_res->page_sizes_gtt |= page_size; } while (iter->sg && sg_dma_len(iter->sg)); } @@ -707,7 +708,7 @@ static void gen8_ppgtt_insert(struct i915_address_space *vm, struct sgt_dma iter = sgt_dma(vma_res); if (vma_res->bi.page_sizes.sg > I915_GTT_PAGE_SIZE) { - if (HAS_64K_PAGES(vm->i915)) + if (GRAPHICS_VER_FULL(vm->i915) >= IP_VER(12, 50)) xehpsdv_ppgtt_insert_huge(vm, vma_res, &iter, cache_level, flags); else gen8_ppgtt_insert_huge(vm, vma_res, &iter, cache_level, flags);