From patchwork Fri Apr 14 07:33:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211069 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 13EF7C77B70 for ; Fri, 14 Apr 2023 07:34:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=o09jv8BIoFkcIyoVaZzZv66jbY6GkGxxzcdLcXqVU0w=; b=NBh+PA8dqFxm35 QQYRsnSIKjbEBbhj7UF3xq/fFYrLt6oNchZvP4zSM95omujDHGi1RJEuDG2gpWmWqy8OWwnAFL87P svYeJSnmTV3GeBhcxwoTQcEfxocxA149ExdmqJ2uE8cLr4kfKFfsBzLMsD1LT2inlziS8T/d1YfnI 3zrrtYsRbBs2BejDLUY8vyzB7oKMRHk1B3M5+LSsxtoOMv3apXeVAwYKPKj82t1Wg/NL8srhBDnJO mR4ibFQ+NWHDxXJcx2GzZbSqydnZYtgeZJ+RDkbJi6plPg2tb90wYl16y0o3J5MtTGpcYGRInkMOG oI9dc02yLzg3KZPfXcyw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pnDwY-008Ybg-2L; Fri, 14 Apr 2023 07:34:02 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pnDwK-008YTk-0J for linux-arm-kernel@lists.infradead.org; Fri, 14 Apr 2023 07:33:51 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33E7XYo3109385; Fri, 14 Apr 2023 02:33:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1681457614; bh=PRVKUkOO/KsQYzOx4Cr9T7afGzfEI+sYc+MKC478uBc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fHCHMr9hf4SLMR9mgQqb+dTkfrWQ/3Lm9Emx9/dEqLuy4bXf7ZJj3eSz8wmlyz6FG PoJuXadU4lZ5oEbTtkVGvNlQd5hqpGS/RIbrSWGQ8w6VdlyVmkCl/V+nT5UnSklkIP wEPsrGAVTZStdr1RtTSudZza3Bd0dUOCYmyinBEw= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33E7XYMX091059 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 14 Apr 2023 02:33:34 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 14 Apr 2023 02:33:34 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 14 Apr 2023 02:33:34 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33E7XYA8003016; Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 01/10] arm64: dts: ti: k3-am64: Add general purpose timers Date: Fri, 14 Apr 2023 02:33:19 -0500 Message-ID: <20230414073328.381336-2-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_235459_945AE0BA X-CRM114-Status: GOOD ( 15.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org There are 11 general purpose timers on am64 that can be used for things like PWM using pwm-omap-dmtimer driver. There are also additional four timers in the MCU domain that do not have interrupts routable for Linux. We configure the timers with the 25 MHz input clock by default as the 32.768 kHz clock may not be wired on the device. We leave the MCU domain timers clock mux unconfigured, and mark the MCU domain timers reserved. The MCU domain timers are likely reserved by the software for the ESM module. Compared to am65, the timers on am64 do not have a dedicated IO mux for the timers. On am62, the timers have different interrupts, clocks and power domains compared to am65, and the MCU timers are at a different IO address. Compared to AM62, the AM64 times have different clocks and count in main domain are different as well. Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 144 +++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi | 45 +++++++ 2 files changed, 189 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 5e8036f32d79..f5e25d6c3c28 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -228,6 +228,150 @@ epwm_tbclk: clock@4140 { }; }; + main_timer0: timer@2400000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2400000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 36 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 36 1>; + assigned-clock-parents = <&k3_clks 36 2>; + power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer1: timer@2410000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2410000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 37 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 37 1>; + assigned-clock-parents = <&k3_clks 37 2>; + power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer2: timer@2420000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2420000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 38 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 38 1>; + assigned-clock-parents = <&k3_clks 38 2>; + power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer3: timer@2430000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2430000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 39 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 39 1>; + assigned-clock-parents = <&k3_clks 39 2>; + power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer4: timer@2440000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2440000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 40 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 40 1>; + assigned-clock-parents = <&k3_clks 40 2>; + power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer5: timer@2450000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2450000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 41 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 41 1>; + assigned-clock-parents = <&k3_clks 41 2>; + power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer6: timer@2460000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2460000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 42 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 42 1>; + assigned-clock-parents = <&k3_clks 42 2>; + power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer7: timer@2470000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2470000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 43 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 43 1>; + assigned-clock-parents = <&k3_clks 43 2>; + power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer8: timer@2480000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2480000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 44 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 44 1>; + assigned-clock-parents = <&k3_clks 44 2>; + power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer9: timer@2490000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2490000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 45 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 45 1>; + assigned-clock-parents = <&k3_clks 45 2>; + power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer10: timer@24a0000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x24a0000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 46 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 46 1>; + assigned-clock-parents = <&k3_clks 46 2>; + power-domains = <&k3_pds 46 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + + main_timer11: timer@24b0000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x24b0000 0x00 0x400>; + interrupts = ; + clocks = <&k3_clks 47 1>; + clock-names = "fck"; + assigned-clocks = <&k3_clks 47 1>; + assigned-clock-parents = <&k3_clks 47 2>; + power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + }; + main_uart0: serial@2800000 { compatible = "ti,am64-uart", "ti,am654-uart"; reg = <0x00 0x02800000 0x00 0x100>; diff --git a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi index 38ddf0b3b8a0..31336b0e290e 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi @@ -6,6 +6,51 @@ */ &cbass_mcu { + /* + * The MCU domain timer interrupts are routed only to the ESM module, + * and not currently available for Linux. The MCU domain timers are + * of limited use without interrupts, and likely reserved by the ESM. + */ + mcu_timer0: timer@4800000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x4800000 0x00 0x400>; + clocks = <&k3_clks 35 1>; + clock-names = "fck"; + power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + status = "reserved"; + }; + + mcu_timer1: timer@4810000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x4810000 0x00 0x400>; + clocks = <&k3_clks 48 1>; + clock-names = "fck"; + power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + status = "reserved"; + }; + + mcu_timer2: timer@4820000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x4820000 0x00 0x400>; + clocks = <&k3_clks 49 1>; + clock-names = "fck"; + power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + status = "reserved"; + }; + + mcu_timer3: timer@4830000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x4830000 0x00 0x400>; + clocks = <&k3_clks 50 1>; + clock-names = "fck"; + power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>; + ti,timer-pwm; + status = "reserved"; + }; + mcu_uart0: serial@4a00000 { compatible = "ti,am64-uart", "ti,am654-uart"; reg = <0x00 0x04a00000 0x00 0x100>; From patchwork Fri Apr 14 07:33:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2B3F1C77B6E for ; Fri, 14 Apr 2023 07:35:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 02/10] arm64: dts: ti: k3-am642-sk: Fix mmc1 pinmux Date: Fri, 14 Apr 2023 02:33:20 -0500 Message-ID: <20230414073328.381336-3-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_542879_611B7435 X-CRM114-Status: UNSURE ( 8.80 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Fix the pinmux for pulldirection to get stable sdcard behavior. Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 2e2d40da360a..9a65f9b1c9ab 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -224,14 +224,15 @@ led-7 { &main_pmx0 { main_mmc1_pins_default: main-mmc1-pins-default { pinctrl-single,pins = < - AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */ + AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */ + AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */ + AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */ - AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* (L20) MMC1_CLK */ - AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */ - AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */ - AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */ - AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */ - AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */ + AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ + AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */ + AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */ + AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */ + AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */ >; }; From patchwork Fri Apr 14 07:33:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211065 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93443C77B70 for ; Fri, 14 Apr 2023 07:34:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 14 Apr 2023 02:33:34 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33E7XY88021418; Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 03/10] arm64: dts: ti: k3-am642-sk: Enable main_i2c0 and eeprom Date: Fri, 14 Apr 2023 02:33:21 -0500 Message-ID: <20230414073328.381336-4-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_557979_9881E704 X-CRM114-Status: UNSURE ( 9.04 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable AT24C512C on the base board. Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 9a65f9b1c9ab..3e16942c0add 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -251,6 +251,13 @@ AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ >; }; + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ + AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ + >; + }; + main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ @@ -350,6 +357,18 @@ &main_uart1 { status = "reserved"; }; +&main_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + eeprom@51 { + compatible = "atmel,24c512"; + reg = <0x51>; + }; +}; + &main_i2c1 { status = "okay"; pinctrl-names = "default"; From patchwork Fri Apr 14 07:33:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211064 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 411EDC77B6E for ; Fri, 14 Apr 2023 07:34:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 04/10] arm64: dts: ti: k3-am642-sk: Describe main_uart1 pins Date: Fri, 14 Apr 2023 02:33:22 -0500 Message-ID: <20230414073328.381336-5-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_511314_07D645ED X-CRM114-Status: GOOD ( 10.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Describe the main_uart1 pins even though it is a reserved node for hardware complete description. This is used by other users of device tree to help configure the SoC per board requirements. Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 3e16942c0add..da4121b2e2c6 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -245,6 +245,15 @@ AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ >; }; + main_uart1_pins_default: main-uart1-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ + AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ + AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */ + AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */ + >; + }; + main_usb0_pins_default: main-usb0-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ @@ -355,6 +364,8 @@ &main_uart0 { &main_uart1 { /* main_uart1 is reserved for firmware usage */ status = "reserved"; + pinctrl-names = "default"; + pinctrl-0 = <&main_uart1_pins_default>; }; &main_i2c0 { From patchwork Fri Apr 14 07:33:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EEB12C77B6E for ; Fri, 14 Apr 2023 07:35:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 05/10] arm64: dts: ti: k3-am642-sk: Rename regulator node name Date: Fri, 14 Apr 2023 02:33:23 -0500 Message-ID: <20230414073328.381336-6-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_699787_81156B94 X-CRM114-Status: GOOD ( 10.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Rename the regulator node names to the standard regulator-0.. numbers. Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index da4121b2e2c6..5bd69a8e8063 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -94,7 +94,7 @@ rtos_ipc_memory_region: ipc-memories@a5000000 { }; }; - vusb_main: fixed-regulator-vusb-main5v0 { + vusb_main: regulator-0 { /* USB MAIN INPUT 5V DC */ compatible = "regulator-fixed"; regulator-name = "vusb_main5v0"; @@ -104,7 +104,7 @@ vusb_main: fixed-regulator-vusb-main5v0 { regulator-boot-on; }; - vcc_3v3_sys: fixedregulator-vcc-3v3-sys { + vcc_3v3_sys: regulator-1 { /* output of LP8733xx */ compatible = "regulator-fixed"; regulator-name = "vcc_3v3_sys"; @@ -115,7 +115,7 @@ vcc_3v3_sys: fixedregulator-vcc-3v3-sys { regulator-boot-on; }; - vdd_mmc1: fixed-regulator-sd { + vdd_mmc1: regulator-2 { /* TPS2051BD */ compatible = "regulator-fixed"; regulator-name = "vdd_mmc1"; @@ -127,7 +127,7 @@ vdd_mmc1: fixed-regulator-sd { gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; }; - com8_ls_en: regulator-1 { + com8_ls_en: regulator-3 { compatible = "regulator-fixed"; regulator-name = "com8_ls_en"; regulator-min-microvolt = <3300000>; @@ -139,7 +139,7 @@ com8_ls_en: regulator-1 { gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>; }; - wlan_en: regulator-2 { + wlan_en: regulator-4 { /* output of SN74AVC4T245RSVR */ compatible = "regulator-fixed"; regulator-name = "wlan_en"; From patchwork Fri Apr 14 07:33:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211067 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6998CC77B71 for ; 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Fri, 14 Apr 2023 02:33:34 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 14 Apr 2023 02:33:34 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33E7XYcV055397; Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 06/10] arm64: dts: ti: k3-am642-evm: Enable main_i2c0 and eeprom Date: Fri, 14 Apr 2023 02:33:24 -0500 Message-ID: <20230414073328.381336-7-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_235504_23A3FCB3 X-CRM114-Status: UNSURE ( 9.78 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable AT24CM01 on the base board using the corresponding compatible. Signed-off-by: Nishanth Menon --- Note: checkpatch does a simple pattern search and fails to find a match #47: FILE: arch/arm64/boot/dts/ti/k3-am642-evm.dts:353: compatible = "atmel,24c1024"; But, Documentation/devicetree/bindings/eeprom/at24.yaml - items: pattern: cs1024$ Cleanly covers the same and dtbs_check looks clean. arch/arm64/boot/dts/ti/k3-am642-evm.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 39feea78a084..6456cc6d739b 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -233,6 +233,13 @@ AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */ >; }; + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ + AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ + >; + }; + main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ @@ -335,6 +342,19 @@ &main_uart1 { status = "reserved"; }; +&main_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + eeprom@50 { + /* AT24CM01 */ + compatible = "atmel,24c1024"; + reg = <0x50>; + }; +}; + &main_i2c1 { status = "okay"; pinctrl-names = "default"; From patchwork Fri Apr 14 07:33:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211068 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F286EC77B77 for ; Fri, 14 Apr 2023 07:34:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 14 Apr 2023 02:33:35 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33E7XYjS020521; Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 07/10] arm64: dts: ti: k3-am642-evm: Describe main_uart1 pins Date: Fri, 14 Apr 2023 02:33:25 -0500 Message-ID: <20230414073328.381336-8-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_549772_2FCA3375 X-CRM114-Status: GOOD ( 10.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Describe the main_uart1 pins even though it is a reserved node for hardware complete description. This is used by other users of device tree to help configure the SoC per board requirements. Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 6456cc6d739b..a1ed102a69f1 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -215,6 +215,15 @@ AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */ >; }; + main_uart1_pins_default: main-uart1-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ + AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ + AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */ + AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */ + >; + }; + main_uart0_pins_default: main-uart0-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ @@ -340,6 +349,8 @@ &main_uart0 { /* main_uart1 is reserved for firmware usage */ &main_uart1 { status = "reserved"; + pinctrl-names = "default"; + pinctrl-0 = <&main_uart1_pins_default>; }; &main_i2c0 { From patchwork Fri Apr 14 07:33:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211072 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 491B9C77B73 for ; Fri, 14 Apr 2023 07:35:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 14 Apr 2023 02:33:35 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33E7XY2H003022; Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 08/10] arm64: dts: ti: k3-am642-evm: Rename regulator node name Date: Fri, 14 Apr 2023 02:33:26 -0500 Message-ID: <20230414073328.381336-9-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_628696_1F11CB62 X-CRM114-Status: GOOD ( 10.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Rename the regulator node names to the standard regulator-0.. numbers. Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index a1ed102a69f1..9cf181d0199f 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -94,7 +94,7 @@ rtos_ipc_memory_region: ipc-memories@a5000000 { }; }; - evm_12v0: fixedregulator-evm12v0 { + evm_12v0: regulator-0 { /* main DC jack */ compatible = "regulator-fixed"; regulator-name = "evm_12v0"; @@ -104,7 +104,7 @@ evm_12v0: fixedregulator-evm12v0 { regulator-boot-on; }; - vsys_5v0: fixedregulator-vsys5v0 { + vsys_5v0: regulator-1 { /* output of LM5140 */ compatible = "regulator-fixed"; regulator-name = "vsys_5v0"; @@ -115,7 +115,7 @@ vsys_5v0: fixedregulator-vsys5v0 { regulator-boot-on; }; - vsys_3v3: fixedregulator-vsys3v3 { + vsys_3v3: regulator-2 { /* output of LM5140 */ compatible = "regulator-fixed"; regulator-name = "vsys_3v3"; @@ -126,7 +126,7 @@ vsys_3v3: fixedregulator-vsys3v3 { regulator-boot-on; }; - vdd_mmc1: fixed-regulator-sd { + vdd_mmc1: regulator-3 { /* TPS2051BD */ compatible = "regulator-fixed"; regulator-name = "vdd_mmc1"; @@ -138,7 +138,7 @@ vdd_mmc1: fixed-regulator-sd { gpio = <&exp1 6 GPIO_ACTIVE_HIGH>; }; - vddb: fixedregulator-vddb { + vddb: regulator-4 { compatible = "regulator-fixed"; regulator-name = "vddb_3v3_display"; regulator-min-microvolt = <3300000>; From patchwork Fri Apr 14 07:33:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 456D9C77B71 for ; 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Fri, 14 Apr 2023 02:33:34 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 14 Apr 2023 02:33:34 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33E7XYGb055402; Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 09/10] arm64: dts: ti: k3-am642-evm: Add VTT GPIO regulator for DDR Date: Fri, 14 Apr 2023 02:33:27 -0500 Message-ID: <20230414073328.381336-10-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_611995_C6B1FF96 X-CRM114-Status: UNSURE ( 9.54 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hold the DDR vtt regulator active for functionality. Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 9cf181d0199f..3d0b473d5252 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -148,6 +148,20 @@ vddb: regulator-4 { regulator-boot-on; }; + vtt_supply: regulator-5 { + compatible = "regulator-fixed"; + regulator-name = "vtt"; + pinctrl-names = "default"; + pinctrl-0 = <&ddr_vtt_pins_default>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&main_gpio0 12 GPIO_ACTIVE_HIGH>; + vin-supply = <&vsys_3v3>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + }; + leds { compatible = "gpio-leds"; @@ -338,6 +352,12 @@ AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */ AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */ >; }; + + ddr_vtt_pins_default: ddr-vtt-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */ + >; + }; }; &main_uart0 { From patchwork Fri Apr 14 07:33:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13211070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76E96C77B70 for ; Fri, 14 Apr 2023 07:35:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 14 Apr 2023 02:33:34 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33E7XYvI021430; Fri, 14 Apr 2023 02:33:34 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Neha Malcom Francis , Nikhil M Jain , Tom Rini Subject: [PATCH 10/10] arm64: dts: ti: k3-am642-sk|evm: Drop bootargs, add aliases Date: Fri, 14 Apr 2023 02:33:28 -0500 Message-ID: <20230414073328.381336-11-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414073328.381336-1-nm@ti.com> References: <20230414073328.381336-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_003348_539467_5EA68861 X-CRM114-Status: GOOD ( 10.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Drop bootargs and add aliases based on base pinout of SK as per [1] and evm per [2]. Indices chosen attempt to maintain some level of consistency with existing aliases. While at this, drop a extra EoL. While this patch could be split, it seems trivial to add additional cleanup steps. [1] https://www.ti.com/lit/df/sprr432/sprr432.pdf [2] https://www.ti.com/lit/zip/swrr171 Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am64.dtsi | 16 ---------------- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 15 +++++++++++++-- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 14 ++++++++++++-- 3 files changed, 25 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi index 60fe95b48312..d6262b5a0a10 100644 --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi @@ -19,22 +19,6 @@ / { #address-cells = <2>; #size-cells = <2>; - aliases { - serial0 = &mcu_uart0; - serial1 = &mcu_uart1; - serial2 = &main_uart0; - serial3 = &main_uart1; - serial4 = &main_uart2; - serial5 = &main_uart3; - serial6 = &main_uart4; - serial7 = &main_uart5; - serial8 = &main_uart6; - ethernet0 = &cpsw_port1; - ethernet1 = &cpsw_port2; - mmc0 = &sdhci0; - mmc1 = &sdhci1; - }; - chosen { }; firmware { diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 3d0b473d5252..3db740f78cd2 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -18,14 +18,25 @@ / { chosen { stdout-path = "serial2:115200n8"; - bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; + }; + + aliases { + serial0 = &mcu_uart0; + serial1 = &main_uart1; + serial2 = &main_uart0; + serial3 = &main_uart3; + i2c0 = &main_i2c0; + i2c1 = &main_i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + ethernet0 = &cpsw_port1; + ethernet1 = &cpsw_port2; }; memory@80000000 { device_type = "memory"; /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - }; reserved-memory { diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 5bd69a8e8063..003cff9a2799 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -18,14 +18,24 @@ / { chosen { stdout-path = "serial2:115200n8"; - bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; + }; + + aliases { + serial0 = &mcu_uart0; + serial1 = &main_uart1; + serial2 = &main_uart0; + i2c0 = &main_i2c0; + i2c1 = &main_i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + ethernet0 = &cpsw_port1; + ethernet1 = &cpsw_port2; }; memory@80000000 { device_type = "memory"; /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - }; reserved-memory {