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[86.9.131.95]) by smtp.gmail.com with ESMTPSA id q17-20020adfdfd1000000b002e4cd2ec5c7sm13514523wrn.86.2023.04.18.09.58.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 09:58:38 -0700 (PDT) From: Stafford Horne To: LKML Cc: Linux OpenRISC , Stafford Horne , Jonas Bonn , Stefan Kristiansson , Eric Biederman , Kees Cook , "Jason A. Donenfeld" , Dominik Brodowski , linux-mm@kvack.org Subject: [PATCH 3/4] openrisc: Support floating point user api Date: Tue, 18 Apr 2023 17:58:12 +0100 Message-Id: <20230418165813.1900991-4-shorne@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230418165813.1900991-1-shorne@gmail.com> References: <20230418165813.1900991-1-shorne@gmail.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 1056B4001B X-Stat-Signature: c46ugfnrpgcwwajsqjfyd9cb8xmzqzzz X-Rspam-User: X-Rspamd-Server: rspam08 X-HE-Tag: 1681837120-680964 X-HE-Meta: U2FsdGVkX19mO1fpREgzMHCAModlywFrNe5gS6pvTG3qfF3pY+ldQwkt1y4dYf1+/Cv7+Y7fe6cv5LwFwgc+30dJ8pzXkAvbKqQy3j4u2lUlmeQGmQ5ujAjE9PkNX2ga5zYzqoxeJYyoxJ2Xpa63kN3WSIZ7gQZFMZxN88iLohYV2DPxeLn1Y+nY47R+Y7w/m+W2zsLrGG508V/zeRY2mQDvtqCaf+f7BxuPuw162Hg7oAz9ZUNax/4m330pZXzdA6NTF339RHzbIh6+6+2hyLXxyIc4f050tf/cB8UhJMdPREEs23CgjhI5dMOl0jzkUOn7GJDNF/BnWHUIVpkWtFHd9tLrK24hPBcqDVNsyBjfsqg+aPJxkZifQEoRmQq+In7+5hNrW96Vxar9YleCTCYYPGANE42F3XkVn+LVthAjjg2RsA8w9xVs/7sOKcCYYX0ZjSH/gQi7JdqUc8moNy6uCfrBXcKXURbqE+bbF85nsCXjknnhYk8XXOH/f3LoJjOjeuE3UgBL2kop5JnSIFV6lquwlxDIuvHnVd0CG9knRNUSggH+xFxUgosZTqBWJvlLDRLrwvAB8LNMAQ+Dwwk9SRd1NvKGPy6wvm0P8i+uo+TR9He4r9MoIU/QJ6hprZn482kiSgkQs5ZsU1kRWdWcTGvIB+92B0stiPvUB4BBZKPwAYgnNUZRCEHMSvMKAcjQgsPKVIK7LA9nE4vQdD4ByltEL39DBKLBWNWgnLGLhw3n/49A8jn+0kaJK0/m2u8hbJ9BM7St0IHjnv+m+MZ8R+8p4HAmcizysMd/28Mi7T0YniBSg+KnNSxcNopJ215XL+/We01ZjpP6o2vawDZ5D4O5RfDyq8Y753X322fUswEq0AL8lz3FHZ5o3cNd9l8QSLaSRDD2jPiRcFTUG4yQ0kHnAouMxaP0RRX0UqzAtscaeaMQ0n/ikVhE0q/soGOy26R5Y5aqNg8dCgk oxYeO9hI coTm8trvULHcNkBw6P9ubxHTJlOnXgVVR7ghRdEpg9F+DL7oFI/5QbJ1x6pvygRn4thXDS07gYJPe5FX9fIJmTL9RdFPlH7a8rMZmC1bFpM4cV5HIXVlSppNPocwjB0BEoApfFqdQ80r6mc07u3OFY+ni9xZ3I4NrnWUoi9Mp39K/QTl4DLfbx9iQ4KwdTDmb3qwVNkILLoze9xXMIDxQFqkwoH1vCpQ42jbw8qMJGJ0i2ncxlkCxGx1rShz9+pfFlGKCRbGd8dYHcKOjwmhV9NCPx97xnMuVwY9ZxCv/zPENzy3SEyjGDXknkWKBHLG0muq+yMaV5xS0xHctbEBkxIzfBecqVZ/Z3fni4hJDI+cYXVTTl/mnW4lSNWy0khYPXUnC1Y3gkQwKGOUQuRpG5P7qL0od9Kbn4ZtlNLMY0HL7/0QktMIBd442SVB8mmFjLt7jmxcNrWLttFk= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Add support for handling floating point exceptions and forwarding the SIGFPE signal to processes. Also, add fpu state to sigcontext. Signed-off-by: Stafford Horne --- arch/openrisc/include/uapi/asm/elf.h | 3 +-- arch/openrisc/include/uapi/asm/ptrace.h | 4 ++++ arch/openrisc/include/uapi/asm/sigcontext.h | 1 + arch/openrisc/kernel/entry.S | 11 +++++++++-- arch/openrisc/kernel/head.S | 4 ++-- arch/openrisc/kernel/signal.c | 2 ++ arch/openrisc/kernel/traps.c | 22 +++++++++++++++++++++ 7 files changed, 41 insertions(+), 6 deletions(-) diff --git a/arch/openrisc/include/uapi/asm/elf.h b/arch/openrisc/include/uapi/asm/elf.h index e892d5061685..6868f81c281e 100644 --- a/arch/openrisc/include/uapi/asm/elf.h +++ b/arch/openrisc/include/uapi/asm/elf.h @@ -53,8 +53,7 @@ typedef unsigned long elf_greg_t; #define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) typedef elf_greg_t elf_gregset_t[ELF_NGREG]; -/* A placeholder; OR32 does not have fp support yes, so no fp regs for now. */ -typedef unsigned long elf_fpregset_t; +typedef struct __or1k_fpu_state elf_fpregset_t; /* EM_OPENRISC is defined in linux/elf-em.h */ #define EM_OR32 0x8472 diff --git a/arch/openrisc/include/uapi/asm/ptrace.h b/arch/openrisc/include/uapi/asm/ptrace.h index d4fab268f6aa..a77cc9915ca8 100644 --- a/arch/openrisc/include/uapi/asm/ptrace.h +++ b/arch/openrisc/include/uapi/asm/ptrace.h @@ -30,6 +30,10 @@ struct user_regs_struct { unsigned long pc; unsigned long sr; }; + +struct __or1k_fpu_state { + unsigned long fpcsr; +}; #endif diff --git a/arch/openrisc/include/uapi/asm/sigcontext.h b/arch/openrisc/include/uapi/asm/sigcontext.h index 8ab775fc3450..ca585e4af6b8 100644 --- a/arch/openrisc/include/uapi/asm/sigcontext.h +++ b/arch/openrisc/include/uapi/asm/sigcontext.h @@ -28,6 +28,7 @@ struct sigcontext { struct user_regs_struct regs; /* needs to be first */ + struct __or1k_fpu_state fpu; unsigned long oldmask; }; diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S index c7b47e571220..c9f48e750b72 100644 --- a/arch/openrisc/kernel/entry.S +++ b/arch/openrisc/kernel/entry.S @@ -848,9 +848,16 @@ _syscall_badsys: /******* END SYSCALL HANDLING *******/ -/* ---[ 0xd00: Trap exception ]------------------------------------------ */ +/* ---[ 0xd00: Floating Point exception ]-------------------------------- */ -UNHANDLED_EXCEPTION(_vector_0xd00,0xd00) +EXCEPTION_ENTRY(_fpe_trap_handler) + CLEAR_LWA_FLAG(r3) + /* r4: EA of fault (set by EXCEPTION_HANDLE) */ + l.jal do_fpe_trap + l.addi r3,r1,0 /* pt_regs */ + + l.j _ret_from_exception + l.nop /* ---[ 0xe00: Trap exception ]------------------------------------------ */ diff --git a/arch/openrisc/kernel/head.S b/arch/openrisc/kernel/head.S index e11699f3d6bd..439e00f81e5d 100644 --- a/arch/openrisc/kernel/head.S +++ b/arch/openrisc/kernel/head.S @@ -424,9 +424,9 @@ _dispatch_do_ipage_fault: .org 0xc00 EXCEPTION_HANDLE(_sys_call_handler) -/* ---[ 0xd00: Trap exception ]------------------------------------------ */ +/* ---[ 0xd00: Floating point exception ]--------------------------------- */ .org 0xd00 - UNHANDLED_EXCEPTION(_vector_0xd00) + EXCEPTION_HANDLE(_fpe_trap_handler) /* ---[ 0xe00: Trap exception ]------------------------------------------ */ .org 0xe00 diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c index 80f69740c731..4664a18f0787 100644 --- a/arch/openrisc/kernel/signal.c +++ b/arch/openrisc/kernel/signal.c @@ -50,6 +50,7 @@ static int restore_sigcontext(struct pt_regs *regs, err |= __copy_from_user(regs, sc->regs.gpr, 32 * sizeof(unsigned long)); err |= __copy_from_user(®s->pc, &sc->regs.pc, sizeof(unsigned long)); err |= __copy_from_user(®s->sr, &sc->regs.sr, sizeof(unsigned long)); + err |= __copy_from_user(®s->fpcsr, &sc->fpu.fpcsr, sizeof(unsigned long)); /* make sure the SM-bit is cleared so user-mode cannot fool us */ regs->sr &= ~SPR_SR_SM; @@ -112,6 +113,7 @@ static int setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) err |= __copy_to_user(sc->regs.gpr, regs, 32 * sizeof(unsigned long)); err |= __copy_to_user(&sc->regs.pc, ®s->pc, sizeof(unsigned long)); err |= __copy_to_user(&sc->regs.sr, ®s->sr, sizeof(unsigned long)); + err |= __copy_to_user(&sc->fpu.fpcsr, ®s->fpcsr, sizeof(unsigned long)); return err; } diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c index f5bbe6b55849..0aa6b07efda1 100644 --- a/arch/openrisc/kernel/traps.c +++ b/arch/openrisc/kernel/traps.c @@ -243,6 +243,28 @@ asmlinkage void unhandled_exception(struct pt_regs *regs, int ea, int vector) die("Oops", regs, 9); } +asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) +{ + int code = FPE_FLTUNK; + unsigned long fpcsr = regs->fpcsr; + + if (fpcsr & SPR_FPCSR_IVF) + code = FPE_FLTINV; + else if (fpcsr & SPR_FPCSR_OVF) + code = FPE_FLTOVF; + else if (fpcsr & SPR_FPCSR_UNF) + code = FPE_FLTUND; + else if (fpcsr & SPR_FPCSR_DZF) + code = FPE_FLTDIV; + else if (fpcsr & SPR_FPCSR_IXF) + code = FPE_FLTRES; + + /* Clear all flags */ + regs->fpcsr &= ~SPR_FPCSR_ALLF; + + force_sig_fault(SIGFPE, code, (void __user *)regs->pc); +} + asmlinkage void do_trap(struct pt_regs *regs, unsigned long address) { force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->pc);