From patchwork Wed Apr 19 22:33:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13217592 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1C3C3C77B7C for ; Wed, 19 Apr 2023 22:34:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=A/tKEDkUOwDrmDi2Lamx+60se45M/rijQv0dysYNS9I=; b=CGaA7lZusT4U0z x1JLWIObneduKNEhaBIxiHOkvv7sQ5FmaT/9zQVbLA2LVnfDhxy3C19t1rQ+uY76RdFkEvEN6LMsd Vy9TNaQ2AGvdt311YmdRRr2pZhTQMLqVZ5a/M2HVSNRa2um4NJRCEUBqopCiXH6gWcXNRwIq6QUkT k5f++0e+xMG5mXX0mKE6i7ttxRHVynvUmgtDVYGoIqzwa92gO+kMzj1E6zrqFCoP1fGJBl+pR3Zym d8BFxsBPzME9ic7ArlMfSY5j4Hv9kyAR8PjmoOUzXfRo7sLhy9QJZ+fO5SCPu3GsfNHdKzwrWeYZe wKUabMPEwN+uopAW3J2w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1ppGN9-006Vqw-1l; Wed, 19 Apr 2023 22:33:55 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1ppGMz-006Vod-2q for linux-arm-kernel@lists.infradead.org; Wed, 19 Apr 2023 22:33:48 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33JMXOWl117876; Wed, 19 Apr 2023 17:33:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1681943604; bh=+0GoZhNulQJ5to302kKOEYuwOpVd4qY+OKEXXTzt2gs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=AEnDSCjU1YevQKm6vSblyj0zz13b0JtUg70o9nr7Rd3QjO+enGPd4pw7Lx6Axl2hD WtGTyC+XSJ0IdtLW6iBjB7fi/9TUFoNyjxbsbCTzuybqC41RkAyioWtTgqTYpe9Sym spPnJJbHGgsNdn7/ZK3tRRQzdUV3EyPuJ/ztIM58= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33JMXONe102532 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 19 Apr 2023 17:33:24 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 19 Apr 2023 17:33:23 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 19 Apr 2023 17:33:23 -0500 Received: from a0498204.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33JMXNLW015736; Wed, 19 Apr 2023 17:33:23 -0500 From: Judith Mendez To: Chandrasekar Ramakrishnan , Wolfgang Grandegger , Marc Kleine-Budde CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Oliver Hartkopp , Judith Mendez , , , , , Subject: [PATCH 1/4] can: m_can: Add hrtimer to generate software interrupt Date: Wed, 19 Apr 2023 17:33:20 -0500 Message-ID: <20230419223323.20384-2-jm@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230419223323.20384-1-jm@ti.com> References: <20230419223323.20384-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230419_153346_020928_142987B3 X-CRM114-Status: GOOD ( 18.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add an hrtimer to MCAN struct. Each MCAN will have its own hrtimer instantiated if there is no hardware interrupt found. The hrtimer will generate a software interrupt every 1 ms. In hrtimer callback, we check if there is a transaction pending by reading a register, then process by calling the isr if there is. Signed-off-by: Judith Mendez --- drivers/net/can/m_can/m_can.c | 30 ++++++++++++++++++++++++-- drivers/net/can/m_can/m_can.h | 3 +++ drivers/net/can/m_can/m_can_platform.c | 13 +++++++++-- 3 files changed, 42 insertions(+), 4 deletions(-) diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c index a5003435802b..8784bdea300a 100644 --- a/drivers/net/can/m_can/m_can.c +++ b/drivers/net/can/m_can/m_can.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "m_can.h" @@ -1587,6 +1588,11 @@ static int m_can_close(struct net_device *dev) if (!cdev->is_peripheral) napi_disable(&cdev->napi); + if (dev->irq < 0) { + dev_dbg(cdev->dev, "Disabling the hrtimer\n"); + hrtimer_cancel(&cdev->hrtimer); + } + m_can_stop(dev); m_can_clk_stop(cdev); free_irq(dev->irq, dev); @@ -1793,6 +1799,18 @@ static netdev_tx_t m_can_start_xmit(struct sk_buff *skb, return NETDEV_TX_OK; } +enum hrtimer_restart hrtimer_callback(struct hrtimer *timer) +{ + struct m_can_classdev *cdev = + container_of(timer, struct m_can_classdev, hrtimer); + + m_can_isr(0, cdev->net); + + hrtimer_forward_now(timer, ms_to_ktime(1)); + + return HRTIMER_RESTART; +} + static int m_can_open(struct net_device *dev) { struct m_can_classdev *cdev = netdev_priv(dev); @@ -1827,13 +1845,21 @@ static int m_can_open(struct net_device *dev) } INIT_WORK(&cdev->tx_work, m_can_tx_work_queue); - err = request_threaded_irq(dev->irq, NULL, m_can_isr, IRQF_ONESHOT, dev->name, dev); + } else { - err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name, + if (dev->irq > 0) { + err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name, dev); + } + + else { + dev_dbg(cdev->dev, "Enabling the hrtimer\n"); + cdev->hrtimer.function = &hrtimer_callback; + hrtimer_start(&cdev->hrtimer, ns_to_ktime(0), HRTIMER_MODE_REL_PINNED); + } } if (err < 0) { diff --git a/drivers/net/can/m_can/m_can.h b/drivers/net/can/m_can/m_can.h index a839dc71dc9b..ed046d77fdb9 100644 --- a/drivers/net/can/m_can/m_can.h +++ b/drivers/net/can/m_can/m_can.h @@ -28,6 +28,7 @@ #include #include #include +#include /* m_can lec values */ enum m_can_lec_type { @@ -93,6 +94,8 @@ struct m_can_classdev { int is_peripheral; struct mram_cfg mcfg[MRAM_CFG_NUM]; + + struct hrtimer hrtimer; }; struct m_can_classdev *m_can_class_allocate_dev(struct device *dev, int sizeof_priv); diff --git a/drivers/net/can/m_can/m_can_platform.c b/drivers/net/can/m_can/m_can_platform.c index 9c1dcf838006..7540db74b7d0 100644 --- a/drivers/net/can/m_can/m_can_platform.c +++ b/drivers/net/can/m_can/m_can_platform.c @@ -7,6 +7,7 @@ #include #include +#include #include "m_can.h" @@ -98,8 +99,16 @@ static int m_can_plat_probe(struct platform_device *pdev) addr = devm_platform_ioremap_resource_byname(pdev, "m_can"); irq = platform_get_irq_byname(pdev, "int0"); if (IS_ERR(addr) || irq < 0) { - ret = -EINVAL; - goto probe_fail; + if (irq == -EPROBE_DEFER) { + ret = -EPROBE_DEFER; + goto probe_fail; + } + if (IS_ERR(addr)) { + ret = PTR_ERR(addr); + goto probe_fail; + } + dev_dbg(mcan_class->dev, "Failed to get irq, initialize hrtimer\n"); + hrtimer_init(&mcan_class->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED); } /* message ram could be shared */ From patchwork Wed Apr 19 22:33:21 2023 Content-Type: text/plain; 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Wed, 19 Apr 2023 17:33:23 -0500 From: Judith Mendez To: Chandrasekar Ramakrishnan , Wolfgang Grandegger , Marc Kleine-Budde CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Oliver Hartkopp , Judith Mendez , , , , , Subject: [PATCH 2/4] dt-bindings: net: can: Make interrupt attributes optional for MCAN Date: Wed, 19 Apr 2023 17:33:21 -0500 Message-ID: <20230419223323.20384-3-jm@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230419223323.20384-1-jm@ti.com> References: <20230419223323.20384-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230419_153345_404909_6B4CA3E1 X-CRM114-Status: UNSURE ( 9.78 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org For MCAN, remove interrupt and interrupt names from the required section. On AM62x SoC, MCANs on MCU domain do not have hardware interrupt routed to A53 Linux, instead they will use software interrupt by hrtimer. Make interrupt attributes optional in MCAN node by removing from required section. Signed-off-by: Judith Mendez Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/net/can/bosch,m_can.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml index 67879aab623b..43f1aa9addc0 100644 --- a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml +++ b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml @@ -122,8 +122,6 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names - clocks - clock-names - bosch,mram-cfg From patchwork Wed Apr 19 22:33:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13217589 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE3F5C77B75 for ; Wed, 19 Apr 2023 22:34:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4hZx7CkeOEmuJhoNXLuBqj00WGxEmQbpARJQnh50Wlc=; b=Kma4RVEW3Fr1lW U3TK4oBeVhZpkf21IRfDY6u4zk+buJ1z6hErMocsY6DHMSBrQAJi5Gmkg0X9GZmY5k/8TDZ6rzaxL i8NOnKe3dNsZUwn92bN9ID1N7YraB6CxyJPvzQLrX4jHSNC+mlsmzcfkXrf+kL2L736pcjs0ln7N4 UxG9cH1vzeB03WAdDsbrICG1DpvdsPyIrr8g5VEsfaYqPM/sU+E78peyI0m5QNu1/04s2B8DdVUa4 h70iPhOy+8jPWkVJWqBw+1nYIX/excJD5f88MuzwPdJA2owP19buA9A9HThnp2njQNl/SiVVxNdf0 +rgE2So7attemZPC6New==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1ppGN8-006Vqp-1t; Wed, 19 Apr 2023 22:33:54 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1ppGMz-006VoW-1Q for linux-arm-kernel@lists.infradead.org; Wed, 19 Apr 2023 22:33:47 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33JMXO6e078079; Wed, 19 Apr 2023 17:33:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1681943604; bh=OrWMLGnqJwjHMR2zESshsELG2IHJFL0T+AwlGIO3pco=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FQbPTeoyNkBPYpWOYcbN9XBT9hTBpXTj/II18vwjA7MVdmFljCrDMGYsR8Xj5oTOb Ebkmb+D7pylbJPEslARZxtZXq6nOKKG1mMukZke5GWdUKIsVyMfZX15/h0xcinBk8o 10DjKnxjfqUFVyElXJIaFfn0kiphe5gyEeZ5oNnY= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33JMXOk7027126 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 19 Apr 2023 17:33:24 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 19 Apr 2023 17:33:24 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 19 Apr 2023 17:33:24 -0500 Received: from a0498204.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33JMXNLY015736; Wed, 19 Apr 2023 17:33:23 -0500 From: Judith Mendez To: Chandrasekar Ramakrishnan , Wolfgang Grandegger , Marc Kleine-Budde CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Oliver Hartkopp , Judith Mendez , , , , , Subject: [PATCH 3/4] DO_NOT_MERGE arm64: dts: ti: Add AM62x MCAN MAIN domain transceiver overlay Date: Wed, 19 Apr 2023 17:33:22 -0500 Message-ID: <20230419223323.20384-4-jm@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230419223323.20384-1-jm@ti.com> References: <20230419223323.20384-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230419_153345_580245_091DE549 X-CRM114-Status: GOOD ( 14.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add an overlay for main domain MCAN on AM62x SK. The AM62x SK board does not have on-board CAN transceiver so instead of changing the DTB permanently, add an overlay to enable MAIN domain MCAN and support for 1 CAN transceiver. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/Makefile | 2 ++ .../boot/dts/ti/k3-am625-sk-mcan-main.dtso | 35 +++++++++++++++++++ 2 files changed, 37 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index c83c9d772b81..abe15e76b614 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -9,8 +9,10 @@ # alphabetically. # Boards with AM62x SoC +k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb # Boards with AM62Ax SoC diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso new file mode 100644 index 000000000000..72b68fd51121 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * DT overlay for MCAN transceiver in main domain on AM625 SK + * + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + transceiver1: can-phy0 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; +}; + +&main_pmx0 { + main_mcan0_pins_default: main-mcan0-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ + AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ + >; + }; +}; + +&main_mcan0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan0_pins_default>; + phys = <&transceiver1>; +}; From patchwork Wed Apr 19 22:33:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13217590 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DEB66C77B73 for ; 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Wed, 19 Apr 2023 17:33:24 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 19 Apr 2023 17:33:24 -0500 Received: from a0498204.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33JMXNLZ015736; Wed, 19 Apr 2023 17:33:24 -0500 From: Judith Mendez To: Chandrasekar Ramakrishnan , Wolfgang Grandegger , Marc Kleine-Budde CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Oliver Hartkopp , Judith Mendez , , , , , Subject: [PATCH 4/4] DO_NOT_MERGE arm64: dts: ti: Enable MCU MCANs for AM62x Date: Wed, 19 Apr 2023 17:33:23 -0500 Message-ID: <20230419223323.20384-5-jm@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230419223323.20384-1-jm@ti.com> References: <20230419223323.20384-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230419_153345_739390_EA481EBE X-CRM114-Status: GOOD ( 16.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On AM62x there are no hardware interrupts routed to GIC interrupt controller for MCU MCAN IP, A53 Linux cannot receive hardware interrupts. Since an hrtimer will be used to generate software interrupts, add MCU MCAN nodes to dtsi and default to disabled. AM62x does not carry on-board CAN transceivers, so instead of changing DTB permanently use an overlay to enable MCU MCANs and to add CAN transceiver nodes. If an hrtimer is used to generate software interrupts, the two required interrupt attributes in the MCAN node do not have to be included. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/Makefile | 2 +- arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++ .../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso | 55 +++++++++++++++++++ 3 files changed, 80 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index abe15e76b614..c76be3888e4d 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -9,7 +9,7 @@ # alphabetically. # Boards with AM62x SoC -k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo +k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo k3-am625-sk-mcan-mcu.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi index 076601a41e84..20462f457643 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi @@ -141,4 +141,28 @@ /* Tightly coupled to M4F */ status = "reserved"; }; + + mcu_mcan1: can@4e00000 { + compatible = "bosch,m_can"; + reg = <0x00 0x4e00000 0x00 0x8000>, + <0x00 0x4e08000 0x00 0x200>; + reg-names = "message_ram", "m_can"; + power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 188 6>, <&k3_clks 188 1>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + mcu_mcan2: can@4e10000 { + compatible = "bosch,m_can"; + reg = <0x00 0x4e10000 0x00 0x8000>, + <0x00 0x4e18000 0x00 0x200>; + reg-names = "message_ram", "m_can"; + power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 189 6>, <&k3_clks 189 1>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso new file mode 100644 index 000000000000..7a527fdd4981 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * DT overlay for MCAN in MCU domain on AM625 SK + * + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + transceiver2: can-phy1 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; + + transceiver3: can-phy2 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; +}; + +&mcu_pmx0 { + mcu_mcan1_pins_default: mcu-mcan1-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ + AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan2_pins_default: mcu-mcan2-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */ + AM62X_IOPAD(0x03C, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */ + >; + }; +}; + +&mcu_mcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_pins_default>; + phys = <&transceiver2>; + status = "okay"; +}; + +&mcu_mcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan2_pins_default>; + phys = <&transceiver3>; + status = "okay"; +};