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bh=lFIM3SiRtcb8O9YKp++Jg0PUJfBH52f31PGcowvaHDw=; b=lpA3wwoToc+KPjjWEzXzuvchZOqKlqTs9lapcFLzPzjiZxS4FWMvO82D XAUehHDRmgYhPpNx21RfiYWFTpvwwma41+tRwOyAXnWTl0ujfSth2oclh i6d6gDZDgYsAvVVrgi248xc9ltRzMoo1pWVJi/m3J9TqDlG8a8wBZ/eRK vKOyJL5A1KAjXVLXtMa0ajrqCzqtF4qvfDTwsbZ78zi8VFpq6kMLlOY1X rwEbxNavJ9zGBJ2AeY+BSnrwhuOyECbwoMq8Is+YSbauv/h/xZvSgib0j pzETpJayZd96/W6kcY8IuC6R7r71DVDYXoyKn9tUQd8CYml89J7ouONxF Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10689"; a="326696561" X-IronPort-AV: E=Sophos;i="5.99,222,1677571200"; d="scan'208";a="326696561" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2023 23:54:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10689"; a="867376670" X-IronPort-AV: E=Sophos;i="5.99,222,1677571200"; d="scan'208";a="867376670" Received: from yhuang6-mobl2.sh.intel.com ([10.238.7.50]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2023 23:54:19 -0700 From: Huang Ying To: Andrew Morton , Nadav Amit Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, Huang Ying , kernel test robot , haoxin , Mel Gorman , Hugh Dickins , Matthew Wilcox , David Hildenbrand Subject: [PATCH -V2] mm,unmap: avoid flushing TLB in batch if PTE is inaccessible Date: Mon, 24 Apr 2023 14:54:08 +0800 Message-Id: <20230424065408.188498-1-ying.huang@intel.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Stat-Signature: te43qtnrgks1ghyt1as6gjp3u657hjy7 X-Rspam-User: X-Rspamd-Queue-Id: 9FAF114000A X-Rspamd-Server: rspam06 X-HE-Tag: 1682319266-938271 X-HE-Meta: U2FsdGVkX197aJjH3/DOWdN+VCqOraFOGm68wnPBsaBouLSUs0uZMUYd88108Ysby+XIm57UVtouoYLRosrPNhOybrTd5KCS2hjQdZEYz7qA2FUVt/lFOWaD1/Xb8/4W4tyROrHYPpI4htwW7Jf8NlsHwGfSVlGFvEGP9HF4CHMU+H4mVr8epZNvB0oC4p0QCibblM7/xBNVusnLXB2eaBkYTLR3qZMrwLN/j85JfmfA8lsnbht03mmxiB+78NPmqFVG79V5kguMEISa4KcALS01xhAw91LSJWVKjjRgHqos7+ujrk8lkgPK7jq0U/csI0bxJslWuVa0ZL46E0j4jByAk7sfm1vg0fPE0KlYDWs7Z6MzSqfmDFLgBDrq3Zj1UZc7nfGZeT2IkDMg8xlq3S6Miqr6gVHwv9eK+wy0wIFtqH5MaN9IR15NVQjiHqHuAweCvIou/U2B01GwZO5nW8Q1v5roqQJ9unpFsoSkcOczTypm+OhRid9KCHmQqTaV48LfCPZ6iCOB+mpkOQtAjwRG+j7cK4mqoHmoUngPVjZDaLs0Wuy+j1TLyIf+A0qw3chqp02Ql1+KAYk/vAY8vxU2X0oUxFJJvlBfAcDIly1EJaGJlPUhuFWqeC3P38Ik8vFW7hh/idVAyr10VHTQil0RcxK2ANEUf4zULjd3OZUVz3XHFqZbOAQoLSThZdksBQUNImeokwnrrCf9vhGYMQIWXmrvwlMH60ib9rJQ1nxaAxwRNmu55aSKoLbt1sx6THP7+2EV3hzvBkt1UtfFvoE30/waa1E/WWfm58QuykCRhZzpd9kQiIbLzOhT8/D8ujN6uud1eEDyXrF7crplYsHTRXuxV/zsI9ffUrMaBgkfPwdzJSXZHAKy+WP6Ye2H+cPjPQvyk1tAhtIvGAySAfrT//twkaSPkTCHGpPqtTtZx8N/QJw80MDY1e1x6F0qqDD+WwKsWSmpXCZj8Tg GQ+aRkzC 0CA3Rkn1dCzXypiFWiGApRC2BUrwTOKrJ8bwV3xuaiwcIC0Ri4S4JihSHs3fZ0d2xhNxuvdQx4WcoJjKHSyaq0YUhCncStrHm8pvBBRIFiedoA5CwQKTH+kkZqyy2WgALy35iLVpsOLf+Yez0FZUE661ejsDeQLSRKHepDyF0sIbOnleT2rna4R8qdtotj60T005UO01Bc/cmxbx7tVHlCI4r5FS+2snxA+M4e0akbv6fi0z7xP+S4+EezjOOVNY+m3Z80o3Bg/tKXvYiM2iLLnEqpZFhmrfTz/tfxwOHq0LH0GrCLcvqBbTZFPmuLuCqPDouM3L/fdzjMn3sPoZiifkp5paMunZAq29KjGLMUtxkbMdj6YbKHy3U1nIAOb09Z9mO1unrT+aZ9C/hfQZePRy5I5vYwiycv9Z8eYbiEhJ8kTk= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi, Andrew, The version 1 of this patch was merged in mm-unstable branch. If you want to move that patch into mm-stable recently, it may be better to update that patch with this new version firstly. If you want to do that after v6.4-rc1, I will rebase this patch and resend it after v6.4-rc1 is released. Hi, Amit, The patch has been changed based on comments from Xin. I keep your "reviewed-by" because I think the change is trivial. But if you think it's inappropriate, I will change that. Best Regards, Huang, Ying ------------------------------->8------------------------------------------ 0Day/LKP reported a performance regression for commit 7e12beb8ca2a ("migrate_pages: batch flushing TLB"). In the commit, the TLB flushing during page migration is batched. So, in try_to_migrate_one(), ptep_clear_flush() is replaced with set_tlb_ubc_flush_pending(). In further investigation, it is found that the TLB flushing can be avoided in ptep_clear_flush() if the PTE is inaccessible. In fact, we can optimize in similar way for the batched TLB flushing too to improve the performance. So in this patch, we check pte_accessible() before set_tlb_ubc_flush_pending() in try_to_unmap/migrate_one(). Tests show that the benchmark score of the anon-cow-rand-mt test case of vm-scalability test suite can improve up to 2.1% with the patch on a Intel server machine. The TLB flushing IPI can reduce up to 44.3%. Link: https://lore.kernel.org/oe-lkp/202303192325.ecbaf968-yujie.liu@intel.com Link: https://lore.kernel.org/oe-lkp/ab92aaddf1b52ede15e2c608696c36765a2602c1.camel@intel.com/ Fixes: 7e12beb8ca2a ("migrate_pages: batch flushing TLB") Reported-by: kernel test robot Signed-off-by: "Huang, Ying" Reviewed-by: Nadav Amit Cc: haoxin Cc: Mel Gorman Cc: Hugh Dickins Cc: Matthew Wilcox (Oracle) Cc: David Hildenbrand Reviewed-by: Xin Hao --- mm/rmap.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/mm/rmap.c b/mm/rmap.c index 8632e02661ac..be19232e94f4 100644 --- a/mm/rmap.c +++ b/mm/rmap.c @@ -641,10 +641,14 @@ void try_to_unmap_flush_dirty(void) #define TLB_FLUSH_BATCH_PENDING_LARGE \ (TLB_FLUSH_BATCH_PENDING_MASK / 2) -static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable) +static void set_tlb_ubc_flush_pending(struct mm_struct *mm, pte_t pteval) { struct tlbflush_unmap_batch *tlb_ubc = ¤t->tlb_ubc; int batch, nbatch; + bool writable = pte_dirty(pteval); + + if (!pte_accessible(mm, pteval)) + return; arch_tlbbatch_add_mm(&tlb_ubc->arch, mm); tlb_ubc->flush_required = true; @@ -731,7 +735,7 @@ void flush_tlb_batched_pending(struct mm_struct *mm) } } #else -static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable) +static void set_tlb_ubc_flush_pending(struct mm_struct *mm, pte_t pteval) { } @@ -1582,7 +1586,7 @@ static bool try_to_unmap_one(struct folio *folio, struct vm_area_struct *vma, */ pteval = ptep_get_and_clear(mm, address, pvmw.pte); - set_tlb_ubc_flush_pending(mm, pte_dirty(pteval)); + set_tlb_ubc_flush_pending(mm, pteval); } else { pteval = ptep_clear_flush(vma, address, pvmw.pte); } @@ -1963,7 +1967,7 @@ static bool try_to_migrate_one(struct folio *folio, struct vm_area_struct *vma, */ pteval = ptep_get_and_clear(mm, address, pvmw.pte); - set_tlb_ubc_flush_pending(mm, pte_dirty(pteval)); + set_tlb_ubc_flush_pending(mm, pteval); } else { pteval = ptep_clear_flush(vma, address, pvmw.pte); }