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[24.22.235.96]) by smtp.gmail.com with ESMTPSA id i1sm7228759pgb.46.2019.01.31.12.45.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 31 Jan 2019 12:45:30 -0800 (PST) From: Andrey Smirnov To: Shawn Guo Subject: [PATCH] arm64: dts: imx8mq: Make GPC default interrupt parent Date: Thu, 31 Jan 2019 12:45:24 -0800 Message-Id: <20190131204524.1218-1-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190131_154537_227511_38F53496 X-CRM114-Status: GOOD ( 12.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "A.s. Dong" , Richard Zhu , linux-arm-kernel@lists.infradead.org, Andrey Smirnov , linux-kernel@vger.kernel.org, linux-imx@nxp.com, Fabio Estevam , Leonard Crestez , Chris Healy , Lucas Stach Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Now that the GPCv2 driver supports i.MX8MQ, make GPC default interrupt parent. Signed-off-by: Andrey Smirnov Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index d20e5c7e21a3..e9aa64156577 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -12,8 +12,7 @@ #include "imx8mq-pinfunc.h" / { - /* This should really be the GPC, but we need a driver for this first */ - interrupt-parent = <&gic>; + interrupt-parent = <&gpc>; #address-cells = <2>; #size-cells = <2>; @@ -265,6 +264,11 @@ compatible = "fsl,imx8mq-gpc"; reg = <0x303a0000 0x10000>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + pgc { #address-cells = <1>; #size-cells = <0>;