From patchwork Tue May 2 01:07:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 13228408 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33675C77B73 for ; Tue, 2 May 2023 01:08:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0E59610E05A; Tue, 2 May 2023 01:08:13 +0000 (UTC) Received: from mail-il1-x12b.google.com (mail-il1-x12b.google.com [IPv6:2607:f8b0:4864:20::12b]) by gabe.freedesktop.org (Postfix) with ESMTPS id B5F8110E0E3 for ; Tue, 2 May 2023 01:08:10 +0000 (UTC) Received: by mail-il1-x12b.google.com with SMTP id e9e14a558f8ab-32a249b416fso26625805ab.1 for ; Mon, 01 May 2023 18:08:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682989689; x=1685581689; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5CznWtXBlBAUTzPhoV/NK/Tc5LdU+0am6ActqKsQmdk=; b=sGjC/BfHQKk3rDUml7ijRHKM0pXWzke2GrLRzRR+xcpFrxO0uohJ0YdskPS1bMLNzh pB8XRGAmSu3fl1blwyYMaa9ezsTd87eBoM3uYUzcaAI2wJtFHff/uVkPfgQEJOhaLr3F bqfPy0oMOnM8dvJfEots5dO3NlUNuj12qD5wC5lA+RSMlHINRHgnPSTpfqfmfBQmqEP4 gJWX08PVIv/gVoNRlQFbPJ3UcHsitAPl8v77r1ER95ZAaid2gSmwZx9iOvDs1WJNSyE1 vkXH5lOe6dbeC/gtSnCREpT8JpCtMIGQqIX3gP6HYGNWkPG+3O51ZM3uOwYFY8MtBmoe kVKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682989689; x=1685581689; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5CznWtXBlBAUTzPhoV/NK/Tc5LdU+0am6ActqKsQmdk=; b=GlByXFRg6gdt6a3qHvIKiiwKgtivgvTdgVFE575ZxD7RDMSyB/Gpxy+ubHG4qK2xii CjAHcB+a6AQu/mqOmMhc+BazUcJlZOq7hf4mJNyIiOV4y9mrFttPuoAi+9BOfb/VYPq5 29n++lZZfiyb3STDKpGbohn2Ffje4UkFwApjkcxtVrgHhw0HX4NMJ/F4B4bsRfdPZvU6 hw+2GpiU+nopMFWVLfzgCL3Ahf/NQoqdTqc/Z0ABnI3ysOIL2/6rzgmqWOmVl4ov+idg 3UiWAIoiXcPZiE4eKjznOX9QapcJ/daTMsz9sC5WOofMf+fZxl5mVV7VKp8ehkbclGFV sMYA== X-Gm-Message-State: AC+VfDytzVIZRlsiR+PHcAco0nwGjJZS5j5d1CSNrgsaVLr1F3V3+cmg HAWob3fnPF1P60oLOhRucj6G4mn4Y/wx2Q== X-Google-Smtp-Source: ACHHUZ7+TNOY1Xm1LVgBiXB3LZ7WuMYw79Ybwll8G9Mtm4irHz1B+74JhDw4oOMwnX7KOXYi9JVMJw== X-Received: by 2002:a92:d84a:0:b0:32c:c418:9163 with SMTP id h10-20020a92d84a000000b0032cc4189163mr10261202ilq.5.1682989689034; Mon, 01 May 2023 18:08:09 -0700 (PDT) Received: from aford-B741.lan ([2601:447:d001:897f:8257:a536:d7fc:1919]) by smtp.gmail.com with ESMTPSA id f16-20020a056638329000b0040fb5d5429fsm4836329jav.131.2023.05.01.18.08.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 May 2023 18:08:08 -0700 (PDT) From: Adam Ford To: dri-devel@lists.freedesktop.org Subject: [PATCH V3 1/7] drm: bridge: samsung-dsim: fix blanking packet size calculation Date: Mon, 1 May 2023 20:07:53 -0500 Message-Id: <20230502010759.17282-2-aford173@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230502010759.17282-1-aford173@gmail.com> References: <20230502010759.17282-1-aford173@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Neil Armstrong , Robert Foss , Jonas Karlman , aford@beaconembedded.com, Jernej Skrabec , Frieder Schrempf , Jagan Teki , Laurent Pinchart , Andrzej Hajda , Chen-Yu Tsai , Marek Szyprowski , Adam Ford , linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Lucas Stach Scale the blanking packet sizes to match the ratio between HS clock and DPI interface clock. The controller seems to do internal scaling to the number of active lanes, so we don't take those into account. Signed-off-by: Lucas Stach Signed-off-by: Adam Ford Tested-by: Chen-Yu Tsai Tested-by: Frieder Schrempf --- drivers/gpu/drm/bridge/samsung-dsim.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index e0a402a85787..2be3b58624c3 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -874,17 +874,29 @@ static void samsung_dsim_set_display_mode(struct samsung_dsim *dsi) u32 reg; if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { + int byte_clk_khz = dsi->burst_clk_rate / 1000 / 8; + int hfp = (m->hsync_start - m->hdisplay) * byte_clk_khz / m->clock; + int hbp = (m->htotal - m->hsync_end) * byte_clk_khz / m->clock; + int hsa = (m->hsync_end - m->hsync_start) * byte_clk_khz / m->clock; + + /* remove packet overhead when possible */ + hfp = max(hfp - 6, 0); + hbp = max(hbp - 6, 0); + hsa = max(hsa - 6, 0); + + dev_dbg(dsi->dev, "calculated hfp: %u, hbp: %u, hsa: %u", + hfp, hbp, hsa); + reg = DSIM_CMD_ALLOW(0xf) | DSIM_STABLE_VFP(m->vsync_start - m->vdisplay) | DSIM_MAIN_VBP(m->vtotal - m->vsync_end); samsung_dsim_write(dsi, DSIM_MVPORCH_REG, reg); - reg = DSIM_MAIN_HFP(m->hsync_start - m->hdisplay) - | DSIM_MAIN_HBP(m->htotal - m->hsync_end); + reg = DSIM_MAIN_HFP(hfp) | DSIM_MAIN_HBP(hbp); samsung_dsim_write(dsi, DSIM_MHPORCH_REG, reg); reg = DSIM_MAIN_VSA(m->vsync_end - m->vsync_start) - | DSIM_MAIN_HSA(m->hsync_end - m->hsync_start); + | DSIM_MAIN_HSA(hsa); samsung_dsim_write(dsi, DSIM_MSYNC_REG, reg); } reg = DSIM_MAIN_HRESOL(m->hdisplay, num_bits_resol) | From patchwork Tue May 2 01:07:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 13228409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 786CBC7EE21 for ; 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Mon, 01 May 2023 18:08:10 -0700 (PDT) From: Adam Ford To: dri-devel@lists.freedesktop.org Subject: [PATCH V3 2/7] drm: bridge: samsung-dsim: Fix PMS Calculator on imx8m[mnp] Date: Mon, 1 May 2023 20:07:54 -0500 Message-Id: <20230502010759.17282-3-aford173@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230502010759.17282-1-aford173@gmail.com> References: <20230502010759.17282-1-aford173@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Neil Armstrong , Robert Foss , Jonas Karlman , aford@beaconembedded.com, Jernej Skrabec , Frieder Schrempf , Jagan Teki , Laurent Pinchart , Andrzej Hajda , Chen-Yu Tsai , Marek Szyprowski , Adam Ford , linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" According to Table 13-45 of the i.MX8M Mini Reference Manual, the min and max values for M and the frequency range for the VCO_out calculator were incorrect. This information was contradicted in other parts of the mini, nano and plus manuals. After reaching out to my NXP Rep, when confronting him about discrepencies in the Nano manual, he responded with: "Yes it is definitely wrong, the one that is part of the NOTE in MIPI_DPHY_M_PLLPMS register table against PMS_P, PMS_M and PMS_S is not correct. I will report this to Doc team, the one customer should be take into account is the Table 13-40 DPHY PLL Parameters and the Note above." These updated values also match what is used in the NXP downstream kernel. To fix this, make new variables to hold the min and max values of m and the minimum value of VCO_out, and update the PMS calculator to use these new variables instead of using hard-coded values to keep the backwards compatibility with other parts using this driver. Fixes: 4d562c70c4dc ("drm: bridge: samsung-dsim: Add i.MX8M Mini/Nano support") Signed-off-by: Adam Ford Reviewed-by: Lucas Stach Tested-by: Chen-Yu Tsai Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf --- drivers/gpu/drm/bridge/samsung-dsim.c | 22 ++++++++++++++++++++-- include/drm/bridge/samsung-dsim.h | 3 +++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 2be3b58624c3..bf4b33d2de76 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -405,6 +405,9 @@ static const struct samsung_dsim_driver_data exynos3_dsi_driver_data = { .num_bits_resol = 11, .pll_p_offset = 13, .reg_values = reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data exynos4_dsi_driver_data = { @@ -418,6 +421,9 @@ static const struct samsung_dsim_driver_data exynos4_dsi_driver_data = { .num_bits_resol = 11, .pll_p_offset = 13, .reg_values = reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data exynos5_dsi_driver_data = { @@ -429,6 +435,9 @@ static const struct samsung_dsim_driver_data exynos5_dsi_driver_data = { .num_bits_resol = 11, .pll_p_offset = 13, .reg_values = reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data exynos5433_dsi_driver_data = { @@ -441,6 +450,9 @@ static const struct samsung_dsim_driver_data exynos5433_dsi_driver_data = { .num_bits_resol = 12, .pll_p_offset = 13, .reg_values = exynos5433_reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = { @@ -453,6 +465,9 @@ static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = { .num_bits_resol = 12, .pll_p_offset = 13, .reg_values = exynos5422_reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = { @@ -469,6 +484,9 @@ static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = { */ .pll_p_offset = 14, .reg_values = imx8mm_dsim_reg_values, + .m_min = 64, + .m_max = 1023, + .min_freq = 1050, }; static const struct samsung_dsim_driver_data * @@ -547,12 +565,12 @@ static unsigned long samsung_dsim_pll_find_pms(struct samsung_dsim *dsi, tmp = (u64)fout * (_p << _s); do_div(tmp, fin); _m = tmp; - if (_m < 41 || _m > 125) + if (_m < driver_data->m_min || _m > driver_data->m_max) continue; tmp = (u64)_m * fin; do_div(tmp, _p); - if (tmp < 500 * MHZ || + if (tmp < driver_data->min_freq * MHZ || tmp > driver_data->max_freq * MHZ) continue; diff --git a/include/drm/bridge/samsung-dsim.h b/include/drm/bridge/samsung-dsim.h index ba5484de2b30..a1a5b2b89a7a 100644 --- a/include/drm/bridge/samsung-dsim.h +++ b/include/drm/bridge/samsung-dsim.h @@ -54,11 +54,14 @@ struct samsung_dsim_driver_data { unsigned int has_freqband:1; unsigned int has_clklane_stop:1; unsigned int num_clks; + unsigned int min_freq; unsigned int max_freq; unsigned int wait_for_reset; unsigned int num_bits_resol; unsigned int pll_p_offset; const unsigned int *reg_values; + u16 m_min; + u16 m_max; }; struct samsung_dsim_host_ops { From patchwork Tue May 2 01:07:55 2023 Content-Type: text/plain; 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Mon, 01 May 2023 18:08:12 -0700 (PDT) Received: from aford-B741.lan ([2601:447:d001:897f:8257:a536:d7fc:1919]) by smtp.gmail.com with ESMTPSA id f16-20020a056638329000b0040fb5d5429fsm4836329jav.131.2023.05.01.18.08.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 May 2023 18:08:12 -0700 (PDT) From: Adam Ford To: dri-devel@lists.freedesktop.org Subject: [PATCH V3 3/7] drm: bridge: samsung-dsim: Fetch pll-clock-frequency automatically Date: Mon, 1 May 2023 20:07:55 -0500 Message-Id: <20230502010759.17282-4-aford173@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230502010759.17282-1-aford173@gmail.com> References: <20230502010759.17282-1-aford173@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Neil Armstrong , Robert Foss , Jonas Karlman , aford@beaconembedded.com, Jernej Skrabec , linux-kernel@vger.kernel.org, Laurent Pinchart , Andrzej Hajda , Chen-Yu Tsai , Marek Szyprowski , Adam Ford , Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Make the pll-clock-frequency optional. If it's present, use it to maintain backwards compatibility with existing hardware. If it is absent, read clock rate of "sclk_mipi" to determine the rate. Signed-off-by: Adam Ford Tested-by: Chen-Yu Tsai Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf --- drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index bf4b33d2de76..2dc02a9e37c0 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1726,12 +1726,20 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi) { struct device *dev = dsi->dev; struct device_node *node = dev->of_node; + struct clk *pll_clk; int ret; ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency", &dsi->pll_clk_rate); - if (ret < 0) - return ret; + + /* If it doesn't exist, read it from the clock instead of failing */ + if (ret < 0) { + pll_clk = devm_clk_get(dev, "sclk_mipi"); + if (!IS_ERR(pll_clk)) + dsi->pll_clk_rate = clk_get_rate(pll_clk); + else + return PTR_ERR(pll_clk); + } ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency", &dsi->burst_clk_rate); From patchwork Tue May 2 01:07:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 13228413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9BF28C7EE24 for ; Tue, 2 May 2023 01:08:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 322E488735; Tue, 2 May 2023 01:08:22 +0000 (UTC) Received: from mail-io1-xd2f.google.com (mail-io1-xd2f.google.com [IPv6:2607:f8b0:4864:20::d2f]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1D91310E2F7 for ; Tue, 2 May 2023 01:08:15 +0000 (UTC) Received: by mail-io1-xd2f.google.com with SMTP id ca18e2360f4ac-760f8ffb27fso54744639f.2 for ; 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Signed-off-by: Adam Ford Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf --- drivers/gpu/drm/bridge/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index f076a09afac0..82c68b042444 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -227,6 +227,7 @@ config DRM_SAMSUNG_DSIM select DRM_KMS_HELPER select DRM_MIPI_DSI select DRM_PANEL_BRIDGE + select GENERIC_PHY_MIPI_DPHY help The Samsung MIPI DSIM bridge controller driver. This MIPI DSIM bridge can be found it on Exynos SoCs and From patchwork Tue May 2 01:07:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 13228411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4AED3C7EE21 for ; Tue, 2 May 2023 01:08:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9502710E0E3; Tue, 2 May 2023 01:08:18 +0000 (UTC) Received: from mail-io1-xd2f.google.com (mail-io1-xd2f.google.com [IPv6:2607:f8b0:4864:20::d2f]) by gabe.freedesktop.org (Postfix) with ESMTPS id D8A8610E2E9 for ; Tue, 2 May 2023 01:08:16 +0000 (UTC) Received: by mail-io1-xd2f.google.com with SMTP id ca18e2360f4ac-760f8ffb27fso54744939f.2 for ; Mon, 01 May 2023 18:08:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682989696; x=1685581696; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lFK1TzRb+WofFBaYOMfgaKdiEVNH7eD9PTVjCEw9DwY=; b=sbCNxbaHm/4Ns0b0+O4D6S3b909ab9R4JIc6mVPhYCgppojoxTQL7UP4ZdTQQmUkXQ sRiuw1/O0tTB8WXfVTSY6wDQNqDNyU0vPEAtj0MUol5REjp1p3g9jvevBpH7myCb7bw1 bkCUbqR4rr7iO1M4261UGgcsLE8DfPC0fKBiH7UjDdfBnqSGyGdaUHay2LlZ+sbMOEyy ousGnAP0NOZxqdI37sY9Yf9L3EMGFkrNTwSLKZHfJ4rRMTtdzHrAvaeaqnsjIyipWL9i 3qan6Q4Px653UIgZJAZanEyY6kbRIaqm5mvqUEJP2tP7jKQg2KjkFbSR9x3sTkHSf656 5CZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682989696; x=1685581696; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lFK1TzRb+WofFBaYOMfgaKdiEVNH7eD9PTVjCEw9DwY=; b=Aeql6/Hx2mKn1RC9Ft5yYqRf+y6y6mKMrEnBUqqlblSeWDXNVPd+5zmIvBGyEkTDSr 3Mncs37BJST/5Zp+lsvWAeIcZBjWeFUW5JvvIiqOPoLXQ10tYQOXlagAOqr+ZyRGuPmd 6dkb+5KbpSFWJvln3wW67Z7IjnFQR8uZO2h8IAhm6V5vQge7/pdFVu4FATI/VoXoF2JL pQW30rUfMg1mUVP2qBdNwU2MuEAf2EvHMKIvHbN9F87Vwry87mWwZnsBdwsPRdVmkb+X kGmhIAz4zBmXfx2M71e3D132QDutfZDqAHcOELquSnC9T+iviTqg2qHAXcLvIASZtw5V wWbw== X-Gm-Message-State: AC+VfDxyxolyEGyPmOLlihE2rc0Skbf0M2ggHVPqlwNqWH/rSR7KQh/4 NqHWytw8dkZwTWoxu42LL3hXmzW2Bpr56Q== X-Google-Smtp-Source: ACHHUZ6oXvc/Tm8pSKJtWxjgaQbf1O1pDYMnUGAp/ExDVDOTTgZfVeMUcAIVcCB70gmFKzggiizX+Q== X-Received: by 2002:a92:c711:0:b0:331:250a:a61b with SMTP id a17-20020a92c711000000b00331250aa61bmr248226ilp.8.1682989696008; Mon, 01 May 2023 18:08:16 -0700 (PDT) Received: from aford-B741.lan ([2601:447:d001:897f:8257:a536:d7fc:1919]) by smtp.gmail.com with ESMTPSA id f16-20020a056638329000b0040fb5d5429fsm4836329jav.131.2023.05.01.18.08.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 May 2023 18:08:15 -0700 (PDT) From: Adam Ford To: dri-devel@lists.freedesktop.org Subject: [PATCH V3 5/7] drm: bridge: samsung-dsim: Dynamically configure DPHY timing Date: Mon, 1 May 2023 20:07:57 -0500 Message-Id: <20230502010759.17282-6-aford173@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230502010759.17282-1-aford173@gmail.com> References: <20230502010759.17282-1-aford173@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, Neil Armstrong , Robert Foss , Jonas Karlman , aford@beaconembedded.com, Jernej Skrabec , Frieder Schrempf , Laurent Pinchart , Andrzej Hajda , Chen-Yu Tsai , Marek Szyprowski , Adam Ford , linux-kernel@vger.kernel.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The DPHY timings are currently hard coded. Since the input clock can be variable, the phy timings need to be variable too. Add an additional variable to the driver data to enable this feature to prevent breaking boards that don't support it. The phy_mipi_dphy_get_default_config function configures the DPHY timings in pico-seconds, and a small macro converts those timings into clock cycles based on the pixel clock rate. Signed-off-by: Adam Ford Tested-by: Chen-Yu Tsai Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf Tested-by: Michael Walle --- drivers/gpu/drm/bridge/samsung-dsim.c | 79 +++++++++++++++++++++++---- include/drm/bridge/samsung-dsim.h | 1 + 2 files changed, 70 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 2dc02a9e37c0..99642230a54a 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -18,9 +18,7 @@ #include #include #include - #include