From patchwork Wed May 3 06:09:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rabara, Niravkumar L" X-Patchwork-Id: 13229511 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15395C77B7F for ; Wed, 3 May 2023 06:13:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229506AbjECGN6 (ORCPT ); Wed, 3 May 2023 02:13:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229457AbjECGN5 (ORCPT ); Wed, 3 May 2023 02:13:57 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18C8230CB; Tue, 2 May 2023 23:13:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683094437; x=1714630437; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7Ighfp5E/Al9/svQfOrOI4+bSPRt3bo1pMOcWF2LXzY=; b=B5/1WF3vjY6wUlRkzI2POCJQ7nvvueUC7Q30ZkxnlHqGhGUNHsLn9j2c yYw+RFURjeVVIey7raVKtnQftJH8sGCZRCBKrdMw0qW3Vj6etzy1pvKim jHdQlIQe1s0IBsgFTUIIOTdkYCAIqSnsNOQETuJSUhQqqBQhACjovzm2B 2hurSXq37jOHy9bubqdlwpSTcgJYDvnGZF2n2G5tVXafvhhcOZqcRu+vt FIc74wImzOqui3jgSTKLZ4082xeyVkyyGYdkEnJJ2bEAArfkUIGRt7/tO AIPloNpI3XvkmUCZfeWzJtSC5gyW9BKOQ0ecK/uM6NFV3HF/5zdvkQu/7 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10698"; a="328205845" X-IronPort-AV: E=Sophos;i="5.99,246,1677571200"; d="scan'208";a="328205845" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 May 2023 23:13:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10698"; a="690574181" X-IronPort-AV: E=Sophos;i="5.99,246,1677571200"; d="scan'208";a="690574181" Received: from unknown (HELO localhost.localdomain) ([10.226.216.116]) by orsmga007.jf.intel.com with ESMTP; 02 May 2023 23:13:54 -0700 From: niravkumar.l.rabara@intel.com To: Dinh Nguyen , Borislav Petkov , Tony Luck , James Morse , Mauro Carvalho Chehab , Robert Richter , linux-edac@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Niravkumar L Rabara Subject: [PATCH 1/2] firmware: stratix10-svc: Add command to get SEU error info Date: Wed, 3 May 2023 14:09:59 +0800 Message-Id: <20230503061000.3279381-2-niravkumar.l.rabara@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230503061000.3279381-1-niravkumar.l.rabara@intel.com> References: <20230503061000.3279381-1-niravkumar.l.rabara@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Niravkumar L Rabara Introduce a new command to get Single Event Upset Error information. Signed-off-by: Niravkumar L Rabara --- include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h index a718f853d457..7eb1799e8d8a 100644 --- a/include/linux/firmware/intel/stratix10-smc.h +++ b/include/linux/firmware/intel/stratix10-smc.h @@ -595,4 +595,24 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA) +/** + * Request INTEL_SIP_SMC_READ_SEU_ERR + * Sync call to get Single Event Upsate Error information + * SEU detects both corrected and uncorrected error + * + * Call register usage: + * a0 INTEL_SIP_SMC_READ_SEU_ERR + * a1-7 not used + * + * Return status: + * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_NOT_SUPPORTED or + * INTEL_SIP_SMC_STATUS_ERROR + * a1 error count of response data + * a2 sector address of response data + * a3 error data + */ +#define INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS 143 +#define INTEL_SIP_SMC_READ_SEU_ERR \ + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS) + #endif From patchwork Wed May 3 06:10:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rabara, Niravkumar L" X-Patchwork-Id: 13229512 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 386E8C77B75 for ; Wed, 3 May 2023 06:14:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229457AbjECGOE (ORCPT ); Wed, 3 May 2023 02:14:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229631AbjECGOD (ORCPT ); Wed, 3 May 2023 02:14:03 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B275E40CF; Tue, 2 May 2023 23:14:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683094442; x=1714630442; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Rt+NiPHzZk0ufSm8/klt7oGsdG1fjJ5fZs7aIMtC/FE=; b=l6kOqlwJOpEeyVXnn7GYZi7yxGSxLvG14wjAPFkxF3t2WhFWY42eAupb yBNv/Vlhr8VSWgrq/sZAB+WavnA4dsjfDldOkfFPjC04VoAhYvmhKAlN9 cqwfZCku/P7r87Lvp5vRcQgrwh0/JhxwQ2WfIw1fUtUI2uKhnQDq/YDFc 9HQ5ujYDiwEWVKB7wqk3SiHDptR0OFtbwi3lU6rQPTsSxx/mqpEIm1JpD fT3cCtLrC1CbG/n6r5RzyGc6rJDxIKh+aTpsQK5iR4D6XDB0skmQxX+ck wYnXMOtnUWPsKfvqecn5URZf/7Kvy+MkPmKPrWu/D+qcq20VKl2mJFMcj Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10698"; a="328205855" X-IronPort-AV: E=Sophos;i="5.99,246,1677571200"; d="scan'208";a="328205855" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 May 2023 23:14:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10698"; a="690574189" X-IronPort-AV: E=Sophos;i="5.99,246,1677571200"; d="scan'208";a="690574189" Received: from unknown (HELO localhost.localdomain) ([10.226.216.116]) by orsmga007.jf.intel.com with ESMTP; 02 May 2023 23:13:59 -0700 From: niravkumar.l.rabara@intel.com To: Dinh Nguyen , Borislav Petkov , Tony Luck , James Morse , Mauro Carvalho Chehab , Robert Richter , linux-edac@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Niravkumar L Rabara Subject: [PATCH 2/2] EDAC/altera: Check previous DDR DBE during driver probe Date: Wed, 3 May 2023 14:10:00 +0800 Message-Id: <20230503061000.3279381-3-niravkumar.l.rabara@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230503061000.3279381-1-niravkumar.l.rabara@intel.com> References: <20230503061000.3279381-1-niravkumar.l.rabara@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Niravkumar L Rabara Add DDR DBE check during driver probe to notify user if previous reboot cause by DDR DBE and print DBE error related information. Signed-off-by: Niravkumar L Rabara --- drivers/edac/altera_edac.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c index 8b31cd54bdb6..398a49a3eb89 100644 --- a/drivers/edac/altera_edac.c +++ b/drivers/edac/altera_edac.c @@ -2159,6 +2159,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev) #ifdef CONFIG_64BIT { int dberror, err_addr; + struct arm_smccc_res result; edac->panic_notifier.notifier_call = s10_edac_dberr_handler; atomic_notifier_chain_register(&panic_notifier_list, @@ -2168,11 +2169,28 @@ static int altr_edac_a10_probe(struct platform_device *pdev) regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, &dberror); if (dberror) { - regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST, - &err_addr); - edac_printk(KERN_ERR, EDAC_DEVICE, - "Previous Boot UE detected[0x%X] @ 0x%X\n", - dberror, err_addr); + /* Bit-31 is set if previous DDR UE happened */ + if (dberror & (1 << 31)) { + /* Read previous DDR UE info */ + arm_smccc_smc(INTEL_SIP_SMC_READ_SEU_ERR, 0, + 0, 0, 0, 0, 0, 0, &result); + + if (!(int)result.a0) { + edac_printk(KERN_ERR, EDAC_DEVICE, + "Previous DDR UE:Count=0x%X,Address=0x%X,ErrorData=0x%X\n" + , (unsigned int)result.a1, (unsigned int)result.a2 + , (unsigned int)result.a3); + } else { + edac_printk(KERN_ERR, EDAC_DEVICE, + "INTEL_SIP_SMC_SEU_ERR_STATUS failed\n"); + } + } else { + regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST, + &err_addr); + edac_printk(KERN_ERR, EDAC_DEVICE, + "Previous Boot UE detected[0x%X] @ 0x%X\n", + dberror, err_addr); + } /* Reset the sticky registers */ regmap_write(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, 0); @@ -2180,6 +2198,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev) S10_SYSMGR_UE_ADDR_OFST, 0); } } + #else edac->db_irq = platform_get_irq(pdev, 1); if (edac->db_irq < 0)