From patchwork Fri May 5 11:25:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232492 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29D34C77B75 for ; Fri, 5 May 2023 11:27:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231313AbjEEL1U (ORCPT ); Fri, 5 May 2023 07:27:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230398AbjEEL1T (ORCPT ); Fri, 5 May 2023 07:27:19 -0400 Received: from wout1-smtp.messagingengine.com (wout1-smtp.messagingengine.com [64.147.123.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 73C367EED for ; Fri, 5 May 2023 04:27:01 -0700 (PDT) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.west.internal (Postfix) with ESMTP id 474183200907; Fri, 5 May 2023 07:25:39 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Fri, 05 May 2023 07:25:39 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h=cc :cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to; s=fm2; t= 1683285938; x=1683372338; bh=KmlNrpzHoElAQRzBqUSUD3C9LEn+qtKAG3F FPNwwU1k=; b=sscYqHlU08Svb8oA9ZzR93VEaJ2jamsSb7EwptDrmlxgmsiDzPU W67xX3+lEB47Booez3AmtzEGegRna5IANFU69GdpCuo3qbNOK+5KCSm7hl/cQUot 75G2mP9tGbWokmAJr9wVGIe/qln4SaPsGvZpDqyqQY8aVdGAu0IfC8Sr+//6xOD2 AvMCJTiuRArjwTmjoXR0WTAh5TBxdYLoNval64rnsUqQIUtQ7yNNKSC3Vu6SSAzi MUMWXBaS/+FrkqcAFvIDFO91GqwpKr0+dwxhS6wp1lRoXBo2tE9htHGRa9DP5kye dFn/HVQZul5lcKxW84onUO1+f+nWPJvvagQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; t= 1683285938; x=1683372338; bh=KmlNrpzHoElAQRzBqUSUD3C9LEn+qtKAG3F FPNwwU1k=; b=K9837E2lbpDXYH3uCp5Q4dVcADRWRIHbWc+TeIwV03/RRgeeCXL 2CxqfUhJ3wgITt+90fbJGRHos1FuaF9Ksp9FbEws8iJxMQdtkKSF/D8hqO1q7MTM glxRa83PafeKmIP3y7FJJePRrsbBDk65TFlOu5GHBr41c4EEVRXzrwDvkgb64Iks So6HWiPv2F3+pw6DtyJZUMwhCVSkJRhg4qtgXY0gSmxd4esbx1cla9aDEwKOlusA 6JfMgH4MEtnloVio2V6VXO53dJinJW5Mj52XZpWvsw3PWHA9oEXURsrvdgYoewmw dXSr2NzqRkt3P+dHq8Apqr5dSsswkoAGu6g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrfeefvddggedtucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpeforgig ihhmvgcutfhiphgrrhguuceomhgrgihimhgvsegtvghrnhhordhtvggthheqnecuggftrf grthhtvghrnhepvedvleeijeegvdekffehkeehieelhfeggfffheetkeeuledvtdeuffeh teeltdffnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomh epmhgrgihimhgvsegtvghrnhhordhtvggthh X-ME-Proxy: Feedback-ID: i8771445c:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 5 May 2023 07:25:38 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:03 +0200 Subject: [PATCH v4 01/68] clk: Export clk_hw_forward_rate_request() MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-1-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=805; i=maxime@cerno.tech; h=from:subject:message-id; bh=EdAdQIBHVdRBX62p/4t9OofGeohozwi8Dx8GdAuKfXA=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxe12hZyVHEckItlm/HsIQt7QRHnRy/3Ce+r2efpHFl0 mk+5o5SFQYyLQVZMkSVG2HxJ3KlZrzvZ+ObBzGFlAhnCwMUpABOJesXI8GfS31dlX619O79fOHtF+I lQ8vFJLl2bWV+aHOXWe9tn1sbw36XM+4inDrP6kaVHNn7c5nAx2eKewMpki3QLJ9Vp0TpbWQE= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Commit 262ca38f4b6e ("clk: Stop forwarding clk_rate_requests to the parent") introduced the public clk_hw_forward_rate_request() function, but didn't export the symbol. Make sure it's the case. Fixes: 262ca38f4b6e ("clk: Stop forwarding clk_rate_requests to the parent") Signed-off-by: Maxime Ripard --- drivers/clk/clk.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 27c30a533759..e495dd7a1eae 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1549,6 +1549,7 @@ void clk_hw_forward_rate_request(const struct clk_hw *hw, parent->core, req, parent_rate); } +EXPORT_SYMBOL_GPL(clk_hw_forward_rate_request); static bool clk_core_can_round(struct clk_core * const core) { From patchwork Fri May 5 11:25:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05C5CC77B75 for ; Fri, 5 May 2023 11:27:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229568AbjEEL1H (ORCPT ); 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Fri, 5 May 2023 07:25:41 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:04 +0200 Subject: [PATCH v4 02/68] clk: test: Fix type sign of rounded rate variables MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-2-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2144; i=maxime@cerno.tech; h=from:subject:message-id; bh=gIoYnLAUZ6zdey/9Hw3lAQE8iGG4goiV7JckSXzeF5E=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxf57F2/49ikh1s2Sx7fNW3pT0tPb0+bENFnHKvP3u5P /rX/UkcpC4MYF4OsmCJLjLD5krhTs153svHNg5nDygQyhIGLUwAm0v6fkaH50JzvcVf5PgdG9DMssb D/8HtJyyWZY7ZXrq5JiKr3/r6dkWFj0Itvn5UFaze3TiiaOyFPaMKb66t9dqZzLv/IE/18fQwDAA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org clk_round_rate() may return a negative error code, but most of the variables we defined to store its returned value are unsigned. This obviously leads to issues on error. Signed-off-by: Maxime Ripard --- drivers/clk/clk_test.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index f9a5c2964c65..2cb51153750d 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -266,7 +266,8 @@ static void clk_test_round_set_get_rate(struct kunit *test) struct clk_dummy_context *ctx = test->priv; struct clk_hw *hw = &ctx->hw; struct clk *clk = clk_hw_get_clk(hw, NULL); - unsigned long rounded_rate, set_rate; + unsigned long set_rate; + long rounded_rate; rounded_rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1); KUNIT_ASSERT_GT(test, rounded_rate, 0); @@ -851,7 +852,7 @@ clk_test_orphan_transparent_multiple_parent_mux_set_range_round_rate(struct kuni struct clk_multiple_parent_ctx *ctx = test->priv; struct clk_hw *hw = &ctx->hw; struct clk *clk = clk_hw_get_clk(hw, NULL); - unsigned long rate; + long rate; int ret; ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2); @@ -1090,7 +1091,7 @@ clk_test_single_parent_mux_set_range_round_rate_parent_only(struct kunit *test) struct clk_hw *hw = &ctx->hw; struct clk *clk = clk_hw_get_clk(hw, NULL); struct clk *parent; - unsigned long rate; + long rate; int ret; parent = clk_get_parent(clk); @@ -1120,7 +1121,7 @@ clk_test_single_parent_mux_set_range_round_rate_child_smaller(struct kunit *test struct clk_hw *hw = &ctx->hw; struct clk *clk = clk_hw_get_clk(hw, NULL); struct clk *parent; - unsigned long rate; + long rate; int ret; parent = clk_get_parent(clk); @@ -1158,7 +1159,7 @@ clk_test_single_parent_mux_set_range_round_rate_parent_smaller(struct kunit *tes struct clk_hw *hw = &ctx->hw; struct clk *clk = clk_hw_get_clk(hw, NULL); struct clk *parent; - unsigned long rate; + long rate; int ret; parent = clk_get_parent(clk); From patchwork Fri May 5 11:25:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232490 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5363C77B7F for ; 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Fri, 5 May 2023 07:25:43 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:05 +0200 Subject: [PATCH v4 03/68] clk: Move no reparent case into a separate function MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-3-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Alessandro Zummo , Alexandre Belloni , Alexandre Torgue , =?utf-8?q?Andreas_F=C3=A4r?= =?utf-8?q?ber?= , AngeloGioacchino Del Regno , Baolin Wang , Charles Keepax , Chen-Yu Tsai , Chen-Yu Tsai , Chunyan Zhang , Claudiu Beznea , Daniel Vetter , David Airlie , David Lechner , Dinh Nguyen , Fabio Estevam , Geert Uytterhoeven , Jaroslav Kysela , Jernej Skrabec , Jonathan Hunter , Kishon Vijay Abraham I , Liam Girdwood , Linus Walleij , Luca Ceresoli , Manivannan Sadhasivam , Mark Brown , Markus Schneider-Pargmann , Max Filippov , Maxime Coquelin , Mikko Perttunen , Miles Chen , Nicolas Ferre , Orson Zhai , Paul Cercueil , Peng Fan , Peter De Schrijver , Prashant Gaikwad , Richard Fitzgerald , Samuel Holland , Sascha Hauer , Sekhar Nori , Shawn Guo , Takashi Iwai , Thierry Reding , Ulf Hansson , Vinod Koul , dri-devel@lists.freedesktop.org, linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-phy@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rtc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, NXP Linux Team , patches@opensource.cirrus.com, Pengutronix Kernel Team X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5599; i=maxime@cerno.tech; h=from:subject:message-id; bh=Pxa6LrZe1o/eBr4UI7umXibSzTm/MpQguARoHEO5XCk=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxc5Rstf2bExQeEn73VnY64JKuoy700DJTb9UzzofGj6 AUHmjlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAEzk3AyGf/Zn+S0ni19r774wuWmK42 TRba9ZDL7d93cNy5IJu/ex8zjD/2SHmTwr1himMz9fPun629N1J8OVT1ytvTFn9681xQe/X+YAAA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Stephen Boyd We'll need to turn the code in clk_mux_determine_rate_flags() to deal with CLK_SET_RATE_NO_REPARENT into a helper clock drivers will be able to use if they don't want to allow reparenting. Cc: Abel Vesa Cc: Alessandro Zummo Cc: Alexandre Belloni Cc: Alexandre Torgue Cc: "Andreas Färber" Cc: AngeloGioacchino Del Regno Cc: Baolin Wang Cc: Charles Keepax Cc: Chen-Yu Tsai Cc: Chen-Yu Tsai Cc: Chunyan Zhang Cc: Claudiu Beznea Cc: Daniel Vetter Cc: David Airlie Cc: David Lechner Cc: Dinh Nguyen Cc: Fabio Estevam Cc: Geert Uytterhoeven Cc: Jaroslav Kysela Cc: Jernej Skrabec Cc: Jonathan Hunter Cc: Kishon Vijay Abraham I Cc: Liam Girdwood Cc: Linus Walleij Cc: Luca Ceresoli Cc: Manivannan Sadhasivam Cc: Mark Brown Cc: Markus Schneider-Pargmann Cc: Max Filippov Cc: Maxime Coquelin Cc: Mikko Perttunen Cc: Miles Chen Cc: Nicolas Ferre Cc: Orson Zhai Cc: Paul Cercueil Cc: Peng Fan Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Richard Fitzgerald Cc: Samuel Holland Cc: Sascha Hauer Cc: Sekhar Nori Cc: Shawn Guo Cc: Takashi Iwai Cc: Thierry Reding Cc: Ulf Hansson Cc: Vinod Koul Cc: dri-devel@lists.freedesktop.org Cc: linux-actions@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@vger.kernel.org Cc: linux-phy@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rtc@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-sunxi@lists.linux.dev Cc: linux-tegra@vger.kernel.org Cc: NXP Linux Team Cc: patches@opensource.cirrus.com Cc: Pengutronix Kernel Team Signed-off-by: Stephen Boyd Signed-off-by: Maxime Ripard --- drivers/clk/clk.c | 75 +++++++++++++++++++++++++++++++------------------------ 1 file changed, 43 insertions(+), 32 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index e495dd7a1eae..f57f821a5e5a 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -594,6 +594,46 @@ clk_core_forward_rate_req(struct clk_core *core, req->max_rate = old_req->max_rate; } +static int +clk_core_determine_rate_no_reparent(struct clk_hw *hw, + struct clk_rate_request *req) +{ + struct clk_core *core = hw->core; + struct clk_core *parent = core->parent; + unsigned long best; + int ret; + + if (core->flags & CLK_SET_RATE_PARENT) { + struct clk_rate_request parent_req; + + if (!parent) { + req->rate = 0; + return 0; + } + + clk_core_forward_rate_req(core, req, parent, &parent_req, + req->rate); + + trace_clk_rate_request_start(&parent_req); + + ret = clk_core_round_rate_nolock(parent, &parent_req); + if (ret) + return ret; + + trace_clk_rate_request_done(&parent_req); + + best = parent_req.rate; + } else if (parent) { + best = clk_core_get_rate_nolock(parent); + } else { + best = clk_core_get_rate_nolock(core); + } + + req->rate = best; + + return 0; +} + int clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req, unsigned long flags) @@ -603,35 +643,8 @@ int clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long best = 0; /* if NO_REPARENT flag set, pass through to current parent */ - if (core->flags & CLK_SET_RATE_NO_REPARENT) { - parent = core->parent; - if (core->flags & CLK_SET_RATE_PARENT) { - struct clk_rate_request parent_req; - - if (!parent) { - req->rate = 0; - return 0; - } - - clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate); - - trace_clk_rate_request_start(&parent_req); - - ret = clk_core_round_rate_nolock(parent, &parent_req); - if (ret) - return ret; - - trace_clk_rate_request_done(&parent_req); - - best = parent_req.rate; - } else if (parent) { - best = clk_core_get_rate_nolock(parent); - } else { - best = clk_core_get_rate_nolock(core); - } - - goto out; - } + if (core->flags & CLK_SET_RATE_NO_REPARENT) + return clk_core_determine_rate_no_reparent(hw, req); /* find the parent that can provide the fastest rate <= rate */ num_parents = core->num_parents; @@ -670,9 +683,7 @@ int clk_mux_determine_rate_flags(struct clk_hw *hw, if (!best_parent) return -EINVAL; -out: - if (best_parent) - req->best_parent_hw = best_parent->hw; + req->best_parent_hw = best_parent->hw; req->best_parent_rate = best; req->rate = best; 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Fri, 5 May 2023 07:25:51 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:06 +0200 Subject: [PATCH v4 04/68] clk: Introduce clk_hw_determine_rate_no_reparent() MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-4-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Alessandro Zummo , Alexandre Belloni , Alexandre Torgue , =?utf-8?q?Andreas_F=C3=A4r?= =?utf-8?q?ber?= , AngeloGioacchino Del Regno , Baolin Wang , Charles Keepax , Chen-Yu Tsai , Chen-Yu Tsai , Chunyan Zhang , Claudiu Beznea , Daniel Vetter , David Airlie , David Lechner , Dinh Nguyen , Fabio Estevam , Geert Uytterhoeven , Jaroslav Kysela , Jernej Skrabec , Jonathan Hunter , Kishon Vijay Abraham I , Liam Girdwood , Linus Walleij , Luca Ceresoli , Manivannan Sadhasivam , Mark Brown , Markus Schneider-Pargmann , Max Filippov , Maxime Coquelin , Mikko Perttunen , Miles Chen , Nicolas Ferre , Orson Zhai , Paul Cercueil , Peng Fan , Peter De Schrijver , Prashant Gaikwad , Richard Fitzgerald , Samuel Holland , Sascha Hauer , Sekhar Nori , Shawn Guo , Takashi Iwai , Thierry Reding , Ulf Hansson , Vinod Koul , dri-devel@lists.freedesktop.org, linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-phy@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rtc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, NXP Linux Team , patches@opensource.cirrus.com, Pengutronix Kernel Team X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=10829; i=maxime@cerno.tech; h=from:subject:message-id; bh=YBkKiWSHU6AfKueAcHZCOzbYZiY/0bHTLTOJ1X0UewY=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxedUy9mc+d6kvbti+3SFwfvMnndXJS6hu1k/TrpDJGw on1pHaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZjIMUdGhrc1IfwXRIW2N4U5T025te 74MuZT1+3CXxzLnmrrU8G66gwjw9XfZ8pdlhx7KvVmQf4Moc++3jnXPGXyivk3x50qOet1hBMA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Stephen Boyd Some clock drivers do not want to allow any reparenting on a given clock, but usually do so by not providing any determine_rate implementation. Whenever we call clk_round_rate() or clk_set_rate(), this leads to clk_core_can_round() returning false and thus the rest of the function either forwarding the rate request to its current parent if CLK_SET_RATE_PARENT is set, or just returning the current clock rate. This behaviour happens implicitly, and as we move forward to making a determine_rate implementation required for muxes, we need some way to explicitly opt-in for that behaviour. Fortunately, this is exactly what the clk_core_determine_rate_no_reparent() function is doing, so we can simply make it available to drivers. Cc: Abel Vesa Cc: Alessandro Zummo Cc: Alexandre Belloni Cc: Alexandre Torgue Cc: "Andreas Färber" Cc: AngeloGioacchino Del Regno Cc: Baolin Wang Cc: Charles Keepax Cc: Chen-Yu Tsai Cc: Chen-Yu Tsai Cc: Chunyan Zhang Cc: Claudiu Beznea Cc: Daniel Vetter Cc: David Airlie Cc: David Lechner Cc: Dinh Nguyen Cc: Fabio Estevam Cc: Geert Uytterhoeven Cc: Jaroslav Kysela Cc: Jernej Skrabec Cc: Jonathan Hunter Cc: Kishon Vijay Abraham I Cc: Liam Girdwood Cc: Linus Walleij Cc: Luca Ceresoli Cc: Manivannan Sadhasivam Cc: Mark Brown Cc: Markus Schneider-Pargmann Cc: Max Filippov Cc: Maxime Coquelin Cc: Mikko Perttunen Cc: Miles Chen Cc: Nicolas Ferre Cc: Orson Zhai Cc: Paul Cercueil Cc: Peng Fan Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Richard Fitzgerald Cc: Samuel Holland Cc: Sascha Hauer Cc: Sekhar Nori Cc: Shawn Guo Cc: Takashi Iwai Cc: Thierry Reding Cc: Ulf Hansson Cc: Vinod Koul Cc: dri-devel@lists.freedesktop.org Cc: linux-actions@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@vger.kernel.org Cc: linux-phy@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rtc@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-sunxi@lists.linux.dev Cc: linux-tegra@vger.kernel.org Cc: NXP Linux Team Cc: patches@opensource.cirrus.com Cc: Pengutronix Kernel Team Signed-off-by: Stephen Boyd Signed-off-by: Maxime Ripard --- drivers/clk/clk.c | 18 +++++ drivers/clk/clk_test.c | 152 +++++++++++++++++++++++++++++++++++++++++++ include/linux/clk-provider.h | 2 + 3 files changed, 172 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index f57f821a5e5a..5365595433c8 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -783,6 +783,24 @@ int __clk_mux_determine_rate_closest(struct clk_hw *hw, } EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); +/* + * clk_hw_determine_rate_no_reparent - clk_ops::determine_rate implementation for a clk that doesn't reparent + * @hw: mux type clk to determine rate on + * @req: rate request, also used to return preferred frequency + * + * Helper for finding best parent rate to provide a given frequency. + * This can be used directly as a determine_rate callback (e.g. for a + * mux), or from a more complex clock that may combine a mux with other + * operations. + * + * Returns: 0 on success, -EERROR value on error + */ +int clk_hw_determine_rate_no_reparent(struct clk_hw *hw, + struct clk_rate_request *req) +{ + return clk_core_determine_rate_no_reparent(hw, req); +} + /*** clk api ***/ static void clk_core_rate_unprotect(struct clk_core *core) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index 2cb51153750d..b3ed3b0e4c31 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -141,6 +141,12 @@ static const struct clk_ops clk_multiple_parents_mux_ops = { .determine_rate = __clk_mux_determine_rate_closest, }; +static const struct clk_ops clk_multiple_parents_no_reparent_mux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, + .get_parent = clk_multiple_parents_mux_get_parent, + .set_parent = clk_multiple_parents_mux_set_parent, +}; + static int clk_test_init_with_ops(struct kunit *test, const struct clk_ops *ops) { struct clk_dummy_context *ctx; @@ -2395,10 +2401,156 @@ static struct kunit_suite clk_mux_notifier_test_suite = { .test_cases = clk_mux_notifier_test_cases, }; +static int +clk_mux_no_reparent_test_init(struct kunit *test) +{ + struct clk_multiple_parent_ctx *ctx; + const char *parents[2] = { "parent-0", "parent-1"}; + int ret; + + ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + test->priv = ctx; + + ctx->parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0", + &clk_dummy_rate_ops, + 0); + ctx->parents_ctx[0].rate = DUMMY_CLOCK_RATE_1; + ret = clk_hw_register(NULL, &ctx->parents_ctx[0].hw); + if (ret) + return ret; + + ctx->parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1", + &clk_dummy_rate_ops, + 0); + ctx->parents_ctx[1].rate = DUMMY_CLOCK_RATE_2; + ret = clk_hw_register(NULL, &ctx->parents_ctx[1].hw); + if (ret) + return ret; + + ctx->current_parent = 0; + ctx->hw.init = CLK_HW_INIT_PARENTS("test-mux", parents, + &clk_multiple_parents_no_reparent_mux_ops, + 0); + ret = clk_hw_register(NULL, &ctx->hw); + if (ret) + return ret; + + return 0; +} + +static void +clk_mux_no_reparent_test_exit(struct kunit *test) +{ + struct clk_multiple_parent_ctx *ctx = test->priv; + + clk_hw_unregister(&ctx->hw); + clk_hw_unregister(&ctx->parents_ctx[0].hw); + clk_hw_unregister(&ctx->parents_ctx[1].hw); +} + +/* + * Test that if the we have a mux that cannot change parent and we call + * clk_round_rate() on it with a rate that should cause it to change + * parent, it won't. + */ +static void clk_mux_no_reparent_round_rate(struct kunit *test) +{ + struct clk_multiple_parent_ctx *ctx = test->priv; + struct clk_hw *hw = &ctx->hw; + struct clk *clk = clk_hw_get_clk(hw, NULL); + struct clk *other_parent, *parent; + unsigned long other_parent_rate; + unsigned long parent_rate; + long rounded_rate; + + parent = clk_get_parent(clk); + KUNIT_ASSERT_PTR_NE(test, parent, NULL); + + parent_rate = clk_get_rate(parent); + KUNIT_ASSERT_GT(test, parent_rate, 0); + + other_parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, other_parent); + KUNIT_ASSERT_FALSE(test, clk_is_match(parent, other_parent)); + + other_parent_rate = clk_get_rate(other_parent); + KUNIT_ASSERT_GT(test, other_parent_rate, 0); + clk_put(other_parent); + + rounded_rate = clk_round_rate(clk, other_parent_rate); + KUNIT_ASSERT_GT(test, rounded_rate, 0); + KUNIT_EXPECT_EQ(test, rounded_rate, parent_rate); + + clk_put(clk); +} + +/* + * Test that if the we have a mux that cannot change parent and we call + * clk_set_rate() on it with a rate that should cause it to change + * parent, it won't. + */ +static void clk_mux_no_reparent_set_rate(struct kunit *test) +{ + struct clk_multiple_parent_ctx *ctx = test->priv; + struct clk_hw *hw = &ctx->hw; + struct clk *clk = clk_hw_get_clk(hw, NULL); + struct clk *other_parent, *parent; + unsigned long other_parent_rate; + unsigned long parent_rate; + unsigned long rate; + int ret; + + parent = clk_get_parent(clk); + KUNIT_ASSERT_PTR_NE(test, parent, NULL); + + parent_rate = clk_get_rate(parent); + KUNIT_ASSERT_GT(test, parent_rate, 0); + + other_parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, other_parent); + KUNIT_ASSERT_FALSE(test, clk_is_match(parent, other_parent)); + + other_parent_rate = clk_get_rate(other_parent); + KUNIT_ASSERT_GT(test, other_parent_rate, 0); + clk_put(other_parent); + + ret = clk_set_rate(clk, other_parent_rate); + KUNIT_ASSERT_EQ(test, ret, 0); + + rate = clk_get_rate(clk); + KUNIT_ASSERT_GT(test, rate, 0); + KUNIT_EXPECT_EQ(test, rate, parent_rate); + + clk_put(clk); +} + +static struct kunit_case clk_mux_no_reparent_test_cases[] = { + KUNIT_CASE(clk_mux_no_reparent_round_rate), + KUNIT_CASE(clk_mux_no_reparent_set_rate), + {} +}; + +/* + * Test suite for a clock mux that isn't allowed to change parent, using + * the clk_hw_determine_rate_no_reparent() helper. + * + * These tests exercise that helper, and the proper selection of + * rates and parents. + */ +static struct kunit_suite clk_mux_no_reparent_test_suite = { + .name = "clk-mux-no-reparent", + .init = clk_mux_no_reparent_test_init, + .exit = clk_mux_no_reparent_test_exit, + .test_cases = clk_mux_no_reparent_test_cases, +}; + kunit_test_suites( &clk_leaf_mux_set_rate_parent_test_suite, &clk_test_suite, &clk_multiple_parents_mux_test_suite, + &clk_mux_no_reparent_test_suite, &clk_mux_notifier_test_suite, &clk_orphan_transparent_multiple_parent_mux_test_suite, &clk_orphan_transparent_single_parent_test_suite, diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 28ff6f1a6ada..f8f220fb5dab 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -1333,6 +1333,8 @@ int __clk_mux_determine_rate_closest(struct clk_hw *hw, int clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req, unsigned long flags); +int clk_hw_determine_rate_no_reparent(struct clk_hw *hw, + struct clk_rate_request *req); void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent); void clk_hw_get_rate_range(struct clk_hw *hw, unsigned long *min_rate, unsigned long *max_rate); From patchwork Fri May 5 11:25:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232567 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9033C7EE31 for ; Fri, 5 May 2023 11:35:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231698AbjEELf4 (ORCPT ); Fri, 5 May 2023 07:35:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231764AbjEELfx (ORCPT ); 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Fri, 5 May 2023 07:25:59 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:07 +0200 Subject: [PATCH v4 05/68] clk: lan966x: Remove unused round_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-5-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1553; i=maxime@cerno.tech; h=from:subject:message-id; bh=VjoPzGPlkvAYTTAB0KZcMAeTT6q4N2DMAu8sHFnEyEI=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxdpBNxWzYu7lrpCK/3goj/SIf6nz1wqOtWpMS8hJOeh 49t9HaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZhI9D9GhiNCtTWcQTlzzJ5ZcQdfU3 nHtXGHiN7sZ5sC5rrF7syUMWVkePbrbevy6RdYdtaayi1JykqLP63OdtHw7Y8jh0vDWDO38AEA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The lan966x driver registers a gck clock with both a determine_rate and a round_rate implementation. Both are equivalent, and are only called by clk_core_determine_round_nolock() which favors determine_rate. Thus, lan966x_gck_round_rate() is never called, so we can just remove it. Signed-off-by: Maxime Ripard --- drivers/clk/clk-lan966x.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c index 460e7216bfa1..870fd7df50c1 100644 --- a/drivers/clk/clk-lan966x.c +++ b/drivers/clk/clk-lan966x.c @@ -103,22 +103,6 @@ static int lan966x_gck_set_rate(struct clk_hw *hw, return 0; } -static long lan966x_gck_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) -{ - unsigned int div; - - if (rate == 0 || *parent_rate == 0) - return -EINVAL; - - if (rate >= *parent_rate) - return *parent_rate; - - div = DIV_ROUND_CLOSEST(*parent_rate, rate); - - return *parent_rate / div; -} - static unsigned long lan966x_gck_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { @@ -177,7 +161,6 @@ static const struct clk_ops lan966x_gck_ops = { .enable = lan966x_gck_enable, .disable = lan966x_gck_disable, .set_rate = lan966x_gck_set_rate, - .round_rate = lan966x_gck_round_rate, .recalc_rate = lan966x_gck_recalc_rate, .determine_rate = lan966x_gck_determine_rate, .set_parent = lan966x_gck_set_parent, From patchwork Fri May 5 11:25:08 2023 Content-Type: text/plain; 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Fri, 5 May 2023 07:26:02 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:08 +0200 Subject: [PATCH v4 06/68] clk: nodrv: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-6-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1144; i=maxime@cerno.tech; h=from:subject:message-id; bh=TJ2VtIz18atstp2voJ9kvEWV17c/2UfF9HLl2Gj9L34=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxd1Rh+5+KggIC7yd73Qyi0GDX/7/m44dHCm4tY3S3sl 1znwdpSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAiTD4Mv1km9AWvELS+4JJ3tshh3t oZDsrsoQ/3LRV1LXx7K9G9exvD/+KUzsz1TxRuvK24f/SFyOVPwWJvE43UueXVnu4pO25hwAkA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The nodrv clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. Even though it's a mock clock and the missing function is harmless, we'll start to require a determine_rate implementation when set_parent is set, so let's fill it. Signed-off-by: Maxime Ripard --- drivers/clk/clk.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 5365595433c8..e4a1d5f9694c 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -4331,11 +4331,18 @@ static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) return -ENXIO; } +static int clk_nodrv_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + return -ENXIO; +} + static const struct clk_ops clk_nodrv_ops = { .enable = clk_nodrv_prepare_enable, .disable = clk_nodrv_disable_unprepare, .prepare = clk_nodrv_prepare_enable, .unprepare = clk_nodrv_disable_unprepare, + .determine_rate = clk_nodrv_determine_rate, .set_rate = clk_nodrv_set_rate, .set_parent = clk_nodrv_set_parent, }; From patchwork Fri May 5 11:25:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232495 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EC6DC77B75 for ; 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Fri, 5 May 2023 07:26:05 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:09 +0200 Subject: [PATCH v4 07/68] clk: test: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-7-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1999; i=maxime@cerno.tech; h=from:subject:message-id; bh=JfDjyedFCo6DdHz17aemSi2AiiDz2HvUFiAwMQ7IlAM=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxfd4SiXTZuwKvJwTW5qu2P7Hfa/hafYj0h35Fzy4tma qHaxo5SFQYyLQVZMkSVG2HxJ3KlZrzvZ+ObBzGFlAhnCwMUpABNR387I8M8tIV4sKic93WeVn2rOnN jbOsF+RS4HmN4dDFuoJGLGy8iw5yfT78P5zNoWN8NOaMu1zT/PJxpwWEYsQnJjgPeMG/qMAA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The single parent clock in our kunit tests implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is not entirely unexpected, since its whole purpose it to have a single parent. When determine_rate is missing, and since CLK_SET_RATE_PARENT is set for all its instances, the default behaviour of the framework will be to forward it to the current parent. This is totally fine as far as the tests are concerned, but we'll start to mandate a determine_rate implementation when set_parent is set, so let's fill it with __clk_mux_determine_rate() which will have the same behavior. Signed-off-by: Maxime Ripard --- drivers/clk/clk_test.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index b3ed3b0e4c31..a154ec9d0111 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -104,6 +104,23 @@ static const struct clk_ops clk_dummy_minimize_rate_ops = { }; static const struct clk_ops clk_dummy_single_parent_ops = { + /* + * FIXME: Even though we should probably be able to use + * __clk_mux_determine_rate() here, if we use it and call + * clk_round_rate() or clk_set_rate() with a rate lower than + * what all the parents can provide, it will return -EINVAL. + * + * This is due to the fact that it has the undocumented + * behaviour to always pick up the closest rate higher than the + * requested rate. If we get something lower, it thus considers + * that it's not acceptable and will return an error. + * + * It's somewhat inconsistent and creates a weird threshold + * between rates above the parent rate which would be rounded to + * what the parent can provide, but rates below will simply + * return an error. + */ + .determine_rate = __clk_mux_determine_rate_closest, .set_parent = clk_dummy_single_set_parent, .get_parent = clk_dummy_single_get_parent, }; From patchwork Fri May 5 11:25:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232493 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B6A1C77B75 for ; Fri, 5 May 2023 11:27:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231347AbjEEL1f (ORCPT ); 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Fri, 5 May 2023 07:26:08 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:10 +0200 Subject: [PATCH v4 08/68] clk: actions: composite: Add a determine_rate hook for pass clk MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-8-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , =?utf-8?q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam , linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2251; i=maxime@cerno.tech; h=from:subject:message-id; bh=hcjjYUL7EJDA0vLr7YhiayUeo8EOv+6/jhAeGWoQsRM=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxfJ7fG4/nRTTkirY7FNxPaXGbz2UwxM7y0/fMP3cfxn xpv2HaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZiIxjOGf2r3D9zJV68U8JgfKTFZj7 WAWf/yD0+XGNbiHaf/q8iIJzL8s5G7c+p1zlm/dvb2wgxj1ocukuKi7kaT9me5f/zTcvAEAwA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Actions "Pass" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: "Andreas Färber" Cc: Manivannan Sadhasivam Cc: linux-actions@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/clk/actions/owl-composite.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/actions/owl-composite.c b/drivers/clk/actions/owl-composite.c index 101706e0c66f..e7784f9e5bf6 100644 --- a/drivers/clk/actions/owl-composite.c +++ b/drivers/clk/actions/owl-composite.c @@ -189,6 +189,7 @@ const struct clk_ops owl_comp_fix_fact_ops = { const struct clk_ops owl_comp_pass_ops = { /* mux_ops */ + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = owl_comp_get_parent, .set_parent = owl_comp_set_parent, From patchwork Fri May 5 11:25:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232494 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21454C7EE22 for ; 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Fri, 5 May 2023 07:26:11 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:11 +0200 Subject: [PATCH v4 09/68] clk: at91: main: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-9-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Alexandre Belloni , Claudiu Beznea , Nicolas Ferre , linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2380; i=maxime@cerno.tech; h=from:subject:message-id; bh=H9KRPCBcjEpoRfMcvh/lzMCqJMQ8acMLWyrCaLBibMo=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxfVnr+w79OKe/psdqxlidpxlXEX/ab4R368c/aJ18MP S9XXdpSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAixxgZ/oe08q/2sRJ/zNO++GXkBb 4FoXtumXwVt7h5Xfn9Gtu2Q7YM/51jra9wLnFfvn56ud4yk8byX5vrZS8FaZpOkCi+OeONNQ8A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The SAM9x5 main clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Alexandre Belloni Cc: Claudiu Beznea Cc: Nicolas Ferre Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/clk/at91/clk-main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index 8601b27c1ae0..4966e0f9e92c 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c @@ -533,6 +533,7 @@ static const struct clk_ops sam9x5_main_ops = { .prepare = clk_sam9x5_main_prepare, .is_prepared = clk_sam9x5_main_is_prepared, .recalc_rate = clk_sam9x5_main_recalc_rate, + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = clk_sam9x5_main_set_parent, .get_parent = clk_sam9x5_main_get_parent, .save_context = clk_sam9x5_main_save_context, From patchwork Fri May 5 11:25:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232499 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D500C77B75 for ; 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Fri, 5 May 2023 07:26:14 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:12 +0200 Subject: [PATCH v4 10/68] clk: at91: sckc: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-10-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Alexandre Belloni , Claudiu Beznea , Nicolas Ferre , linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2248; i=maxime@cerno.tech; h=from:subject:message-id; bh=8nOL4GYSumNmGHVS7LxATd09NwDbg4eZjT+yvgBhj5o=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxf51+zPufCl3N04K7maQ2v2g+iDxQ9C2Cp05rsIrX6h I7+uo5SFQYyLQVZMkSVG2HxJ3KlZrzvZ+ObBzGFlAhnCwMUpABOZF8bwz/713oeVvyz3BNxaddvoh+ qyixc9Mlj/qzz1LWU1u9UmsJaRoVX7TCKvyuZ/FbHFPIycp4U+Hp9rOymfxfYzu8w8veRebgA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The SAM9x5 slow clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Alexandre Belloni Cc: Claudiu Beznea Cc: Nicolas Ferre Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/clk/at91/sckc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index fdc9b669f8a7..a2d86c377827 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -310,6 +310,7 @@ static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw) } static const struct clk_ops sam9x5_slow_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = clk_sam9x5_slow_set_parent, .get_parent = clk_sam9x5_slow_get_parent, }; From patchwork Fri May 5 11:25:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232496 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9FF0C7EE22 for ; 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Fri, 5 May 2023 07:26:17 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:13 +0200 Subject: [PATCH v4 11/68] clk: berlin: div: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-11-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2069; i=maxime@cerno.tech; h=from:subject:message-id; bh=35rdD463368ofujnEXdbwDQAd8RArYswa99lnRTcO1k=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxd/lW2ziTm4e/+D0tl9p0RUfd4IWf4KWVHJybHaLPfp 08M7O0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjARLVaGP9xzeh/NM36ZdC/myyKvA4 /+VzOckeGt9Z2larq02O79p2JGhjXnMspOdwWybTArTG9uT+4/yBzclj9rHbvP4vQmwyNSLAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Berlin2 divider clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/berlin/berlin2-div.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/berlin/berlin2-div.c b/drivers/clk/berlin/berlin2-div.c index eb14a5bc0507..0a248bfe2193 100644 --- a/drivers/clk/berlin/berlin2-div.c +++ b/drivers/clk/berlin/berlin2-div.c @@ -210,6 +210,7 @@ static unsigned long berlin2_div_recalc_rate(struct clk_hw *hw, } static const struct clk_ops berlin2_div_rate_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .recalc_rate = berlin2_div_recalc_rate, }; From patchwork Fri May 5 11:25:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232498 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0777C7EE2C for ; Fri, 5 May 2023 11:27:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231384AbjEEL1u (ORCPT ); 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Fri, 5 May 2023 07:26:20 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:14 +0200 Subject: [PATCH v4 12/68] clk: cdce706: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-12-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Max Filippov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2100; i=maxime@cerno.tech; h=from:subject:message-id; bh=MiHs8cCznddkbJuUwcByfTYYV8u/um7DYugP8Tqbc8g=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxevZdx+5vuB+YLzLnZcn+K8Xi/Jjjvgk3RP0ZMpvQ+W +v7Y2FHKwiDGxSArpsgSI2y+JO7UrNedbHzzYOawMoEMYeDiFICJuPxlZHgVU/T7qeuPdbGO7N7n/9 +v273FYZkztwDX716Xmrxj3X2MDF0X+gQP9/+aqmcf5TPZNmnntf7oLfe+HdxrrvzLSy4glx8A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The cdce706 "clkin" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Max Filippov Signed-off-by: Maxime Ripard --- drivers/clk/clk-cdce706.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-cdce706.c b/drivers/clk/clk-cdce706.c index d8bee8180a6b..139aa0954cc1 100644 --- a/drivers/clk/clk-cdce706.c +++ b/drivers/clk/clk-cdce706.c @@ -155,6 +155,7 @@ static u8 cdce706_clkin_get_parent(struct clk_hw *hw) } static const struct clk_ops cdce706_clkin_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = cdce706_clkin_set_parent, .get_parent = cdce706_clkin_get_parent, }; From patchwork Fri May 5 11:25:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232497 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C254C7EE23 for ; Fri, 5 May 2023 11:27:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230398AbjEEL1t (ORCPT ); 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Fri, 5 May 2023 07:26:23 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:15 +0200 Subject: [PATCH v4 13/68] clk: k210: pll: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-13-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2071; i=maxime@cerno.tech; h=from:subject:message-id; bh=tx2779gvFmRg6n11yEWbc0Wyatc/EXeJLObE8AQx3VM=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxc79PFH1Cf7fVixa16D/YoZAf2V+sfPC3mdTXqbZhJk wF/fUcrCIMbFICumyBIjbL4k7tSs151sfPNg5rAygQxh4OIUgIlcc2NkaN3BOU3CaUO9T26l93LL1A ouDe9ZfsezZtQVbwj7YvC7l+F/lUqvyoIU3kuTl7xdHOYs8bxdZvGefYcdXknOZnzx86E+LwA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The K210 PLL clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/clk-k210.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c index 4eed667eddaf..21d942065a3e 100644 --- a/drivers/clk/clk-k210.c +++ b/drivers/clk/clk-k210.c @@ -537,6 +537,7 @@ static const struct clk_ops k210_pll2_ops = { .disable = k210_pll_disable, .is_enabled = k210_pll_is_enabled, .recalc_rate = k210_pll_get_rate, + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = k210_pll2_set_parent, .get_parent = k210_pll2_get_parent, }; From patchwork Fri May 5 11:25:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62DB4C77B75 for ; Fri, 5 May 2023 11:27:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231637AbjEEL1z (ORCPT ); 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Fri, 5 May 2023 07:26:25 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:16 +0200 Subject: [PATCH v4 14/68] clk: k210: aclk: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-14-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2066; i=maxime@cerno.tech; h=from:subject:message-id; bh=dKweGBHOPEOF5rM+h1gKLm+p5kHMExLvuvPtl9B+jSI=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxf7LDeNW2B0WfHKvmMBpZO/nmA4o3L2163r0cY5FQ0C nJMvd5SyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAi3c8ZGfbLOCk9E1qkZ2c0/cP/zd /5ls15czLpulPU/iRd1RlRBoYMf+VKdvCr39XYyPS7J9T7x/9TLvs+9a508/l0RFKmeOc5PT4A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The K210 ACLK clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/clk-k210.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c index 21d942065a3e..b5b8fb29a347 100644 --- a/drivers/clk/clk-k210.c +++ b/drivers/clk/clk-k210.c @@ -636,6 +636,7 @@ static unsigned long k210_aclk_get_rate(struct clk_hw *hw, } static const struct clk_ops k210_aclk_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = k210_aclk_set_parent, .get_parent = k210_aclk_get_parent, .recalc_rate = k210_aclk_get_rate, From patchwork Fri May 5 11:25:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232501 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6E55C7EE22 for ; Fri, 5 May 2023 11:27:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231200AbjEEL14 (ORCPT ); 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Fri, 5 May 2023 07:26:28 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:17 +0200 Subject: [PATCH v4 15/68] clk: k210: mux: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-15-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2120; i=maxime@cerno.tech; h=from:subject:message-id; bh=P2WWJt4DQNfqvSPUA0MDIVdXPHKUUGl8jwfoiAxPqmo=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxfXebE/dbGyUt/08t11Vtc9Kwq+tWmVv67Tan+wo+yF 7B73jlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAExkSjDDfwfjrNLJNrnpp78FHQ62Vu jUfP7NU1/AU4t5rULaoWIXG0aGT/9mnzwT+o7z7qW2WgmtvoDE2gMLJ0sqxakWcDSpTXJmAAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The K210 mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/clk-k210.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c index b5b8fb29a347..870adac5cdee 100644 --- a/drivers/clk/clk-k210.c +++ b/drivers/clk/clk-k210.c @@ -776,6 +776,7 @@ static unsigned long k210_clk_get_rate(struct clk_hw *hw, static const struct clk_ops k210_clk_mux_ops = { .enable = k210_clk_enable, .disable = k210_clk_disable, + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = k210_clk_set_parent, .get_parent = k210_clk_get_parent, .recalc_rate = k210_clk_get_rate, From patchwork Fri May 5 11:25:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D219C7EE26 for ; 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Fri, 5 May 2023 07:26:31 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:18 +0200 Subject: [PATCH v4 16/68] clk: lmk04832: clkout: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-16-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Liam Beguin X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2113; i=maxime@cerno.tech; h=from:subject:message-id; bh=mu7yCC2IWszGqRQyvTGFuufG9qQ9YdHxJt5tU6jeTEc=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxefvXBHoDNH48Vjqdb9H5YUtGoe5LSU376v7sP+m2W7 47ofd5SyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAingyMDKdmzhCKbPacnlP+Tff95l P7Zj8TO/k+0tpVkO0t22rzvjhGhvceG1yYKo6x36qyDubdauvIovxsxX/+bC65Ve+mzX3Eyw4A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The LKM04832 "CLKOUT" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Since the CLK_SET_RATE_NO_REPARENT flag was already set though, it seems unlikely. Reviewed-by: Liam Beguin Signed-off-by: Maxime Ripard --- drivers/clk/clk-lmk04832.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-lmk04832.c b/drivers/clk/clk-lmk04832.c index afdfee3b365f..e22ac93e0c2f 100644 --- a/drivers/clk/clk-lmk04832.c +++ b/drivers/clk/clk-lmk04832.c @@ -1279,6 +1279,7 @@ static const struct clk_ops lmk04832_clkout_ops = { .is_enabled = lmk04832_clkout_is_enabled, .prepare = lmk04832_clkout_prepare, .unprepare = lmk04832_clkout_unprepare, + .determine_rate = __clk_mux_determine_rate, .set_parent = lmk04832_clkout_set_parent, .get_parent = lmk04832_clkout_get_parent, }; From patchwork Fri May 5 11:25:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2043C7EE2C for ; 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Fri, 5 May 2023 07:26:34 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:19 +0200 Subject: [PATCH v4 17/68] clk: lochnagar: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-17-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Charles Keepax , Richard Fitzgerald , patches@opensource.cirrus.com X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2166; i=maxime@cerno.tech; h=from:subject:message-id; bh=hHULGSQyWrgaQs8F7vHiJZihgLBsgfa1Ly8Ey3/OdJA=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxeveKzAX5DUd//AyW+r/R6rp/sHt3przuUTqL5wTKfu 3LQPHaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZjIVm9Ghg3yFYsWBR0/1BGm9Snngi n/1/Kc4N1rG7Kn2u33P7TLJJaRYcE8DZuK307sDK8yLR/Nit+4yttnwTzHu3sjDnU7sW79zQUA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The lochnagar clocks implement a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Since there's no upstream device tree using that driver, it's a bit hard to tell if it uses the assigned-clock properties. The binding and its example uses them though, so it's likely that the author intent was to force the parent through the device tree and prevent any reparenting but through an explicit call to clk_set_parent(). This case is equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: Charles Keepax Cc: Richard Fitzgerald Cc: patches@opensource.cirrus.com Tested-by: Charles Keepax Signed-off-by: Maxime Ripard --- drivers/clk/clk-lochnagar.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-lochnagar.c b/drivers/clk/clk-lochnagar.c index 80944bf482e9..db468a62c8d7 100644 --- a/drivers/clk/clk-lochnagar.c +++ b/drivers/clk/clk-lochnagar.c @@ -209,6 +209,7 @@ static u8 lochnagar_clk_get_parent(struct clk_hw *hw) static const struct clk_ops lochnagar_clk_ops = { .prepare = lochnagar_clk_prepare, .unprepare = lochnagar_clk_unprepare, + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = lochnagar_clk_set_parent, .get_parent = lochnagar_clk_get_parent, }; From patchwork Fri May 5 11:25:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232505 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 970F3C7EE23 for ; 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Fri, 5 May 2023 07:26:37 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:20 +0200 Subject: [PATCH v4 18/68] clk: qoriq: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-18-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2006; i=maxime@cerno.tech; h=from:subject:message-id; bh=IEVspLIBynuD8d0bw0q7G8CwcozeVNaDJAIwti0nMto=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxcvzQp4Pz1ZU3inXm/DlXUyG4+ennqlWlJiv4Jo+LZJ Fn5SHaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZhIPj8jw7Fp21/8f68ipZRw67Tfuv aZ5uHX+C2WP7c0ZJ7Ve9u66RfD/9rpT6rs33GZpfnsUriQdyXn7c9vmxsErPbbcQjd27ZAixsA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Qoriq mux clocks implement a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/clk-qoriq.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index 5eddb9f0d6bd..e3386fd98c5e 100644 --- a/drivers/clk/clk-qoriq.c +++ b/drivers/clk/clk-qoriq.c @@ -878,6 +878,7 @@ static u8 mux_get_parent(struct clk_hw *hw) } static const struct clk_ops cmux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = mux_get_parent, .set_parent = mux_set_parent, }; From patchwork Fri May 5 11:25:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B964C77B7F for ; Fri, 5 May 2023 11:28:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231539AbjEEL2B (ORCPT ); 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Fri, 5 May 2023 07:26:39 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:21 +0200 Subject: [PATCH v4 19/68] clk: si5341: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-19-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2083; i=maxime@cerno.tech; h=from:subject:message-id; bh=8M2rq/frXwJrgSgEIiAT0JuzTH8kFo00GD+lD/XYRbQ=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxcft/f7bLLN/nFPWLza3U/Ks+9aGTpfqMyJaLly8ZGH 136WjlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAExk50ZGhju/2Gt3VMb2h2rztYoZMk ss2x1svE7Z7tx8iX0x0fufnWFkOB10LTm86H5588GEL0clrlhtrA9SCz4/51Gr+5bvvBuWswMA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The SI5341 clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/clk-si5341.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-si5341.c b/drivers/clk/clk-si5341.c index 0e528d7ba656..4b65def64109 100644 --- a/drivers/clk/clk-si5341.c +++ b/drivers/clk/clk-si5341.c @@ -551,6 +551,7 @@ static int si5341_clk_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops si5341_clk_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = si5341_clk_set_parent, .get_parent = si5341_clk_get_parent, .recalc_rate = si5341_clk_recalc_rate, From patchwork Fri May 5 11:25:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232508 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9458CC7EE26 for ; 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Fri, 5 May 2023 07:26:42 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:22 +0200 Subject: [PATCH v4 20/68] clk: stm32f4: mux: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-20-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Alexandre Torgue , Maxime Coquelin , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2028; i=maxime@cerno.tech; h=from:subject:message-id; bh=EiQTKXTxWl310eP7gvoXbVwd4WahDHb5ImRJPMpg1x8=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxf/OyKwslul+tjbacI6e77szq8Ml903Ofj82sL9a3Z1 5nH5dZSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAi/zcz/LN6+mjn3uNb+3/y2swVFg y9FezIINh36HHo8Rs9KitMzSQZ/lmWnGl5L3u8paby+/KLX1n/Z69PXvC/rfZfEOuMqFlcX9kA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The STM32F4 mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. However, the upstream device trees seem to use assigned-clock-parents on that clock to force the parent at boot time, so it's likely that the author intent was to force the parent through the device tree and prevent any reparenting but through an explicit call to clk_set_parent(). This case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: Alexandre Torgue Cc: Maxime Coquelin Cc: linux-arm-kernel@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Maxime Ripard --- drivers/clk/clk-stm32f4.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index 473dfe632cc5..07c13ebe327d 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c @@ -1045,6 +1045,7 @@ static int cclk_mux_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops cclk_mux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = cclk_mux_get_parent, .set_parent = cclk_mux_set_parent, }; From patchwork Fri May 5 11:25:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232506 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 300A7C77B7F for ; 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Fri, 5 May 2023 07:26:45 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:23 +0200 Subject: [PATCH v4 21/68] clk: vc5: mux: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-21-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Luca Ceresoli X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2115; i=maxime@cerno.tech; h=from:subject:message-id; bh=+M217ExyudxYDTcsnHSy+wjNmpcc3Hy4s0mqI5VvgJI=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxc3K8mtKjPvm5eZW7F83WeRZoY/zcvLeDpevemceyHg a6NaRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACaic5Lhn1H4dq55BRuM1+jftijKuG /0bBkvx1HVXt6/gqHXDNU6/zIyfP0RNlPC7vfpz3IcvQ9fLNrndnq6wTaZoo4/qhavJXmduAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Versaclock5 mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Luca Ceresoli Signed-off-by: Maxime Ripard --- drivers/clk/clk-versaclock5.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c index fa71a57875ce..97ffd4ef0e5f 100644 --- a/drivers/clk/clk-versaclock5.c +++ b/drivers/clk/clk-versaclock5.c @@ -281,6 +281,7 @@ static int vc5_mux_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops vc5_mux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = vc5_mux_set_parent, .get_parent = vc5_mux_get_parent, }; From patchwork Fri May 5 11:25:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232509 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A311C7EE2C for ; Fri, 5 May 2023 11:28:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231864AbjEEL2G (ORCPT ); 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Fri, 5 May 2023 07:26:48 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:24 +0200 Subject: [PATCH v4 22/68] clk: vc5: clkout: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-22-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Luca Ceresoli X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2203; i=maxime@cerno.tech; h=from:subject:message-id; bh=d4lIt12foa+ezGOQZ2uJASGRBKNzJfQihn8otsu7P3c=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxc73lyyd29u99aYS180H4feXqXIt9DRSqt46o/8uRp/ V2006yhlYRDjYpAVU2SJETZfEndq1utONr55MHNYmUCGMHBxCsBEivcx/FMzD5eSbX9b3yqr+8h9wj SzCt3Aa7wHchbfqa3ROBGivpThf7pI5qZi+QN6PZIvir+sUj7dX7jHZ4GNS4Kplaeixr5iDgA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Versaclock5 "clkout" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Luca Ceresoli Signed-off-by: Maxime Ripard --- drivers/clk/clk-versaclock5.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c index 97ffd4ef0e5f..3d6f4b01e6c0 100644 --- a/drivers/clk/clk-versaclock5.c +++ b/drivers/clk/clk-versaclock5.c @@ -726,6 +726,7 @@ static int vc5_clk_out_set_parent(struct clk_hw *hw, u8 index) static const struct clk_ops vc5_clk_out_ops = { .prepare = vc5_clk_out_prepare, .unprepare = vc5_clk_out_unprepare, + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = vc5_clk_out_set_parent, .get_parent = vc5_clk_out_get_parent, }; From patchwork Fri May 5 11:25:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232507 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2D53C77B75 for ; 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Fri, 5 May 2023 07:26:51 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:25 +0200 Subject: [PATCH v4 23/68] clk: wm831x: clkout: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-23-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , patches@opensource.cirrus.com, Charles Keepax X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2209; i=maxime@cerno.tech; h=from:subject:message-id; bh=OU4W2Pef26xOilBeZ2HlVUPrtt7cW0E5heyCm/7prjo=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxdP0Mr6Zrs/6XzblE1r79jOiFKz+L28on5X8EZ2iXp9 88OfO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCRDWsZGabIyZ0OOyj9XUgm0ePuvo l5XM/tQ/sv3wlr9zl/V/bGzjcM//T2yCfk3sgWq9WadpkjzI2talPxXJm6armMt6fNUmamcwIA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The WM381x "clkout" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: patches@opensource.cirrus.com Acked-by: Charles Keepax Signed-off-by: Maxime Ripard --- drivers/clk/clk-wm831x.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-wm831x.c b/drivers/clk/clk-wm831x.c index ae6dd38ec053..34e9d4d541e2 100644 --- a/drivers/clk/clk-wm831x.c +++ b/drivers/clk/clk-wm831x.c @@ -329,6 +329,7 @@ static const struct clk_ops wm831x_clkout_ops = { .is_prepared = wm831x_clkout_is_prepared, .prepare = wm831x_clkout_prepare, .unprepare = wm831x_clkout_unprepare, + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = wm831x_clkout_get_parent, .set_parent = wm831x_clkout_set_parent, }; From patchwork Fri May 5 11:25:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232510 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FF78C77B75 for ; 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Fri, 5 May 2023 07:26:54 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:26 +0200 Subject: [PATCH v4 24/68] clk: davinci: da8xx-cfgchip: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-24-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , David Lechner , Sekhar Nori X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2066; i=maxime@cerno.tech; h=from:subject:message-id; bh=q8O+ecKOecgcGF1E9rmnxw+WX8oWLqIpK5EnNjUsqBU=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxcvqOF4Yu/uMmHxrXmSE7UrJ549z+VzItH4+JYnunf+ f11k1FHKwiDGxSArpsgSI2y+JO7UrNedbHzzYOawMoEMYeDiFICJ7NjD8E9l/wm3CQaOrPXHJ9xxjP f8Z7Ne+ciJnWI+cz81Oq6f1ziD4a/cFa2In5May+IPOF5WOOfdYmrz1tukmUV6l8XsyYkHP7MDAA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Davinci DA8xxx cfgchip mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. However, the upstream device trees seem to use assigned-clock-parents on that clock to force the parent at boot time, so it's likely that the author intent was to force the parent through the device tree and prevent any reparenting but through an explicit call to clk_set_parent(). This case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: David Lechner Cc: Sekhar Nori Acked-by: David Lechner Signed-off-by: Maxime Ripard --- drivers/clk/davinci/da8xx-cfgchip.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/davinci/da8xx-cfgchip.c b/drivers/clk/davinci/da8xx-cfgchip.c index 4103d605e804..11fcf6f63336 100644 --- a/drivers/clk/davinci/da8xx-cfgchip.c +++ b/drivers/clk/davinci/da8xx-cfgchip.c @@ -229,6 +229,7 @@ static u8 da8xx_cfgchip_mux_clk_get_parent(struct clk_hw *hw) } static const struct clk_ops da8xx_cfgchip_mux_clk_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = da8xx_cfgchip_mux_clk_set_parent, .get_parent = da8xx_cfgchip_mux_clk_get_parent, }; From patchwork Fri May 5 11:25:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232511 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26ED7C77B7F for ; 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Fri, 5 May 2023 07:26:57 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:27 +0200 Subject: [PATCH v4 25/68] clk: davinci: da8xx-cfgchip: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-25-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , David Lechner , Sekhar Nori X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2262; i=maxime@cerno.tech; h=from:subject:message-id; bh=txOLR5CD/Ee5Qs94cdaqi9AMwqcaHScbOv1JLy0vu3M=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxebG3hs6Xvk3iOxr9n1jtb0o+vMb+j825n8+MmxFI31 WwNXdpSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAiWtGMDL0u2rZKAo1/P1TwtrqU2r 9/udgu0FYuVHfaugm5mpccTzL8U+MqSl8us3GpQJ4Rt5HOwcO/35lK7nS8n+YeFultXr+dBQA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Davinci DA8xxx cfgchip "clk48" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: David Lechner Cc: Sekhar Nori Acked-by: David Lechner Signed-off-by: Maxime Ripard --- drivers/clk/davinci/da8xx-cfgchip.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/davinci/da8xx-cfgchip.c b/drivers/clk/davinci/da8xx-cfgchip.c index 11fcf6f63336..1bbcc8e43bc5 100644 --- a/drivers/clk/davinci/da8xx-cfgchip.c +++ b/drivers/clk/davinci/da8xx-cfgchip.c @@ -565,6 +565,7 @@ static u8 da8xx_usb1_clk48_get_parent(struct clk_hw *hw) } static const struct clk_ops da8xx_usb1_clk48_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = da8xx_usb1_clk48_set_parent, .get_parent = da8xx_usb1_clk48_get_parent, }; From patchwork Fri May 5 11:25:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232513 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18061C7EE23 for ; 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Fri, 5 May 2023 07:26:59 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:28 +0200 Subject: [PATCH v4 26/68] clk: imx: busy: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-26-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Fabio Estevam , Peng Fan , Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team , Pengutronix Kernel Team X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2391; i=maxime@cerno.tech; h=from:subject:message-id; bh=XoSYRvlmzcByeBERHtmIUCUrRDIlqhQZ050GFdHYKNg=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxd/minzp/bDbWevnBi3sGS+bafMo/7M+bPj33H9Ov/p ypOTO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjAR04+MDJNnTDbgnskZso7JY/5eFf 4f+2dfnhqUG63Jnr8nd2KRxhaGv7JRbWbL3m5hWK6w/fGUTV07Vu3Ws9JLv/dhz5XUrOqGGDYA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The iMX busy clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Abel Vesa Cc: Fabio Estevam Cc: Peng Fan Cc: Sascha Hauer Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team Cc: Pengutronix Kernel Team Signed-off-by: Maxime Ripard --- drivers/clk/imx/clk-busy.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/imx/clk-busy.c b/drivers/clk/imx/clk-busy.c index 6f17311647f3..f163df952ccc 100644 --- a/drivers/clk/imx/clk-busy.c +++ b/drivers/clk/imx/clk-busy.c @@ -148,6 +148,7 @@ static int clk_busy_mux_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops clk_busy_mux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_busy_mux_get_parent, .set_parent = clk_busy_mux_set_parent, }; From patchwork Fri May 5 11:25:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232512 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D639C7EE2C for ; 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Fri, 5 May 2023 07:27:03 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:29 +0200 Subject: [PATCH v4 27/68] clk: imx: fixup-mux: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-27-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Fabio Estevam , Peng Fan , Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team , Pengutronix Kernel Team X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2211; i=maxime@cerno.tech; h=from:subject:message-id; bh=fVDmwUo+ONYakLHIku1FGCJ/Cp1OnwLFtksw10VZRy8=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxdX1nH/5i4VvBVRx6GwIye/VFO78nKMHefJplmXFpZy rgvuKGVhEONikBVTZIkRNl8Sd2rW6042vnkwc1iZQIYwcHEKwERO5DEyXGwV0ZimHperz759Rv9uv4 VF/k65z57kbWrt/dw7oe33Xob/Gc6e6875RojWRyUUzl5fL8Hyfufud60LY+9+LJ3RtrWECwA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The iMX fixup mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. However, the upstream device trees seem to use assigned-clock-parents on that clock to force the parent at boot time, so it's likely that the author intent was to force the parent through the device tree and prevent any reparenting but through an explicit call to clk_set_parent(). This case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: Abel Vesa Cc: Fabio Estevam Cc: Peng Fan Cc: Sascha Hauer Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team Cc: Pengutronix Kernel Team Signed-off-by: Maxime Ripard --- drivers/clk/imx/clk-fixup-mux.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/imx/clk-fixup-mux.c b/drivers/clk/imx/clk-fixup-mux.c index c82401570c84..b48701864ef0 100644 --- a/drivers/clk/imx/clk-fixup-mux.c +++ b/drivers/clk/imx/clk-fixup-mux.c @@ -60,6 +60,7 @@ static int clk_fixup_mux_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops clk_fixup_mux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_fixup_mux_get_parent, .set_parent = clk_fixup_mux_set_parent, }; From patchwork Fri May 5 11:25:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232514 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29313C7EE2E for ; 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Fri, 5 May 2023 07:27:06 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:30 +0200 Subject: [PATCH v4 28/68] clk: imx: scu: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-28-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Fabio Estevam , Peng Fan , Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team , Pengutronix Kernel Team X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2401; i=maxime@cerno.tech; h=from:subject:message-id; bh=qa3Xj7t7TWFPG+dMVFbDhq/Z9XaHdUp96ZtkDRi/NwA=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxcbs7R3GjCcF2RY+cx2jk1Nj8cEq4tS67jDA59cX31+ yvvOjlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAEzEvY7hf+L1FZm/O2zDjj6PlO9/nP Ln0i82R0Pdk6teK1s7ZSwQSWRk2FaqxizNczqWv9ZuzdE11+8tU1zZezpNs/XSub2Za37IMQAA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The iMX SCU mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Abel Vesa Cc: Fabio Estevam Cc: Peng Fan Cc: Sascha Hauer Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team Cc: Pengutronix Kernel Team Signed-off-by: Maxime Ripard --- drivers/clk/imx/clk-scu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c index 1e6870f3671f..417f893f8895 100644 --- a/drivers/clk/imx/clk-scu.c +++ b/drivers/clk/imx/clk-scu.c @@ -785,6 +785,7 @@ static int clk_gpr_mux_scu_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops clk_gpr_mux_scu_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_gpr_mux_scu_get_parent, .set_parent = clk_gpr_mux_scu_set_parent, }; From patchwork Fri May 5 11:25:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232517 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 819F4C7EE26 for ; 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Fri, 5 May 2023 07:27:10 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:31 +0200 Subject: [PATCH v4 29/68] clk: mediatek: cpumux: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-29-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , AngeloGioacchino Del Regno , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2301; i=maxime@cerno.tech; h=from:subject:message-id; bh=7Gisy3436NyUV/3JhbE86qKa2YC1f2BvDT4KEfeGF9g=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxf/25KafbAnySb//eRG+33zucx2XdP79jCocXOfv4C/ lfmVjlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAEzk8S5Ghj2TezqcVY2efd/yu6Zl/s spEldi3ro6rGX9FvMg4k/x+k0M/2w8vxk1PF3M/qLM1SOm91P1Zc4JG+O2bZi9av3fTY8LirkB X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Mediatek cpumux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: AngeloGioacchino Del Regno Cc: Matthias Brugger Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai --- drivers/clk/mediatek/clk-cpumux.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c index da05f06192c0..a03826db4dcb 100644 --- a/drivers/clk/mediatek/clk-cpumux.c +++ b/drivers/clk/mediatek/clk-cpumux.c @@ -53,6 +53,7 @@ static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops clk_cpumux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_cpumux_get_parent, .set_parent = clk_cpumux_set_parent, }; From patchwork Fri May 5 11:25:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232516 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23F1EC77B7F for ; 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Fri, 5 May 2023 07:27:13 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:32 +0200 Subject: [PATCH v4 30/68] clk: pxa: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-30-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2027; i=maxime@cerno.tech; h=from:subject:message-id; bh=m312RSij+VFSlVDTkCDRhnurxOM7jCleCPKsMBOYKro=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhzxf/5DOuKV3OfrSoj1fFyTmgKO13YmTBruhvjK6GH5ev n3e6o5SFQYyLQVZMkSVG2HxJ3KlZrzvZ+ObBzGFlAhnCwMUpABOZyMzwv/Q7Q0V54VLnc4wRbja/jq 0+U7j1rtHm68sa7ASfnW7T+cHI0DLz65ylyvubD3n1pOtNWW/7k3PmJcEjeZ5hxedSkvWiWAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The PXA "CKEN" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/pxa/clk-pxa.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/pxa/clk-pxa.c b/drivers/clk/pxa/clk-pxa.c index 374098ebbf2b..ebee2afd05de 100644 --- a/drivers/clk/pxa/clk-pxa.c +++ b/drivers/clk/pxa/clk-pxa.c @@ -82,6 +82,7 @@ static u8 cken_get_parent(struct clk_hw *hw) } static const struct clk_ops cken_mux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = cken_get_parent, .set_parent = dummy_clk_set_parent, }; From patchwork Fri May 5 11:25:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232515 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A173AC77B75 for ; Fri, 5 May 2023 11:28:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231753AbjEEL2K (ORCPT ); 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Fri, 5 May 2023 07:27:16 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:33 +0200 Subject: [PATCH v4 31/68] clk: renesas: r9a06g032: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-31-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Geert Uytterhoeven , linux-renesas-soc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2367; i=maxime@cerno.tech; h=from:subject:message-id; bh=Ueh0dTmwRju76UtDYJSPwP9f2l4BHh1Cb+42vROXsMM=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5fY3NS6HZ+n9O9i2nS5fwJeYid0e6y3rNL5VbVP4tjR j1X6HaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZhIjicjw7p3qeUTY8LUcjPWyM6w2e nHeeGL42/hVdfrtmQ8tLl5OouR4dkKH7meuRXHTyxTeb2qwDXthJ9KmMu52d0rHt7xzgyT4wYA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Renesas r9a06g032 bitselect clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org Reviewed-by: Geert Uytterhoeven Reviewed-by: Miquel Raynal Signed-off-by: Maxime Ripard --- drivers/clk/renesas/r9a06g032-clocks.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index 40828616f723..55db63c7041a 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -1121,6 +1121,7 @@ static int r9a06g032_clk_mux_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops clk_bitselect_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = r9a06g032_clk_mux_get_parent, .set_parent = r9a06g032_clk_mux_set_parent, }; From patchwork Fri May 5 11:25:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232518 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2B65C77B75 for ; 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Fri, 5 May 2023 07:27:19 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:34 +0200 Subject: [PATCH v4 32/68] clk: socfpga: gate: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-32-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Dinh Nguyen X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2158; i=maxime@cerno.tech; h=from:subject:message-id; bh=qKw2AmPh6svBdIvNTxW4zd2arysTAEpIRXq0Xe6UZzc=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5fkFn05kSGhqzHN9tyiw10+gnkCQp+/9ScuMPL638y5 oJ6to5SFQYyLQVZMkSVG2HxJ3KlZrzvZ+ObBzGFlAhnCwMUpABPZGszI8EK2rMHC1Pewu0HZY07nxX kzxOUSz/j9WSd2946RbTCnC8P/clfFO8zvL7AL2Va+YixRtlujGtqWznvvJNu/jGP9z86wAwA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The SoCFGPA gate clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Dinh Nguyen Signed-off-by: Maxime Ripard --- drivers/clk/socfpga/clk-gate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c index 32ccda960f28..8dd601bd8538 100644 --- a/drivers/clk/socfpga/clk-gate.c +++ b/drivers/clk/socfpga/clk-gate.c @@ -110,6 +110,7 @@ static unsigned long socfpga_clk_recalc_rate(struct clk_hw *hwclk, static struct clk_ops gateclk_ops = { .recalc_rate = socfpga_clk_recalc_rate, + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = socfpga_clk_get_parent, .set_parent = socfpga_clk_set_parent, }; From patchwork Fri May 5 11:25:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232520 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 175E5C7EE22 for ; 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Fri, 5 May 2023 07:27:22 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:35 +0200 Subject: [PATCH v4 33/68] clk: stm32: core: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-33-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Alexandre Torgue , Maxime Coquelin , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2218; i=maxime@cerno.tech; h=from:subject:message-id; bh=fWYhKhv/wFYwQwGVziH2GFGzuOmOsKzPh9vOFbAKgeU=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5fY8m45Jmf+SZ/rxq/8MvYOr+Lu2ccfWq9fK6vwdOaL uys7OkpZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjARbmWG/2VbpnbqBS1+nNteLCocwH HlvOl9dcmpJeF98/YUe3x8spHhf3n6ScEv+l/FCue6xW/4vnN61jGpzK3J65SWab170V0WxA0A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The STM32 mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Since the CLK_SET_RATE_NO_REPARENT flag was already set though, it seems unlikely. Cc: Alexandre Torgue Cc: Maxime Coquelin Cc: linux-arm-kernel@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Maxime Ripard --- drivers/clk/stm32/clk-stm32-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c index 45a279e73779..3247539683c9 100644 --- a/drivers/clk/stm32/clk-stm32-core.c +++ b/drivers/clk/stm32/clk-stm32-core.c @@ -275,6 +275,7 @@ static int clk_stm32_mux_set_parent(struct clk_hw *hw, u8 index) } const struct clk_ops clk_stm32_mux_ops = { + .determine_rate = __clk_mux_determine_rate, .get_parent = clk_stm32_mux_get_parent, .set_parent = clk_stm32_mux_set_parent, }; From patchwork Fri May 5 11:25:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232521 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 028DBC7EE23 for ; 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Fri, 5 May 2023 07:27:25 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:36 +0200 Subject: [PATCH v4 34/68] clk: tegra: bpmp: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-34-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , linux-tegra@vger.kernel.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2159; i=maxime@cerno.tech; h=from:subject:message-id; bh=91kYDnAgQrHRLxckGlUeez9y2FRdmo60DMol1crV1K4=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5ckXHBI/zU5cXVrxeYLvxV3adiGP3Dlinsavayl4dCX 2P3vO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCRjnCG/3UXVqRvUwlkKSuKf5fBOn PxR4Y5a1R2Tnx5dt+1s+eiW84yMnxUCTpdXFW0Vr7ziPD+HzVqqpdkr18pynx+TdhLOJV3Iw8A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Tegra BPMP mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. However, the upstream device trees seem to use assigned-clock-parents on that clock to force the parent at boot time, so it's likely that the author intent was to force the parent through the device tree and prevent any reparenting but through an explicit call to clk_set_parent(). This case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: Jonathan Hunter Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Thierry Reding Cc: linux-tegra@vger.kernel.org Signed-off-by: Maxime Ripard --- drivers/clk/tegra/clk-bpmp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/tegra/clk-bpmp.c b/drivers/clk/tegra/clk-bpmp.c index 0ecdffaa6b16..a9f3fb448de6 100644 --- a/drivers/clk/tegra/clk-bpmp.c +++ b/drivers/clk/tegra/clk-bpmp.c @@ -286,6 +286,7 @@ static const struct clk_ops tegra_bpmp_clk_mux_ops = { .unprepare = tegra_bpmp_clk_unprepare, .is_prepared = tegra_bpmp_clk_is_prepared, .recalc_rate = tegra_bpmp_clk_recalc_rate, + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = tegra_bpmp_clk_set_parent, .get_parent = tegra_bpmp_clk_get_parent, }; From patchwork Fri May 5 11:25:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232519 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FAA3C77B7F for ; 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Fri, 5 May 2023 07:27:28 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:37 +0200 Subject: [PATCH v4 35/68] clk: tegra: super: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-35-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , linux-tegra@vger.kernel.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2140; i=maxime@cerno.tech; h=from:subject:message-id; bh=zOMkcOOtE4uat3PA5tfy+7gzs+yxnY0tvmb+4dzoRFE=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5cknlzXuItfLj3I7Q2vdtOlpc5e6RkKLP0tttGcqivn Je3sKGVhEONikBVTZIkRNl8Sd2rW6042vnkwc1iZQIYwcHEKwEROhjIyvN048e7mgiOecuWXH+/UeC k+4fuuCz7+y/Y1qGjUnNwwPYmRYXvm2fc+8ok20wT7es4IMfaecd/qKtEiFcizrWe/+7tSVgA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Tegra super mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. However, the upstream device trees seem to use assigned-clock-parents on that clock to force the parent at boot time, so it's likely that the author intent was to force the parent through the device tree and prevent any reparenting but through an explicit call to clk_set_parent(). This case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: Jonathan Hunter Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Thierry Reding Cc: linux-tegra@vger.kernel.org Signed-off-by: Maxime Ripard --- drivers/clk/tegra/clk-super.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/clk-super.c index a98a420398fa..3f3a7a203c5f 100644 --- a/drivers/clk/tegra/clk-super.c +++ b/drivers/clk/tegra/clk-super.c @@ -136,6 +136,7 @@ static void clk_super_mux_restore_context(struct clk_hw *hw) } static const struct clk_ops tegra_clk_super_mux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_super_get_parent, .set_parent = clk_super_set_parent, .restore_context = clk_super_mux_restore_context, From patchwork Fri May 5 11:25:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232524 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC5D7C7EE22 for ; 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Fri, 5 May 2023 07:27:31 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:38 +0200 Subject: [PATCH v4 36/68] clk: tegra: periph: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-36-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , linux-tegra@vger.kernel.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2126; i=maxime@cerno.tech; h=from:subject:message-id; bh=cxoJgtX4So4bmPh0M56fxVCzJPBLLEFUvLjHWdQ3NZA=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5cwXPHj0ZztlVOxf3ZpzgP/Wu6oNwceFRreVlrAZLZu qj5PRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDaEi1MAJnLWjJHh10Wp388+Pt7sInYwseXCm6 sPL9U0rp101PqXU2z2y4xreowMF6/eeq69qfnJzEPp/xIK1nixv3Q3PrUk6VvC3Ve7+PR5WAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Tegra periph nodiv clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. However, the upstream device trees seem to use assigned-clock-parents on that clock to force the parent at boot time, so it's likely that the author intent was to force the parent through the device tree and prevent any reparenting but through an explicit call to clk_set_parent(). This case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: Jonathan Hunter Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Thierry Reding Cc: linux-tegra@vger.kernel.org Signed-off-by: Maxime Ripard --- drivers/clk/tegra/clk-periph.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c index 79ca3aa072b7..ea443366e972 100644 --- a/drivers/clk/tegra/clk-periph.c +++ b/drivers/clk/tegra/clk-periph.c @@ -140,6 +140,7 @@ const struct clk_ops tegra_clk_periph_ops = { }; static const struct clk_ops tegra_clk_periph_nodiv_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_periph_get_parent, .set_parent = clk_periph_set_parent, .is_enabled = clk_periph_is_enabled, From patchwork Fri May 5 11:25:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232523 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DD4DC77B75 for ; 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Fri, 5 May 2023 07:27:34 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:39 +0200 Subject: [PATCH v4 37/68] clk: ux500: prcmu: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-37-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Ulf Hansson , linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2131; i=maxime@cerno.tech; h=from:subject:message-id; bh=5jUOzNr8PQIXZ87KetW9sv83ouSz4FWuJF/pholzMmE=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5eciJq1eqab77P9e3NOy89I3fRfTaGZab3xavUvunn8 C02PdpSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAiWrKMDBOMumrkgwUPFKU4KUvMOh U6vXDt07dLBD4yJYTeSje6OIORoe8F42Vb96e9UW4lj8/+suE0N17Lz542/7b6gZw7xo5buQE= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The UX500 PRCMU "clkout" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The PRCMU binding also allows to specify the default clock parent through a device tree cell. This will be enforced at prepare time by the driver. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. The result is that the driver relies on prepare to set the default parent, and thus the set_parent hook is effectively unused by design. We can make that decision explicit by setting the determine_rate implementation to clk_hw_determine_rate_no_reparent() that will keep the same behaviour. Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: Ulf Hansson Cc: linux-arm-kernel@lists.infradead.org Acked-by: Linus Walleij Signed-off-by: Maxime Ripard --- drivers/clk/ux500/clk-prcmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c index 4deb37f19a7c..5cbf24c94606 100644 --- a/drivers/clk/ux500/clk-prcmu.c +++ b/drivers/clk/ux500/clk-prcmu.c @@ -344,6 +344,7 @@ static const struct clk_ops clk_prcmu_clkout_ops = { .prepare = clk_prcmu_clkout_prepare, .unprepare = clk_prcmu_clkout_unprepare, .recalc_rate = clk_prcmu_clkout_recalc_rate, + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_prcmu_clkout_get_parent, .set_parent = clk_prcmu_clkout_set_parent, }; From patchwork Fri May 5 11:25:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232525 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1350C77B7F for ; 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Fri, 5 May 2023 07:27:37 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:40 +0200 Subject: [PATCH v4 38/68] clk: ux500: sysctrl: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-38-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Ulf Hansson , linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2305; i=maxime@cerno.tech; h=from:subject:message-id; bh=PZ0luiC05wRTIkvYXLkev/HtMLESoOlpFBb4AQ2bSHc=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5c8s2Sakqrz0DbW6FGiz8dfW+szPfUFJ3HVvP/9Svbg vKd/OkpZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjARgRxGhkX6EyunzvsenF71fPOSP7 1ykp3Jq677cYrvPHDAe+q9V7MZGXadMV+3aorTBu1TZ+O0NopoJ14Oec/F43q/iuedzi+BMB4A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Ulf Hansson Cc: linux-arm-kernel@lists.infradead.org Acked-by: Linus Walleij Reviewed-by: Ulf Hansson Signed-off-by: Maxime Ripard --- drivers/clk/ux500/clk-sysctrl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c index 702f2f8b43fa..ba3258c88d28 100644 --- a/drivers/clk/ux500/clk-sysctrl.c +++ b/drivers/clk/ux500/clk-sysctrl.c @@ -110,6 +110,7 @@ static const struct clk_ops clk_sysctrl_gate_fixed_rate_ops = { }; static const struct clk_ops clk_sysctrl_set_parent_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = clk_sysctrl_set_parent, .get_parent = clk_sysctrl_get_parent, }; From patchwork Fri May 5 11:25:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232522 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4B2BC7EE2C for ; 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Fri, 5 May 2023 07:27:40 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:41 +0200 Subject: [PATCH v4 39/68] clk: versatile: sp810: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-39-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Linus Walleij , Pawel Moll , linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1712; i=maxime@cerno.tech; h=from:subject:message-id; bh=f9fKx6fagdMn/NSMW7Lh8JOOu9FmeFzPoLjoO7VByG8=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5e0rN72n/Nt3c/nCW4LC2auu5fTPiNmZ1v+pQ4rubLt MjdjO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCRZG6Gf2ZvTRh0jGoUY95H7ApdLT jBPXtvxxdz359O21nuHflx3oWR4XLpxn0FnHfve+i2nO7eIanz30dHbvcRRpa5FuuWTlinww4A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Versatile sp810 "timerclken" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. This mismatch is probably due to the fact that the driver introduction predates the determine_rate introduction, and it was never revised since then. The default, implicit, behaviour that has been in use so far has thus been to simply keep using the current parent in all cases. This is also the behaviour of the new clk_hw_determine_rate_no_reparent() helper, so we can simply use it to make our expectation explicit. Cc: Linus Walleij Cc: Pawel Moll Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Maxime Ripard Acked-by: Linus Walleij Acked-by: Pawel Moll --- drivers/clk/versatile/clk-sp810.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/versatile/clk-sp810.c b/drivers/clk/versatile/clk-sp810.c index caf0cd2fb5b6..45adac1b4630 100644 --- a/drivers/clk/versatile/clk-sp810.c +++ b/drivers/clk/versatile/clk-sp810.c @@ -63,6 +63,7 @@ static int clk_sp810_timerclken_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops clk_sp810_timerclken_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_sp810_timerclken_get_parent, .set_parent = clk_sp810_timerclken_set_parent, }; From patchwork Fri May 5 11:25:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232530 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A0C1C77B7F for ; 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Fri, 5 May 2023 07:27:43 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:42 +0200 Subject: [PATCH v4 40/68] drm/tegra: sor: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-40-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Daniel Vetter , David Airlie , Jonathan Hunter , Mikko Perttunen , Thierry Reding , dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2366; i=maxime@cerno.tech; h=from:subject:message-id; bh=X5aJqS+zwl3Jn3nYEvmWCSG5nEfQm1oPlEUuBT6buzE=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5dknW7kvxG1Kfvs0elPNJdtzmTKqqtNiT/14bxj7RP+ +Yt3d5SyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAilf2MDDdZAtSb7nhbudx/reVlIL 5jpx3D61dlZgZnj6UVmt599pXhv6+25ffoY4ncc2KvW/ivc2/jfaniqPUj+OG8WerFOzPmcgMA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Tegra sor pad clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Daniel Vetter Cc: David Airlie Cc: Jonathan Hunter Cc: Mikko Perttunen Cc: Thierry Reding Cc: dri-devel@lists.freedesktop.org Cc: linux-tegra@vger.kernel.org Signed-off-by: Maxime Ripard --- drivers/gpu/drm/tegra/sor.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c index fbb63d755496..abd6e3b92293 100644 --- a/drivers/gpu/drm/tegra/sor.c +++ b/drivers/gpu/drm/tegra/sor.c @@ -586,6 +586,7 @@ static u8 tegra_clk_sor_pad_get_parent(struct clk_hw *hw) } static const struct clk_ops tegra_clk_sor_pad_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = tegra_clk_sor_pad_set_parent, .get_parent = tegra_clk_sor_pad_get_parent, }; From patchwork Fri May 5 11:25:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BF14C7EE22 for ; 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Fri, 5 May 2023 07:27:47 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:43 +0200 Subject: [PATCH v4 41/68] phy: cadence: sierra: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-41-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2216; i=maxime@cerno.tech; h=from:subject:message-id; bh=1L+EyOSq1c6qf7fYoSWfWytVr/66VQf6PFcGzNIY8wQ=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5d0G17pE7AIiAn53C6rrat/zK/k0rtVBuwnPracf3I3 Je1uRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACYSKsDwV6hmQVGGdSKP/vq40002l9 f5Pf67gftLjGW2WWbFbw/tPYwMb3ZmOIYldJ3sZdeKWGK260It80Kzla95FSr9ZgRXrf3AAgA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Cadence Sierra PLL clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Since the CLK_SET_RATE_NO_REPARENT flag was already set though, it seems unlikely. Cc: Kishon Vijay Abraham I Cc: Vinod Koul Cc: linux-phy@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/phy/cadence/phy-cadence-sierra.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 13fcd3a65fe9..7df9c79a772a 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -720,6 +720,7 @@ static int cdns_sierra_pll_mux_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops cdns_sierra_pll_mux_ops = { + .determine_rate = __clk_mux_determine_rate, .set_parent = cdns_sierra_pll_mux_set_parent, .get_parent = cdns_sierra_pll_mux_get_parent, }; From patchwork Fri May 5 11:25:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A341AC77B75 for ; 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Fri, 5 May 2023 07:27:50 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:44 +0200 Subject: [PATCH v4 42/68] phy: cadence: torrent: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-42-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2322; i=maxime@cerno.tech; h=from:subject:message-id; bh=Bsnnmu3ko3iq66fTYmm7x2q0vUeCBXrRslNG9Kl5kIw=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5cI2LmsPO4x72iqk/vVloVLd181NWN/pxdrxnw1eX0a O/+UjlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAEwk/S7D/0Sp+6opPqnHbGaE3G3muH HWvuTEUS3LHW6cn3Vqag+/4GX4KyOzflH6t86v22eULb2dprPKWedOFFOoUqp1e/6GR+3xrAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Cadence Torrent refclk clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Since the CLK_SET_RATE_NO_REPARENT flag was already set though, it seems unlikely. Cc: Kishon Vijay Abraham I Cc: Vinod Koul Cc: linux-phy@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/phy/cadence/phy-cadence-torrent.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c index 3831f596d50c..62e59d1bb9c3 100644 --- a/drivers/phy/cadence/phy-cadence-torrent.c +++ b/drivers/phy/cadence/phy-cadence-torrent.c @@ -1861,6 +1861,7 @@ static const struct clk_ops cdns_torrent_refclk_driver_ops = { .enable = cdns_torrent_refclk_driver_enable, .disable = cdns_torrent_refclk_driver_disable, .is_enabled = cdns_torrent_refclk_driver_is_enabled, + .determine_rate = __clk_mux_determine_rate, .set_parent = cdns_torrent_refclk_driver_set_parent, .get_parent = cdns_torrent_refclk_driver_get_parent, }; From patchwork Fri May 5 11:25:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED1A8C7EE26 for ; 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Fri, 5 May 2023 07:27:52 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:45 +0200 Subject: [PATCH v4 43/68] phy: ti: am654-serdes: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-43-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2182; i=maxime@cerno.tech; h=from:subject:message-id; bh=lCm1MALWPWxNIyULtxAkhK6SzyYNNOjJbDNYvLb9WgA=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5fk3g/canR0hWBX31Em5lWG9kVvdkg8mxilJibLyLD1 9UHTjlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAExE8yHDX5G+DVuvbH7zKfbl/y/b2I 1Sfa4f5fW2Yvp7Q3/v9sX7Ni5mZFjSGLW9+5ne5dV6f6ZseHRk+cxv9bLno8483PFozYX7jF0sAA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The TI AM654 SerDes clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Since the CLK_SET_RATE_NO_REPARENT flag was already set though, it seems unlikely. Cc: Kishon Vijay Abraham I Cc: Vinod Koul Cc: linux-phy@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/phy/ti/phy-am654-serdes.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/phy/ti/phy-am654-serdes.c b/drivers/phy/ti/phy-am654-serdes.c index 4ed2d951d3df..3f1d43e8b7ad 100644 --- a/drivers/phy/ti/phy-am654-serdes.c +++ b/drivers/phy/ti/phy-am654-serdes.c @@ -634,6 +634,7 @@ static int serdes_am654_clk_mux_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops serdes_am654_clk_mux_ops = { + .determine_rate = __clk_mux_determine_rate, .set_parent = serdes_am654_clk_mux_set_parent, .get_parent = serdes_am654_clk_mux_get_parent, }; From patchwork Fri May 5 11:25:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96E69C7EE23 for ; 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Fri, 5 May 2023 07:27:55 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:46 +0200 Subject: [PATCH v4 44/68] phy: ti: j721e-wiz: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-44-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2128; i=maxime@cerno.tech; h=from:subject:message-id; bh=8U3PuWGWX41u9oP5HxOpi/U4ljKCUsW/FeSVrq4njg0=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5ckrpdVyBDvt374mb1ZMkX/ksNLv4dvPGV/7GIKnR/q tPxoRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACZi9ojhF9POzH+bTS28F85g0d52de fvVZsOt+5U3L6R0SgvY9qi9OUM/wMSuSLuHH1evu2Yuzaf0e5FacbXJfgEVvXYuuw8fEnWlgMA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The TI J721e Wiz clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Since the CLK_SET_RATE_NO_REPARENT flag was already set though, it seems unlikely. Cc: Kishon Vijay Abraham I Cc: Vinod Koul Cc: linux-phy@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/phy/ti/phy-j721e-wiz.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index d91923799df2..fc3cd98c60ff 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -801,6 +801,7 @@ static int wiz_clk_mux_set_parent(struct clk_hw *hw, u8 index) } static const struct clk_ops wiz_clk_mux_ops = { + .determine_rate = __clk_mux_determine_rate, .set_parent = wiz_clk_mux_set_parent, .get_parent = wiz_clk_mux_get_parent, }; From patchwork Fri May 5 11:25:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0631CC7EE2C for ; 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Fri, 5 May 2023 07:27:58 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:47 +0200 Subject: [PATCH v4 45/68] rtc: sun6i: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-45-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Alessandro Zummo , Alexandre Belloni , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, linux-sunxi@lists.linux.dev X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2434; i=maxime@cerno.tech; h=from:subject:message-id; bh=3Q4a/GiK9m4nbc17ziwEKJILlFgG0TnxAPcyIHI/6dg=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5d0iC+vOvuh+erPO47+UwKe3ag7Ne8JU2d16s92qaZV Fyd2dZSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAihmcZGS6u8GTslXq+ppOt98rWyZ rF7BL521e7spZwuO4U2HO6N5DhF/ObEiW/j/GiF9QK5k5bEOchfrrjZcKpmf139+jI7dW/wgwA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Allwinner sun6i RTC clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Alessandro Zummo Cc: Alexandre Belloni Cc: Chen-Yu Tsai Cc: Jernej Skrabec Cc: Samuel Holland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rtc@vger.kernel.org Cc: linux-sunxi@lists.linux.dev Signed-off-by: Maxime Ripard Acked-by: Jernej Skrabec --- drivers/rtc/rtc-sun6i.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c index dc76537f1b62..71548dd59a3a 100644 --- a/drivers/rtc/rtc-sun6i.c +++ b/drivers/rtc/rtc-sun6i.c @@ -214,6 +214,7 @@ static int sun6i_rtc_osc_set_parent(struct clk_hw *hw, u8 index) static const struct clk_ops sun6i_rtc_osc_ops = { .recalc_rate = sun6i_rtc_osc_recalc_rate, + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = sun6i_rtc_osc_get_parent, .set_parent = sun6i_rtc_osc_set_parent, From patchwork Fri May 5 11:25:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232532 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D2EAC77B75 for ; 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Fri, 5 May 2023 07:28:02 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:48 +0200 Subject: [PATCH v4 46/68] ASoC: tlv320aic32x4: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-46-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Jaroslav Kysela , Liam Girdwood , Mark Brown , Takashi Iwai , alsa-devel@alsa-project.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2340; i=maxime@cerno.tech; h=from:subject:message-id; bh=5GoNJ7VXnRe6Eemsco6VvAqm0b35vr7XzE99xXo+B4A=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5f8eCHs0iyzikf9fkG38Rp9NrsFLmJfXgk/mLuEd8KZ +j23O0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjARwf+MDCunOjyqWlf5WeHzG/uwCQ 3OK2dJyTd5tSmG3fsQynlPkY/hv1vYKiMLw6qtLKrcf74q+riKZ/47d/3plZfvf/uZuB48wA8A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The tlv320aic32x4 clkin clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: Jaroslav Kysela Cc: Liam Girdwood Cc: Mark Brown Cc: Takashi Iwai Cc: alsa-devel@alsa-project.org Signed-off-by: Maxime Ripard --- sound/soc/codecs/tlv320aic32x4-clk.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/tlv320aic32x4-clk.c b/sound/soc/codecs/tlv320aic32x4-clk.c index 2f78e6820c75..80cbc6bc6847 100644 --- a/sound/soc/codecs/tlv320aic32x4-clk.c +++ b/sound/soc/codecs/tlv320aic32x4-clk.c @@ -292,6 +292,7 @@ static u8 clk_aic32x4_codec_clkin_get_parent(struct clk_hw *hw) } static const struct clk_ops aic32x4_codec_clkin_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .set_parent = clk_aic32x4_codec_clkin_set_parent, .get_parent = clk_aic32x4_codec_clkin_get_parent, }; From patchwork Fri May 5 11:25:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232533 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4393C7EE26 for ; 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Fri, 5 May 2023 07:28:05 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:49 +0200 Subject: [PATCH v4 47/68] clk: actions: composite: div: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-47-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , =?utf-8?q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam , linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2950; i=maxime@cerno.tech; h=from:subject:message-id; bh=UZMNzkOWFIjD+gDO2VaoM7lgoJwIkakPOuo1/dGFvM0=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5es+PMwXjlnkXZ9M8PES2UHJ1/+VRUrVnTwtlDOheUC PsoWHaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZjIhB+MDAemSDZ0v3hb1v1PxrBs05 sDHeG5qTfdlSN/m5/4vPuSbQrDf6cZ7FWGLDWiB3RmGSQ9E7h/dfbfHaxuR9qkJcuqs2czMwMA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Actions composite divider clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: "Andreas Färber" Cc: Manivannan Sadhasivam Cc: linux-actions@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/clk/actions/owl-composite.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/clk/actions/owl-composite.c b/drivers/clk/actions/owl-composite.c index e7784f9e5bf6..2f1e282134b2 100644 --- a/drivers/clk/actions/owl-composite.c +++ b/drivers/clk/actions/owl-composite.c @@ -53,13 +53,19 @@ static int owl_comp_is_enabled(struct clk_hw *hw) return owl_gate_clk_is_enabled(common, &comp->gate_hw); } -static long owl_comp_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int owl_comp_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct owl_composite *comp = hw_to_owl_comp(hw); + long rate; - return owl_divider_helper_round_rate(&comp->common, &comp->rate.div_hw, - rate, parent_rate); + rate = owl_divider_helper_round_rate(&comp->common, &comp->rate.div_hw, + req->rate, &req->best_parent_rate); + if (rate < 0) + return rate; + + req->rate = rate; + return 0; } static unsigned long owl_comp_div_recalc_rate(struct clk_hw *hw, @@ -152,7 +158,7 @@ const struct clk_ops owl_comp_div_ops = { .is_enabled = owl_comp_is_enabled, /* div_ops */ - .round_rate = owl_comp_div_round_rate, + .determine_rate = owl_comp_div_determine_rate, .recalc_rate = owl_comp_div_recalc_rate, .set_rate = owl_comp_div_set_rate, }; From patchwork Fri May 5 11:25:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232534 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 272DAC7EE2D for ; Fri, 5 May 2023 11:28:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231941AbjEEL20 (ORCPT ); Fri, 5 May 2023 07:28:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231998AbjEEL2Q (ORCPT ); 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Fri, 5 May 2023 07:28:08 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:50 +0200 Subject: [PATCH v4 48/68] clk: actions: composite: fact: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-48-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , =?utf-8?q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam , linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2964; i=maxime@cerno.tech; h=from:subject:message-id; bh=uyBaAmdNnpNkmO3cXNcw5v1QgunRrFr2A3EejTTdAcw=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5dk5XiULZ1mt7v/ydqcltQ5arNe2MwO/b0pW76nWb+0 gv9DRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACai8oSR4eC6gJLpr+pi5yVslVlx8P yLFXyvb3j1ZbGf2VhgrN220Yjhr0Cl9lkWabGDHiduBn3Qfa6mcMLHJm2lTr74pwWcqk1NDAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Actions composite factor clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: "Andreas Färber" Cc: Manivannan Sadhasivam Cc: linux-actions@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/clk/actions/owl-composite.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/clk/actions/owl-composite.c b/drivers/clk/actions/owl-composite.c index 2f1e282134b2..48f177f6ce9c 100644 --- a/drivers/clk/actions/owl-composite.c +++ b/drivers/clk/actions/owl-composite.c @@ -86,14 +86,20 @@ static int owl_comp_div_set_rate(struct clk_hw *hw, unsigned long rate, rate, parent_rate); } -static long owl_comp_fact_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int owl_comp_fact_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct owl_composite *comp = hw_to_owl_comp(hw); + long rate; - return owl_factor_helper_round_rate(&comp->common, - &comp->rate.factor_hw, - rate, parent_rate); + rate = owl_factor_helper_round_rate(&comp->common, + &comp->rate.factor_hw, + req->rate, &req->best_parent_rate); + if (rate < 0) + return rate; + + req->rate = rate; + return 0; } static unsigned long owl_comp_fact_recalc_rate(struct clk_hw *hw, @@ -175,7 +181,7 @@ const struct clk_ops owl_comp_fact_ops = { .is_enabled = owl_comp_is_enabled, /* fact_ops */ - .round_rate = owl_comp_fact_round_rate, + .determine_rate = owl_comp_fact_determine_rate, .recalc_rate = owl_comp_fact_recalc_rate, .set_rate = owl_comp_fact_set_rate, }; From patchwork Fri May 5 11:25:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232535 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACA2BC7EE22 for ; Fri, 5 May 2023 11:28:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231945AbjEEL21 (ORCPT ); Fri, 5 May 2023 07:28:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231918AbjEEL2R (ORCPT ); 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Fri, 5 May 2023 07:28:11 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:51 +0200 Subject: [PATCH v4 49/68] clk: at91: smd: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-49-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Alexandre Belloni , Claudiu Beznea , Nicolas Ferre , linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3550; i=maxime@cerno.tech; h=from:subject:message-id; bh=grvfNEMJDxKC39E6gpEk+/fzaJf3lwNJrJ82SYiqrIg=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5e4Z+dNUNeaxeK//vuWGuH/VqlC9WZb2bZYiR1IU999 1Seio5SFQYyLQVZMkSVG2HxJ3KlZrzvZ+ObBzGFlAhnCwMUpABPZKcHwT5HjVA5nqrosw8el75cdaJ wolLfFpnev6iYeJTYvXp7OdkaGS7stK1+timTd92Nf9wYtz9dqISp22W8MVVRv6mza3irPAAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Atmel SAM9x5 SMD clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Alexandre Belloni Cc: Claudiu Beznea Cc: Nicolas Ferre Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Maxime Ripard --- drivers/clk/at91/clk-smd.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/clk/at91/clk-smd.c b/drivers/clk/at91/clk-smd.c index 160378438f1b..09c649c8598e 100644 --- a/drivers/clk/at91/clk-smd.c +++ b/drivers/clk/at91/clk-smd.c @@ -36,26 +36,31 @@ static unsigned long at91sam9x5_clk_smd_recalc_rate(struct clk_hw *hw, return parent_rate / (smddiv + 1); } -static long at91sam9x5_clk_smd_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int at91sam9x5_clk_smd_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned long div; unsigned long bestrate; unsigned long tmp; - if (rate >= *parent_rate) - return *parent_rate; + if (req->rate >= req->best_parent_rate) { + req->rate = req->best_parent_rate; + return 0; + } - div = *parent_rate / rate; - if (div > SMD_MAX_DIV) - return *parent_rate / (SMD_MAX_DIV + 1); + div = req->best_parent_rate / req->rate; + if (div > SMD_MAX_DIV) { + req->rate = req->best_parent_rate / (SMD_MAX_DIV + 1); + return 0; + } - bestrate = *parent_rate / div; - tmp = *parent_rate / (div + 1); - if (bestrate - rate > rate - tmp) + bestrate = req->best_parent_rate / div; + tmp = req->best_parent_rate / (div + 1); + if (bestrate - req->rate > req->rate - tmp) bestrate = tmp; - return bestrate; + req->rate = bestrate; + return 0; } static int at91sam9x5_clk_smd_set_parent(struct clk_hw *hw, u8 index) @@ -98,7 +103,7 @@ static int at91sam9x5_clk_smd_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops at91sam9x5_smd_ops = { .recalc_rate = at91sam9x5_clk_smd_recalc_rate, - .round_rate = at91sam9x5_clk_smd_round_rate, + .determine_rate = at91sam9x5_clk_smd_determine_rate, .get_parent = at91sam9x5_clk_smd_get_parent, .set_parent = at91sam9x5_clk_smd_set_parent, .set_rate = at91sam9x5_clk_smd_set_rate, From patchwork Fri May 5 11:25:52 2023 Content-Type: text/plain; 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Fri, 5 May 2023 07:28:14 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:52 +0200 Subject: [PATCH v4 50/68] clk: axi-clkgen: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-50-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3069; i=maxime@cerno.tech; h=from:subject:message-id; bh=+trBbQOXrS0+UKHh9hoh760H9Vj/FoeLh3zyKaozfcU=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5ceLAo9eMjIZMUdx4jnP85lfNv1/c68pQ89H/+zexq2 7F6xZUcpC4MYF4OsmCJLjLD5krhTs153svHNg5nDygQyhIGLUwAm8mAyw/8K7ctfZrLOqT2979rPjW /NYkMeWXnOj8hyefvXhSta0XwWw1/BtlxhiXD5b0EicdvLHv233cP52nPymoSbR1Q7nPTM+ZkB X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The AXI clkgen clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Signed-off-by: Maxime Ripard --- drivers/clk/clk-axi-clkgen.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/clk/clk-axi-clkgen.c b/drivers/clk/clk-axi-clkgen.c index a04a3d38c76e..bf4d8ddc93ae 100644 --- a/drivers/clk/clk-axi-clkgen.c +++ b/drivers/clk/clk-axi-clkgen.c @@ -384,23 +384,25 @@ static int axi_clkgen_set_rate(struct clk_hw *clk_hw, return 0; } -static long axi_clkgen_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int axi_clkgen_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(hw); const struct axi_clkgen_limits *limits = &axi_clkgen->limits; unsigned int d, m, dout; unsigned long long tmp; - axi_clkgen_calc_params(limits, *parent_rate, rate, &d, &m, &dout); + axi_clkgen_calc_params(limits, req->best_parent_rate, req->rate, + &d, &m, &dout); if (d == 0 || dout == 0 || m == 0) return -EINVAL; - tmp = (unsigned long long)*parent_rate * m; + tmp = (unsigned long long)req->best_parent_rate * m; tmp = DIV_ROUND_CLOSEST_ULL(tmp, dout * d); - return min_t(unsigned long long, tmp, LONG_MAX); + req->rate = min_t(unsigned long long, tmp, LONG_MAX); + return 0; } static unsigned int axi_clkgen_get_div(struct axi_clkgen *axi_clkgen, @@ -495,7 +497,7 @@ static u8 axi_clkgen_get_parent(struct clk_hw *clk_hw) static const struct clk_ops axi_clkgen_ops = { .recalc_rate = axi_clkgen_recalc_rate, - .round_rate = axi_clkgen_round_rate, + .determine_rate = axi_clkgen_determine_rate, .set_rate = axi_clkgen_set_rate, .enable = axi_clkgen_enable, .disable = axi_clkgen_disable, From patchwork Fri May 5 11:25:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232538 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C08FDC7EE2E for ; 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Fri, 5 May 2023 07:28:17 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:53 +0200 Subject: [PATCH v4 51/68] clk: cdce706: divider: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-51-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Max Filippov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3599; i=maxime@cerno.tech; h=from:subject:message-id; bh=nAbW1sEMOOMuQjPHOFRKtN94gFBW+nEdxy6krENBKJ8=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5daKopV6smzbFfYH7Y3Jmqda7TP0SYOxthr2zWX823l YentKGVhEONikBVTZIkRNl8Sd2rW6042vnkwc1iZQIYwcHEKwER6FzL84V/iZ9nMMFteVlDSsFG7+8 PfRTP1DIVmiS2R7lR2UTjCyPC/OnXzkddsEx+cEQ59tZSnqGE+h+G/kkydf+97XnX1Tz3IBwA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The cdce706 divider clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Max Filippov Signed-off-by: Maxime Ripard --- drivers/clk/clk-cdce706.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk-cdce706.c b/drivers/clk/clk-cdce706.c index 139aa0954cc1..1c112bb51be6 100644 --- a/drivers/clk/clk-cdce706.c +++ b/drivers/clk/clk-cdce706.c @@ -288,18 +288,19 @@ static unsigned long cdce706_divider_recalc_rate(struct clk_hw *hw, return 0; } -static long cdce706_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int cdce706_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct cdce706_hw_data *hwd = to_hw_data(hw); struct cdce706_dev_data *cdce = hwd->dev_data; + unsigned long rate = req->rate; unsigned long mul, div; dev_dbg(&hwd->dev_data->client->dev, "%s, rate: %lu, parent_rate: %lu\n", - __func__, rate, *parent_rate); + __func__, rate, req->best_parent_rate); - rational_best_approximation(rate, *parent_rate, + rational_best_approximation(rate, req->best_parent_rate, 1, CDCE706_DIVIDER_DIVIDER_MAX, &mul, &div); if (!mul) @@ -344,8 +345,8 @@ static long cdce706_divider_round_rate(struct clk_hw *hw, unsigned long rate, dev_dbg(&hwd->dev_data->client->dev, "%s, altering parent rate: %lu -> %lu\n", - __func__, *parent_rate, rate * div); - *parent_rate = rate * div; + __func__, req->best_parent_rate, rate * div); + req->best_parent_rate = rate * div; } hwd->div = div; @@ -353,7 +354,8 @@ static long cdce706_divider_round_rate(struct clk_hw *hw, unsigned long rate, "%s, divider: %d, div: %lu\n", __func__, hwd->idx, div); - return *parent_rate / div; + req->rate = req->best_parent_rate / div; + return 0; } static int cdce706_divider_set_rate(struct clk_hw *hw, unsigned long rate, @@ -375,7 +377,7 @@ static const struct clk_ops cdce706_divider_ops = { .set_parent = cdce706_divider_set_parent, .get_parent = cdce706_divider_get_parent, .recalc_rate = cdce706_divider_recalc_rate, - .round_rate = cdce706_divider_round_rate, + .determine_rate = cdce706_divider_determine_rate, .set_rate = cdce706_divider_set_rate, }; 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Fri, 5 May 2023 07:28:20 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:54 +0200 Subject: [PATCH v4 52/68] clk: cdce706: clkout: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-52-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Max Filippov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2530; i=maxime@cerno.tech; h=from:subject:message-id; bh=IXO8rIZXxXgRu3n8EJj/FnmcFLFod6ZGzyF0UdmrNlY=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5duKOuc+k7zr2n+5q0nfW8qWBlnKvRN+eE8Y/niH6d2 ycyr7ihlYRDjYpAVU2SJETZfEndq1utONr55MHNYmUCGMHBxCsBEDmQyMmzyn7rztVVe0e0I11v7GE 3W/lu4ckXj+4kH7/JvEZBiT5NnZPh+uqGTR+GPsEvxdfXoab/3MwYXfuoLuez2YHHE4f2s9iwA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The cdce706 clkout clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Max Filippov Signed-off-by: Maxime Ripard --- drivers/clk/clk-cdce706.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-cdce706.c b/drivers/clk/clk-cdce706.c index 1c112bb51be6..34f57d36b7ff 100644 --- a/drivers/clk/clk-cdce706.c +++ b/drivers/clk/clk-cdce706.c @@ -423,11 +423,12 @@ static unsigned long cdce706_clkout_recalc_rate(struct clk_hw *hw, return parent_rate; } -static long cdce706_clkout_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int cdce706_clkout_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - *parent_rate = rate; - return rate; + req->best_parent_rate = req->rate; + + return 0; } static int cdce706_clkout_set_rate(struct clk_hw *hw, unsigned long rate, @@ -442,7 +443,7 @@ static const struct clk_ops cdce706_clkout_ops = { .set_parent = cdce706_clkout_set_parent, .get_parent = cdce706_clkout_get_parent, .recalc_rate = cdce706_clkout_recalc_rate, - .round_rate = cdce706_clkout_round_rate, + .determine_rate = cdce706_clkout_determine_rate, .set_rate = cdce706_clkout_set_rate, }; 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Fri, 5 May 2023 07:28:23 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:55 +0200 Subject: [PATCH v4 53/68] clk: si5341: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-53-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3368; i=maxime@cerno.tech; h=from:subject:message-id; bh=lJLqnW/FXABBvVFOF96gMjanHTYTQIuvl+7bHKom53U=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5cmqFt3PTZxNRd88ChYUiaSZ4FcoUmKZzlj5+uJls35 5250lLIwiHExyIopssQImy+JOzXrdScb3zyYOaxMIEMYuDgFYCIvqxn+u0pq/FiYHWtoxs2/I5ynQt jsSEb0L/ky2Yf1It/eJRYtZPhnu231Ra1k5rePFrzTE3efafVxfyT/DMXlcyQkexavEvdgAAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The SI5341 output clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Signed-off-by: Maxime Ripard --- drivers/clk/clk-si5341.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk-si5341.c b/drivers/clk/clk-si5341.c index 4b65def64109..68160510f448 100644 --- a/drivers/clk/clk-si5341.c +++ b/drivers/clk/clk-si5341.c @@ -828,19 +828,20 @@ static unsigned long si5341_output_clk_recalc_rate(struct clk_hw *hw, return parent_rate / r_divider; } -static long si5341_output_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int si5341_output_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { + unsigned long rate = req->rate; unsigned long r; if (!rate) return 0; - r = *parent_rate >> 1; + r = req->best_parent_rate >> 1; /* If rate is an even divisor, no changes to parent required */ if (r && !(r % rate)) - return (long)rate; + return 0; if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { if (rate > 200000000) { @@ -850,14 +851,15 @@ static long si5341_output_clk_round_rate(struct clk_hw *hw, unsigned long rate, /* Take a parent frequency near 400 MHz */ r = (400000000u / rate) & ~1; } - *parent_rate = r * rate; + req->best_parent_rate = r * rate; } else { /* We cannot change our parent's rate, report what we can do */ r /= rate; - rate = *parent_rate / (r << 1); + rate = req->best_parent_rate / (r << 1); } - return rate; + req->rate = rate; + return 0; } static int si5341_output_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -930,7 +932,7 @@ static const struct clk_ops si5341_output_clk_ops = { .prepare = si5341_output_clk_prepare, .unprepare = si5341_output_clk_unprepare, .recalc_rate = si5341_output_clk_recalc_rate, - .round_rate = si5341_output_clk_round_rate, + .determine_rate = si5341_output_clk_determine_rate, .set_rate = si5341_output_clk_set_rate, .set_parent = si5341_output_set_parent, .get_parent = si5341_output_get_parent, From patchwork Fri May 5 11:25:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232540 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB026C77B7F for ; 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Fri, 5 May 2023 07:28:25 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:56 +0200 Subject: [PATCH v4 54/68] clk: si5351: pll: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-54-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4009; i=maxime@cerno.tech; h=from:subject:message-id; bh=A3FQFb4jsBRIbivs/ouERH18mX3jqKqYPSP6gISoxV4=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5fa/pwqci3ys/7tm4Z/ddkmXyz9aBYXuuPoFZbnllUf Ps7d1FHKwiDGxSArpsgSI2y+JO7UrNedbHzzYOawMoEMYeDiFICJfO1k+B+5U+fR04cd5/+KndWbJ+ oRV7OcP8ghd+Y0we1cUVszD2cwMrxlcBWSkde4I3Dl1BuLY/HtUveCtgS3zejav+7sm7aqEmYA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The SI5351 PLL clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Signed-off-by: Maxime Ripard --- drivers/clk/clk-si5351.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c index 4fcf7056717e..5992832774ad 100644 --- a/drivers/clk/clk-si5351.c +++ b/drivers/clk/clk-si5351.c @@ -442,11 +442,12 @@ static unsigned long si5351_pll_recalc_rate(struct clk_hw *hw, return (unsigned long)rate; } -static long si5351_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int si5351_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct si5351_hw_data *hwdata = container_of(hw, struct si5351_hw_data, hw); + unsigned long rate = req->rate; unsigned long rfrac, denom, a, b, c; unsigned long long lltmp; @@ -456,18 +457,18 @@ static long si5351_pll_round_rate(struct clk_hw *hw, unsigned long rate, rate = SI5351_PLL_VCO_MAX; /* determine integer part of feedback equation */ - a = rate / *parent_rate; + a = rate / req->best_parent_rate; if (a < SI5351_PLL_A_MIN) - rate = *parent_rate * SI5351_PLL_A_MIN; + rate = req->best_parent_rate * SI5351_PLL_A_MIN; if (a > SI5351_PLL_A_MAX) - rate = *parent_rate * SI5351_PLL_A_MAX; + rate = req->best_parent_rate * SI5351_PLL_A_MAX; /* find best approximation for b/c = fVCO mod fIN */ denom = 1000 * 1000; - lltmp = rate % (*parent_rate); + lltmp = rate % (req->best_parent_rate); lltmp *= denom; - do_div(lltmp, *parent_rate); + do_div(lltmp, req->best_parent_rate); rfrac = (unsigned long)lltmp; b = 0; @@ -484,19 +485,20 @@ static long si5351_pll_round_rate(struct clk_hw *hw, unsigned long rate, hwdata->params.p1 -= 512; /* recalculate rate by fIN * (a + b/c) */ - lltmp = *parent_rate; + lltmp = req->best_parent_rate; lltmp *= b; do_div(lltmp, c); rate = (unsigned long)lltmp; - rate += *parent_rate * a; + rate += req->best_parent_rate * a; dev_dbg(&hwdata->drvdata->client->dev, "%s - %s: a = %lu, b = %lu, c = %lu, parent_rate = %lu, rate = %lu\n", __func__, clk_hw_get_name(hw), a, b, c, - *parent_rate, rate); + req->best_parent_rate, rate); - return rate; + req->rate = rate; + return 0; } static int si5351_pll_set_rate(struct clk_hw *hw, unsigned long rate, @@ -533,7 +535,7 @@ static const struct clk_ops si5351_pll_ops = { .set_parent = si5351_pll_set_parent, .get_parent = si5351_pll_get_parent, .recalc_rate = si5351_pll_recalc_rate, - .round_rate = si5351_pll_round_rate, + .determine_rate = si5351_pll_determine_rate, .set_rate = si5351_pll_set_rate, }; From patchwork Fri May 5 11:25:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232541 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD1C4C77B7F for ; Fri, 5 May 2023 11:28:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231946AbjEEL2d (ORCPT ); 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Fri, 5 May 2023 07:28:28 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:57 +0200 Subject: [PATCH v4 55/68] clk: si5351: msynth: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-55-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4438; i=maxime@cerno.tech; h=from:subject:message-id; bh=YW8Nu64hbBy40hNelkCWnjhRSVsF/WrsddzImT1gtZ0=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5cm7InpmPRaY/KrzUJstxWsZz+7tHKXwpLSPcIbeBS5 A6sCO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCRzY8YGW5KxC8MnDU9te9HjcMv/h frxIT4pPeK9d1hnZvxeE5B5yxGhpUTtjDM+t0oe8xikagg37eA/ZYaO5bKiIfdP9nYxegfwAkA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The SI5351 msynth clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Signed-off-by: Maxime Ripard --- drivers/clk/clk-si5351.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c index 5992832774ad..07bd67d681f9 100644 --- a/drivers/clk/clk-si5351.c +++ b/drivers/clk/clk-si5351.c @@ -642,11 +642,12 @@ static unsigned long si5351_msynth_recalc_rate(struct clk_hw *hw, return (unsigned long)rate; } -static long si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int si5351_msynth_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct si5351_hw_data *hwdata = container_of(hw, struct si5351_hw_data, hw); + unsigned long rate = req->rate; unsigned long long lltmp; unsigned long a, b, c; int divby4; @@ -681,10 +682,10 @@ static long si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate, b = 0; c = 1; - *parent_rate = a * rate; + req->best_parent_rate = a * rate; } else if (hwdata->num >= 6) { /* determine the closest integer divider */ - a = DIV_ROUND_CLOSEST(*parent_rate, rate); + a = DIV_ROUND_CLOSEST(req->best_parent_rate, rate); if (a < SI5351_MULTISYNTH_A_MIN) a = SI5351_MULTISYNTH_A_MIN; if (a > SI5351_MULTISYNTH67_A_MAX) @@ -702,7 +703,7 @@ static long si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate, } /* determine integer part of divider equation */ - a = *parent_rate / rate; + a = req->best_parent_rate / rate; if (a < SI5351_MULTISYNTH_A_MIN) a = SI5351_MULTISYNTH_A_MIN; if (a > SI5351_MULTISYNTH_A_MAX) @@ -710,7 +711,7 @@ static long si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate, /* find best approximation for b/c = fVCO mod fOUT */ denom = 1000 * 1000; - lltmp = (*parent_rate) % rate; + lltmp = req->best_parent_rate % rate; lltmp *= denom; do_div(lltmp, rate); rfrac = (unsigned long)lltmp; @@ -724,7 +725,7 @@ static long si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate, } /* recalculate rate by fOUT = fIN / (a + b/c) */ - lltmp = *parent_rate; + lltmp = req->best_parent_rate; lltmp *= c; do_div(lltmp, a * c + b); rate = (unsigned long)lltmp; @@ -749,9 +750,11 @@ static long si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate, dev_dbg(&hwdata->drvdata->client->dev, "%s - %s: a = %lu, b = %lu, c = %lu, divby4 = %d, parent_rate = %lu, rate = %lu\n", __func__, clk_hw_get_name(hw), a, b, c, divby4, - *parent_rate, rate); + req->best_parent_rate, rate); - return rate; + req->rate = rate; + + return 0; } static int si5351_msynth_set_rate(struct clk_hw *hw, unsigned long rate, @@ -791,7 +794,7 @@ static const struct clk_ops si5351_msynth_ops = { .set_parent = si5351_msynth_set_parent, .get_parent = si5351_msynth_get_parent, .recalc_rate = si5351_msynth_recalc_rate, - .round_rate = si5351_msynth_round_rate, + .determine_rate = si5351_msynth_determine_rate, .set_rate = si5351_msynth_set_rate, }; From patchwork Fri May 5 11:25:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232542 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 426F0C77B75 for ; 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Fri, 5 May 2023 07:28:31 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:58 +0200 Subject: [PATCH v4 56/68] clk: si5351: clkout: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-56-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3536; i=maxime@cerno.tech; h=from:subject:message-id; bh=s3A6WyD6JSWct6Sr6CPLFniigDyDhrtMqn8GoJ82HSA=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5fuDWZJy53Ce3ne0rALW1+Z2rQedXux8E+tbPDlGr3i 5P1CHaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZjIsv8M/yPKPTdmmhuIzj00TXSfgs e0bZGFGVsXpmzQ9eL4MFGjNIDhnzpfyI+jWxcrOX1taDL5IDepUC3exK7hfljfZac3arcbuAE= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The SI5351 clkout clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Signed-off-by: Maxime Ripard --- drivers/clk/clk-si5351.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c index 07bd67d681f9..76487f568a6e 100644 --- a/drivers/clk/clk-si5351.c +++ b/drivers/clk/clk-si5351.c @@ -1037,11 +1037,12 @@ static unsigned long si5351_clkout_recalc_rate(struct clk_hw *hw, return parent_rate >> rdiv; } -static long si5351_clkout_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int si5351_clkout_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct si5351_hw_data *hwdata = container_of(hw, struct si5351_hw_data, hw); + unsigned long rate = req->rate; unsigned char rdiv; /* clkout6/7 can only handle output freqencies < 150MHz */ @@ -1063,13 +1064,13 @@ static long si5351_clkout_round_rate(struct clk_hw *hw, unsigned long rate, rdiv += 1; rate *= 2; } - *parent_rate = rate; + req->best_parent_rate = rate; } else { unsigned long new_rate, new_err, err; /* round to closed rdiv */ rdiv = SI5351_OUTPUT_CLK_DIV_1; - new_rate = *parent_rate; + new_rate = req->best_parent_rate; err = abs(new_rate - rate); do { new_rate >>= 1; @@ -1080,14 +1081,15 @@ static long si5351_clkout_round_rate(struct clk_hw *hw, unsigned long rate, err = new_err; } while (1); } - rate = *parent_rate >> rdiv; + rate = req->best_parent_rate >> rdiv; dev_dbg(&hwdata->drvdata->client->dev, "%s - %s: rdiv = %u, parent_rate = %lu, rate = %lu\n", __func__, clk_hw_get_name(hw), (1 << rdiv), - *parent_rate, rate); + req->best_parent_rate, rate); - return rate; + req->rate = rate; + return 0; } static int si5351_clkout_set_rate(struct clk_hw *hw, unsigned long rate, @@ -1147,7 +1149,7 @@ static const struct clk_ops si5351_clkout_ops = { .set_parent = si5351_clkout_set_parent, .get_parent = si5351_clkout_get_parent, .recalc_rate = si5351_clkout_recalc_rate, - .round_rate = si5351_clkout_round_rate, + .determine_rate = si5351_clkout_determine_rate, .set_rate = si5351_clkout_set_rate, }; From patchwork Fri May 5 11:25:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232543 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1020BC77B7F for ; Fri, 5 May 2023 11:28:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231932AbjEEL2i (ORCPT ); Fri, 5 May 2023 07:28:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231965AbjEEL2h (ORCPT ); Fri, 5 May 2023 07:28:37 -0400 Received: from wout1-smtp.messagingengine.com (wout1-smtp.messagingengine.com [64.147.123.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E34C7A88 for ; Fri, 5 May 2023 04:28:36 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.west.internal (Postfix) with ESMTP id 434B9320097D; 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Fri, 5 May 2023 07:28:34 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:25:59 +0200 Subject: [PATCH v4 57/68] clk: da8xx: clk48: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-57-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , David Lechner , Sekhar Nori X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2685; i=maxime@cerno.tech; h=from:subject:message-id; bh=fR5eVkEkiiCwzMEJBs1+zVpH2JioeLjlPGObU2oWNSM=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5dWrb04scuuOf8z6z2hNtbvaheneJ1MucKr+OfUkyVX H6m97yhlYRDjYpAVU2SJETZfEndq1utONr55MHNYmUCGMHBxCsBENu5gZFjPn2fq9ZAnaua++/ME/y ZPn828sU2ien7YtuZ5RnuLJS8w/E+VZGN3M6iUVsp9ti7Tnktia0jjccF93IV/L3e/4TOcwwgA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The TI DA8xx USB0 clk48 clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: David Lechner Cc: Sekhar Nori Acked-by: David Lechner Signed-off-by: Maxime Ripard --- drivers/clk/davinci/da8xx-cfgchip.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/clk/davinci/da8xx-cfgchip.c b/drivers/clk/davinci/da8xx-cfgchip.c index 1bbcc8e43bc5..e5b2cdfe88ce 100644 --- a/drivers/clk/davinci/da8xx-cfgchip.c +++ b/drivers/clk/davinci/da8xx-cfgchip.c @@ -462,10 +462,12 @@ static unsigned long da8xx_usb0_clk48_recalc_rate(struct clk_hw *hw, return 48000000; } -static long da8xx_usb0_clk48_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int da8xx_usb0_clk48_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - return 48000000; + req->rate = 48000000; + + return 0; } static int da8xx_usb0_clk48_set_parent(struct clk_hw *hw, u8 index) @@ -494,7 +496,7 @@ static const struct clk_ops da8xx_usb0_clk48_ops = { .disable = da8xx_usb0_clk48_disable, .is_enabled = da8xx_usb0_clk48_is_enabled, .recalc_rate = da8xx_usb0_clk48_recalc_rate, - .round_rate = da8xx_usb0_clk48_round_rate, + .determine_rate = da8xx_usb0_clk48_determine_rate, .set_parent = da8xx_usb0_clk48_set_parent, .get_parent = da8xx_usb0_clk48_get_parent, }; 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Fri, 5 May 2023 07:28:37 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:00 +0200 Subject: [PATCH v4 58/68] clk: imx: scu: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-58-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Fabio Estevam , Peng Fan , Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team , Pengutronix Kernel Team X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3048; i=maxime@cerno.tech; h=from:subject:message-id; bh=hvDwbs5hvcxU7mAGefyGmd/4UuO2+LMXGrKQwF6RW1w=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5fKMFps/SV26inbkQtv3nIz/HjQ8tfcVuHFmSrHLrFc ji3zOkpZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCRDfwM/8P5Kw7tYT1SMW2Tdveyk9 JbPeptTq87x6u477texonG/JuMDCeM1AUcRB/u07WPiN3QcS5uyUvV6Tv0/ux4/2vLvL/+NcwA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The iMX SCU clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. The round_rate() implementation being shared with other clocks, it's not removed. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Abel Vesa Cc: Fabio Estevam Cc: Peng Fan Cc: Sascha Hauer Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team Cc: Pengutronix Kernel Team Signed-off-by: Maxime Ripard --- drivers/clk/imx/clk-scu.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c index 417f893f8895..725b7b3edb63 100644 --- a/drivers/clk/imx/clk-scu.c +++ b/drivers/clk/imx/clk-scu.c @@ -250,6 +250,23 @@ static unsigned long clk_scu_recalc_rate(struct clk_hw *hw, return le32_to_cpu(msg.data.resp.rate); } +/* + * clk_scu_determine_rate - Returns the closest rate for a SCU clock + * @hw: clock to round rate for + * @req: clock rate request + * + * Returns 0 on success, a negative error on failure + */ +static int clk_scu_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + /* + * Assume we support all the requested rate and let the SCU firmware + * to handle the left work + */ + return 0; +} + /* * clk_scu_round_rate - Round clock rate for a SCU clock * @hw: clock to round rate for @@ -425,7 +442,7 @@ static void clk_scu_unprepare(struct clk_hw *hw) static const struct clk_ops clk_scu_ops = { .recalc_rate = clk_scu_recalc_rate, - .round_rate = clk_scu_round_rate, + .determine_rate = clk_scu_determine_rate, .set_rate = clk_scu_set_rate, .get_parent = clk_scu_get_parent, .set_parent = clk_scu_set_parent, From patchwork Fri May 5 11:26:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232545 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9BBBC7EE22 for ; Fri, 5 May 2023 11:28:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231968AbjEEL2o (ORCPT ); Fri, 5 May 2023 07:28:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231965AbjEEL2n (ORCPT ); Fri, 5 May 2023 07:28:43 -0400 Received: from wout1-smtp.messagingengine.com (wout1-smtp.messagingengine.com [64.147.123.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 593C17AB7; Fri, 5 May 2023 04:28:42 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.west.internal (Postfix) with ESMTP id 7F7933200A44; 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Fri, 5 May 2023 07:28:40 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:01 +0200 Subject: [PATCH v4 59/68] clk: ingenic: cgu: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-59-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Paul Cercueil , linux-mips@vger.kernel.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3065; i=maxime@cerno.tech; h=from:subject:message-id; bh=s2h6NtNh1xZnvTEaEBbeRwHTKhP5GD5DmrcHaBuW+0A=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5euWfS2aG45Y1QDL9Oyrj35p2f6z2u8c+7Zx843Wu29 Gxn9OkpZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCRhO+MDDsiDj+NvlKa23/7d9OsjC WWG+0q27e3lKux202tWZaUVcDI8Ovw451pz9ef+HXrwgvVhV36xbIMxqWMR/w3bFZ2TbCsYAUA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Ingenic CGU clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Paul Cercueil Cc: linux-mips@vger.kernel.org Signed-off-by: Maxime Ripard --- drivers/clk/ingenic/cgu.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index 1f7ba30f5a1b..0c9c8344ad11 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -491,22 +491,23 @@ ingenic_clk_calc_div(struct clk_hw *hw, return div; } -static long -ingenic_clk_round_rate(struct clk_hw *hw, unsigned long req_rate, - unsigned long *parent_rate) +static int ingenic_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ingenic_clk *ingenic_clk = to_ingenic_clk(hw); const struct ingenic_cgu_clk_info *clk_info = to_clk_info(ingenic_clk); unsigned int div = 1; if (clk_info->type & CGU_CLK_DIV) - div = ingenic_clk_calc_div(hw, clk_info, *parent_rate, req_rate); + div = ingenic_clk_calc_div(hw, clk_info, req->best_parent_rate, + req->rate); else if (clk_info->type & CGU_CLK_FIXDIV) div = clk_info->fixdiv.div; else if (clk_hw_can_set_rate_parent(hw)) - *parent_rate = req_rate; + req->best_parent_rate = req->rate; - return DIV_ROUND_UP(*parent_rate, div); + req->rate = DIV_ROUND_UP(req->best_parent_rate, div); + return 0; } static inline int ingenic_clk_check_stable(struct ingenic_cgu *cgu, @@ -626,7 +627,7 @@ static const struct clk_ops ingenic_clk_ops = { .set_parent = ingenic_clk_set_parent, .recalc_rate = ingenic_clk_recalc_rate, - .round_rate = ingenic_clk_round_rate, + .determine_rate = ingenic_clk_determine_rate, .set_rate = ingenic_clk_set_rate, .enable = ingenic_clk_enable, From patchwork Fri May 5 11:26:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232546 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C20D0C7EE2C for ; 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Fri, 5 May 2023 07:28:43 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:02 +0200 Subject: [PATCH v4 60/68] clk: ingenic: tcu: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-60-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Paul Cercueil , linux-mips@vger.kernel.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2886; i=maxime@cerno.tech; h=from:subject:message-id; bh=vMv8cJqHuqTSrFAiOuxHeMK+bNhjCnPVj2f+xVcpeEU=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5d2u+hInU9ImPD5oJgFY/LiDZ6d5xtVZt55m/fWqupL 9ab4jlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAEzEj4eR4Wzz+Tq3tNl9ZZJ/Gi5sO2 TGvW/vE8a9HU+1Lx89vfxgXQcjwymlZS0vZxRbW8mtY9r67nrBkQtuhzk+5lo8e7kh8VZjGC8A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Ingenic TCU clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Paul Cercueil Cc: linux-mips@vger.kernel.org Signed-off-by: Maxime Ripard --- drivers/clk/ingenic/tcu.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/clk/ingenic/tcu.c b/drivers/clk/ingenic/tcu.c index d5544cbc5c48..7d04ef40b7cf 100644 --- a/drivers/clk/ingenic/tcu.c +++ b/drivers/clk/ingenic/tcu.c @@ -178,18 +178,21 @@ static u8 ingenic_tcu_get_prescale(unsigned long rate, unsigned long req_rate) return 5; /* /1024 divider */ } -static long ingenic_tcu_round_rate(struct clk_hw *hw, unsigned long req_rate, - unsigned long *parent_rate) +static int ingenic_tcu_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - unsigned long rate = *parent_rate; + unsigned long rate = req->best_parent_rate; u8 prescale; - if (req_rate > rate) - return rate; + if (req->rate > rate) { + req->rate = rate; + return 0; + } - prescale = ingenic_tcu_get_prescale(rate, req_rate); + prescale = ingenic_tcu_get_prescale(rate, req->rate); - return rate >> (prescale * 2); + req->rate = rate >> (prescale * 2); + return 0; } static int ingenic_tcu_set_rate(struct clk_hw *hw, unsigned long req_rate, @@ -219,7 +222,7 @@ static const struct clk_ops ingenic_tcu_clk_ops = { .set_parent = ingenic_tcu_set_parent, .recalc_rate = ingenic_tcu_recalc_rate, - .round_rate = ingenic_tcu_round_rate, + .determine_rate = ingenic_tcu_determine_rate, .set_rate = ingenic_tcu_set_rate, .enable = ingenic_tcu_enable, From patchwork Fri May 5 11:26:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA177C77B7F for ; Fri, 5 May 2023 11:28:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231347AbjEEL2u (ORCPT ); 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Fri, 5 May 2023 07:28:46 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:03 +0200 Subject: [PATCH v4 61/68] clk: sprd: composite: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-61-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Baolin Wang , Chunyan Zhang , Orson Zhai X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2798; i=maxime@cerno.tech; h=from:subject:message-id; bh=ytKNiqkURQEzbzVnMdvv3cEfASXp4c6fieUw5DiYu7Y=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5e+ziq4JvZOf+kWodOTGzgv//p5RG7qhytved+IiP6T k9rI2VHKwiDGxSArpsgSI2y+JO7UrNedbHzzYOawMoEMYeDiFICJ3N/PyHDlxm8/kTnz3+Q1z58kaj KHPbdpjeAB/VPGzoemWaVl/fzN8L/4Zd+8kjDBn7Jrs/ae+fu55t0Dm1+/C0NMWZviDh4z3ssLAA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Spreadtrum composite clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Baolin Wang Cc: Chunyan Zhang Cc: Orson Zhai Acked-by: Chunyan Zhang Signed-off-by: Maxime Ripard --- drivers/clk/sprd/composite.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/clk/sprd/composite.c b/drivers/clk/sprd/composite.c index ebb644820b1e..d3a852720c07 100644 --- a/drivers/clk/sprd/composite.c +++ b/drivers/clk/sprd/composite.c @@ -9,13 +9,19 @@ #include "composite.h" -static long sprd_comp_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int sprd_comp_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct sprd_comp *cc = hw_to_sprd_comp(hw); + unsigned long rate; - return sprd_div_helper_round_rate(&cc->common, &cc->div, - rate, parent_rate); + rate = sprd_div_helper_round_rate(&cc->common, &cc->div, + req->rate, &req->best_parent_rate); + if (rate < 0) + return rate; + + req->rate = rate; + return 0; } static unsigned long sprd_comp_recalc_rate(struct clk_hw *hw, @@ -53,7 +59,7 @@ const struct clk_ops sprd_comp_ops = { .get_parent = sprd_comp_get_parent, .set_parent = sprd_comp_set_parent, - .round_rate = sprd_comp_round_rate, + .determine_rate = sprd_comp_determine_rate, .recalc_rate = sprd_comp_recalc_rate, .set_rate = sprd_comp_set_rate, }; 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Fri, 5 May 2023 07:28:52 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:04 +0200 Subject: [PATCH v4 62/68] clk: st: flexgen: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-62-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2831; i=maxime@cerno.tech; h=from:subject:message-id; bh=pfoOHbniFY4Bi9Qzbzr7r7LUa/8Kiy7Rh6mXMBg/2IM=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5fmSi3vd3wsfvyNmv79z3s+rns6ZV+qZ9C1ICeLfI51 B/wzO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCRJycZGbpWS+vPrFW9H/ytJeB1Qf 7ZuDedGvKtVhVnhc4vPzKv9gMjw8qghtWML48uKrDcWz/fptrK4n5TXOeuy0+Fw+bJ6Ivs4wQA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The ST Flexgen clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Signed-off-by: Maxime Ripard --- drivers/clk/st/clk-flexgen.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/clk/st/clk-flexgen.c b/drivers/clk/st/clk-flexgen.c index 7ae4f656191e..5292208c4dd8 100644 --- a/drivers/clk/st/clk-flexgen.c +++ b/drivers/clk/st/clk-flexgen.c @@ -119,20 +119,21 @@ clk_best_div(unsigned long parent_rate, unsigned long rate) return parent_rate / rate + ((rate > (2*(parent_rate % rate))) ? 0 : 1); } -static long flexgen_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int flexgen_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned long div; /* Round div according to exact prate and wished rate */ - div = clk_best_div(*prate, rate); + div = clk_best_div(req->best_parent_rate, req->rate); if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) { - *prate = rate * div; - return rate; + req->best_parent_rate = req->rate * div; + return 0; } - return *prate / div; + req->rate = req->best_parent_rate / div; + return 0; } static unsigned long flexgen_recalc_rate(struct clk_hw *hw, @@ -197,7 +198,7 @@ static const struct clk_ops flexgen_ops = { .is_enabled = flexgen_is_enabled, .get_parent = flexgen_get_parent, .set_parent = flexgen_set_parent, - .round_rate = flexgen_round_rate, + .determine_rate = flexgen_determine_rate, .recalc_rate = flexgen_recalc_rate, .set_rate = flexgen_set_rate, }; From patchwork Fri May 5 11:26:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC545C77B7F for ; Fri, 5 May 2023 11:28:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231539AbjEEL27 (ORCPT ); Fri, 5 May 2023 07:28:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231384AbjEEL26 (ORCPT ); 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Fri, 5 May 2023 07:28:55 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:05 +0200 Subject: [PATCH v4 63/68] clk: stm32: composite: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-63-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Alexandre Torgue , Maxime Coquelin , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4039; i=maxime@cerno.tech; h=from:subject:message-id; bh=CIEIIIZ1agmth1FxcZ4Gkd6VtvFomP0US5DsP0ecWPQ=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5d+1rm+I7l9d8ncxgfx0+OqtbzeZoddNPl0IF3m9+6b q69ZdZSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAiT7UZ/hnaNyxgvDB7Rs58hkvxsw WC3uWnK3w9YelhPUH/xykFwXCGfypVbJaMz9iMvxneurXnUeDNhqNrlzrzOnu9DIy6fUH4Fj8A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The STM32 composite clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Alexandre Torgue Cc: Maxime Coquelin Cc: linux-arm-kernel@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Maxime Ripard --- drivers/clk/stm32/clk-stm32-core.c | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c index 3247539683c9..d5aa09e9fce4 100644 --- a/drivers/clk/stm32/clk-stm32-core.c +++ b/drivers/clk/stm32/clk-stm32-core.c @@ -426,15 +426,15 @@ static unsigned long clk_stm32_composite_recalc_rate(struct clk_hw *hw, composite->div_id, parent_rate); } -static long clk_stm32_composite_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_stm32_composite_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_stm32_composite *composite = to_clk_stm32_composite(hw); - const struct stm32_div_cfg *divider; + unsigned long rate; if (composite->div_id == NO_STM32_DIV) - return rate; + return 0; divider = &composite->clock_data->dividers[composite->div_id]; @@ -445,14 +445,24 @@ static long clk_stm32_composite_round_rate(struct clk_hw *hw, unsigned long rate val = readl(composite->base + divider->offset) >> divider->shift; val &= clk_div_mask(divider->width); - return divider_ro_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags, - val); + rate = divider_ro_round_rate(hw, req->rate, &req->best_parent_rate, + divider->table, divider->width, divider->flags, + val); + if (rate < 0) + return rate; + + req->rate = rate; + return 0; } - return divider_round_rate_parent(hw, clk_hw_get_parent(hw), - rate, prate, divider->table, - divider->width, divider->flags); + rate = divider_round_rate_parent(hw, clk_hw_get_parent(hw), + req->rate, &req->best_parent_rate, + divider->table, divider->width, divider->flags); + if (rate < 0) + return rate; + + req->rate = rate; + return 0; } static u8 clk_stm32_composite_get_parent(struct clk_hw *hw) @@ -602,7 +612,7 @@ static void clk_stm32_composite_disable_unused(struct clk_hw *hw) const struct clk_ops clk_stm32_composite_ops = { .set_rate = clk_stm32_composite_set_rate, .recalc_rate = clk_stm32_composite_recalc_rate, - .round_rate = clk_stm32_composite_round_rate, + .determine_rate = clk_stm32_composite_determine_rate, .get_parent = clk_stm32_composite_get_parent, .set_parent = clk_stm32_composite_set_parent, .enable = clk_stm32_composite_gate_enable, From patchwork Fri May 5 11:26:06 2023 Content-Type: text/plain; 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Fri, 5 May 2023 07:28:58 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:06 +0200 Subject: [PATCH v4 64/68] clk: tegra: periph: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-64-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , linux-tegra@vger.kernel.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3482; i=maxime@cerno.tech; h=from:subject:message-id; bh=c0XrwBttDb+hpqAiFhQ+kcVqgDektInAeVW17Cq+pmw=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5dOPrLBStg2XiNh4pLztToJ7un//35049vquCKz/NWN 2j0vO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjARlcOMDG0vG51cFVu155ed9RR0K5 6W/kTnvozPvu03fMtCS61k1zAyfFRsdLTUbfGrFeJ6+EZDPU7oIFPhq6ZQqW21BbsmSBfyAwA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Tegra periph clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Jonathan Hunter Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Thierry Reding Cc: linux-tegra@vger.kernel.org Signed-off-by: Maxime Ripard --- drivers/clk/tegra/clk-periph.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c index ea443366e972..0626650a7011 100644 --- a/drivers/clk/tegra/clk-periph.c +++ b/drivers/clk/tegra/clk-periph.c @@ -45,16 +45,22 @@ static unsigned long clk_periph_recalc_rate(struct clk_hw *hw, return div_ops->recalc_rate(div_hw, parent_rate); } -static long clk_periph_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_periph_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct tegra_clk_periph *periph = to_clk_periph(hw); const struct clk_ops *div_ops = periph->div_ops; struct clk_hw *div_hw = &periph->divider.hw; + unsigned long rate; __clk_hw_set_clk(div_hw, hw); - return div_ops->round_rate(div_hw, rate, prate); + rate = div_ops->round_rate(div_hw, req->rate, &req->best_parent_rate); + if (rate < 0) + return rate; + + req->rate = rate; + return 0; } static int clk_periph_set_rate(struct clk_hw *hw, unsigned long rate, @@ -130,7 +136,7 @@ const struct clk_ops tegra_clk_periph_ops = { .get_parent = clk_periph_get_parent, .set_parent = clk_periph_set_parent, .recalc_rate = clk_periph_recalc_rate, - .round_rate = clk_periph_round_rate, + .determine_rate = clk_periph_determine_rate, .set_rate = clk_periph_set_rate, .is_enabled = clk_periph_is_enabled, .enable = clk_periph_enable, @@ -154,7 +160,7 @@ static const struct clk_ops tegra_clk_periph_no_gate_ops = { .get_parent = clk_periph_get_parent, .set_parent = clk_periph_set_parent, .recalc_rate = clk_periph_recalc_rate, - .round_rate = clk_periph_round_rate, + .determine_rate = clk_periph_determine_rate, .set_rate = clk_periph_set_rate, .restore_context = clk_periph_restore_context, }; From patchwork Fri May 5 11:26:07 2023 Content-Type: text/plain; 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Fri, 5 May 2023 07:29:01 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:07 +0200 Subject: [PATCH v4 65/68] clk: tegra: super: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-65-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , linux-tegra@vger.kernel.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3039; i=maxime@cerno.tech; h=from:subject:message-id; bh=MugLLXsoryE1kaMdYcgTsz8hHT/FUkSGKo5Wp/zT9CM=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5farntdpfHtutkHU4X6xfOUj7F86XH/8eyTwlTWbL0X ItM4OkpZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCR/s+MDHPLZRjNi05+ytu0bEbzuW V7pe6mSG4rFK9f4+ftePJxtxUjw8G/Kt9bS7b0qss+OOO0KP4aT6/4zpyrlzrl2gRmP5z9gQkA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Tegra super clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Jonathan Hunter Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Thierry Reding Cc: linux-tegra@vger.kernel.org Signed-off-by: Maxime Ripard --- drivers/clk/tegra/clk-super.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/clk-super.c index 3f3a7a203c5f..7ec47942720c 100644 --- a/drivers/clk/tegra/clk-super.c +++ b/drivers/clk/tegra/clk-super.c @@ -142,15 +142,22 @@ static const struct clk_ops tegra_clk_super_mux_ops = { .restore_context = clk_super_mux_restore_context, }; -static long clk_super_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_super_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct tegra_clk_super_mux *super = to_clk_super_mux(hw); struct clk_hw *div_hw = &super->frac_div.hw; + unsigned long rate; __clk_hw_set_clk(div_hw, hw); - return super->div_ops->round_rate(div_hw, rate, parent_rate); + rate = super->div_ops->round_rate(div_hw, req->rate, + &req->best_parent_rate); + if (rate < 0) + return rate; + + req->rate = rate; + return 0; } static unsigned long clk_super_recalc_rate(struct clk_hw *hw, @@ -193,7 +200,7 @@ const struct clk_ops tegra_clk_super_ops = { .get_parent = clk_super_get_parent, .set_parent = clk_super_set_parent, .set_rate = clk_super_set_rate, - .round_rate = clk_super_round_rate, + .determine_rate = clk_super_determine_rate, .recalc_rate = clk_super_recalc_rate, .restore_context = clk_super_restore_context, }; From patchwork Fri May 5 11:26:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232552 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B8EEC77B75 for ; Fri, 5 May 2023 11:29:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231744AbjEEL3I (ORCPT ); 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Fri, 5 May 2023 07:29:04 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:08 +0200 Subject: [PATCH v4 66/68] ASoC: tlv320aic32x4: pll: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-66-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Jaroslav Kysela , Liam Girdwood , Mark Brown , Takashi Iwai , alsa-devel@alsa-project.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3244; i=maxime@cerno.tech; h=from:subject:message-id; bh=2xHE7OLaLEu5YnIpsbcTiVg8NSm5gHLV/BFpBcqFt24=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5f+T1glNJ3rWNfa7PKzVr6PXsuX5GuJyS+9I7clyLfQ iXViRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACZyYCYjQ6/wTo+fOy6kO7vHuU+N85 f8IsFytHZaRh/fMa6TKrHOXIwMhyW2dVjNs1pTNefeQTOWKRtjjPLTWLjtRfij0+cdSdzKDwA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The tlv320aic32x4 PLL clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Jaroslav Kysela Cc: Liam Girdwood Cc: Mark Brown Cc: Takashi Iwai Cc: alsa-devel@alsa-project.org Signed-off-by: Maxime Ripard --- sound/soc/codecs/tlv320aic32x4-clk.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4-clk.c b/sound/soc/codecs/tlv320aic32x4-clk.c index 80cbc6bc6847..e2de4617ab09 100644 --- a/sound/soc/codecs/tlv320aic32x4-clk.c +++ b/sound/soc/codecs/tlv320aic32x4-clk.c @@ -204,18 +204,23 @@ static unsigned long clk_aic32x4_pll_recalc_rate(struct clk_hw *hw, return clk_aic32x4_pll_calc_rate(&settings, parent_rate); } -static long clk_aic32x4_pll_round_rate(struct clk_hw *hw, - unsigned long rate, - unsigned long *parent_rate) +static int clk_aic32x4_pll_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_aic32x4_pll_muldiv settings; + unsigned long rate; int ret; - ret = clk_aic32x4_pll_calc_muldiv(&settings, rate, *parent_rate); + ret = clk_aic32x4_pll_calc_muldiv(&settings, req->rate, req->best_parent_rate); if (ret < 0) - return 0; + return -EINVAL; - return clk_aic32x4_pll_calc_rate(&settings, *parent_rate); + rate = clk_aic32x4_pll_calc_rate(&settings, req->best_parent_rate); + if (rate < 0) + return rate; + + req->rate = rate; + return 0; } static int clk_aic32x4_pll_set_rate(struct clk_hw *hw, @@ -266,7 +271,7 @@ static const struct clk_ops aic32x4_pll_ops = { .unprepare = clk_aic32x4_pll_unprepare, .is_prepared = clk_aic32x4_pll_is_prepared, .recalc_rate = clk_aic32x4_pll_recalc_rate, - .round_rate = clk_aic32x4_pll_round_rate, + .determine_rate = clk_aic32x4_pll_determine_rate, .set_rate = clk_aic32x4_pll_set_rate, .set_parent = clk_aic32x4_pll_set_parent, .get_parent = clk_aic32x4_pll_get_parent, From patchwork Fri May 5 11:26:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232553 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0746DC7EE22 for ; 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Fri, 5 May 2023 07:29:07 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:09 +0200 Subject: [PATCH v4 67/68] ASoC: tlv320aic32x4: div: Switch to determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-67-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Jaroslav Kysela , Liam Girdwood , Mark Brown , Takashi Iwai , alsa-devel@alsa-project.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3309; i=maxime@cerno.tech; h=from:subject:message-id; bh=idDdRaIJYYsvF6pT+ZXhI+bO7bJzGY8R6vqfi3bZIRk=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5cuucXCss46ZMXaDQrn4q4aHRIwenh4esYnZm2fjK97 WtabdpSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAihjcZGT7OOFB378eNVSGaW1p4fj veNuzrf+ncvtK5k23nBp6MyzMZ/jsF8enKzPgiYVSZ53y4u82ozEfk3KMyt+yTbNUPeiWaeAE= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The tlv320aic32x4 divider clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Cc: Jaroslav Kysela Cc: Liam Girdwood Cc: Mark Brown Cc: Takashi Iwai Cc: alsa-devel@alsa-project.org Signed-off-by: Maxime Ripard --- sound/soc/codecs/tlv320aic32x4-clk.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4-clk.c b/sound/soc/codecs/tlv320aic32x4-clk.c index e2de4617ab09..a7ec501b4c69 100644 --- a/sound/soc/codecs/tlv320aic32x4-clk.c +++ b/sound/soc/codecs/tlv320aic32x4-clk.c @@ -332,16 +332,17 @@ static int clk_aic32x4_div_set_rate(struct clk_hw *hw, unsigned long rate, AIC32X4_DIV_MASK, divisor); } -static long clk_aic32x4_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int clk_aic32x4_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { unsigned long divisor; - divisor = DIV_ROUND_UP(*parent_rate, rate); + divisor = DIV_ROUND_UP(req->best_parent_rate, req->rate); if (divisor > 128) return -EINVAL; - return DIV_ROUND_UP(*parent_rate, divisor); + req->rate = DIV_ROUND_UP(req->best_parent_rate, divisor); + return 0; } static unsigned long clk_aic32x4_div_recalc_rate(struct clk_hw *hw, @@ -360,7 +361,7 @@ static const struct clk_ops aic32x4_div_ops = { .prepare = clk_aic32x4_div_prepare, .unprepare = clk_aic32x4_div_unprepare, .set_rate = clk_aic32x4_div_set_rate, - .round_rate = clk_aic32x4_div_round_rate, + .determine_rate = clk_aic32x4_div_determine_rate, .recalc_rate = clk_aic32x4_div_recalc_rate, }; @@ -388,7 +389,7 @@ static const struct clk_ops aic32x4_bdiv_ops = { .set_parent = clk_aic32x4_bdiv_set_parent, .get_parent = clk_aic32x4_bdiv_get_parent, .set_rate = clk_aic32x4_div_set_rate, - .round_rate = clk_aic32x4_div_round_rate, + .determine_rate = clk_aic32x4_div_determine_rate, .recalc_rate = clk_aic32x4_div_recalc_rate, }; From patchwork Fri May 5 11:26:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13232554 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BEEFC77B75 for ; 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Fri, 5 May 2023 07:29:10 -0400 (EDT) From: Maxime Ripard Date: Fri, 05 May 2023 13:26:10 +0200 Subject: [PATCH v4 68/68] clk: Forbid to register a mux without determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v4-68-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard , Abel Vesa , Alessandro Zummo , Alexandre Belloni , Alexandre Torgue , =?utf-8?q?Andreas_F=C3=A4r?= =?utf-8?q?ber?= , AngeloGioacchino Del Regno , Baolin Wang , Charles Keepax , Chen-Yu Tsai , Chen-Yu Tsai , Chunyan Zhang , Claudiu Beznea , Daniel Vetter , David Airlie , David Lechner , Dinh Nguyen , Fabio Estevam , Geert Uytterhoeven , Jaroslav Kysela , Jernej Skrabec , Jonathan Hunter , Kishon Vijay Abraham I , Liam Girdwood , Linus Walleij , Luca Ceresoli , Manivannan Sadhasivam , Mark Brown , Markus Schneider-Pargmann , Max Filippov , Maxime Coquelin , Mikko Perttunen , Miles Chen , Nicolas Ferre , Orson Zhai , Paul Cercueil , Peng Fan , Peter De Schrijver , Prashant Gaikwad , Richard Fitzgerald , Samuel Holland , Sascha Hauer , Sekhar Nori , Shawn Guo , Takashi Iwai , Thierry Reding , Ulf Hansson , Vinod Koul , dri-devel@lists.freedesktop.org, linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-phy@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rtc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, NXP Linux Team , patches@opensource.cirrus.com, Pengutronix Kernel Team X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4464; i=maxime@cerno.tech; h=from:subject:message-id; bh=3adLcMXzLNtbtn3jDq9B/uPJX8+PAXTnVm0BAOsWqLs=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCkhz5f++bpla/KjT+HVHNwH3ZZ43W04aiYltLwmTObeLs9b +dfrO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjARhmKG/8mm/ZL2RzblvZLa8tXGK5 PzRLb6I/fSXxkpb5W8WG6VqDD8lRZM8Tofc+S4jfAN7mnZR1sD/rBeip/deyxP567/o2Z1XgA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The determine_rate hook allows to select the proper parent and its rate for a given clock configuration. On another hand, set_parent is there to change the parent of a mux. Some clocks provide a set_parent hook but don't implement determine_rate. In such a case, set_parent is pretty much useless since the clock framework will always assume the current parent is to be used, and we will thus never change it. This situation can be solved in two ways: - either we don't need to change the parent, and we thus shouldn't implement set_parent; - or we don't want to change the parent, in this case we should set CLK_SET_RATE_NO_REPARENT; - or we're missing a determine_rate implementation. The latter is probably just an oversight from the driver's author, and we should thus raise their awareness about the fact that the current state of the driver is confusing. All the drivers in-tree have been converted by now, so let's prevent any clock with set_parent but without determine_rate to register so that it can't sneak in again in the future. Cc: Abel Vesa Cc: Alessandro Zummo Cc: Alexandre Belloni Cc: Alexandre Torgue Cc: "Andreas Färber" Cc: AngeloGioacchino Del Regno Cc: Baolin Wang Cc: Charles Keepax Cc: Chen-Yu Tsai Cc: Chen-Yu Tsai Cc: Chunyan Zhang Cc: Claudiu Beznea Cc: Daniel Vetter Cc: David Airlie Cc: David Lechner Cc: Dinh Nguyen Cc: Fabio Estevam Cc: Geert Uytterhoeven Cc: Jaroslav Kysela Cc: Jernej Skrabec Cc: Jonathan Hunter Cc: Kishon Vijay Abraham I Cc: Liam Girdwood Cc: Linus Walleij Cc: Luca Ceresoli Cc: Manivannan Sadhasivam Cc: Mark Brown Cc: Markus Schneider-Pargmann Cc: Max Filippov Cc: Maxime Coquelin Cc: Mikko Perttunen Cc: Miles Chen Cc: Nicolas Ferre Cc: Orson Zhai Cc: Paul Cercueil Cc: Peng Fan Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Richard Fitzgerald Cc: Samuel Holland Cc: Sascha Hauer Cc: Sekhar Nori Cc: Shawn Guo Cc: Takashi Iwai Cc: Thierry Reding Cc: Ulf Hansson Cc: Vinod Koul Cc: dri-devel@lists.freedesktop.org Cc: linux-actions@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@vger.kernel.org Cc: linux-phy@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rtc@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-sunxi@lists.linux.dev Cc: linux-tegra@vger.kernel.org Cc: NXP Linux Team Cc: patches@opensource.cirrus.com Cc: Pengutronix Kernel Team Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Maxime Ripard --- drivers/clk/clk.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index e4a1d5f9694c..c8f9227c29c9 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -3775,6 +3775,13 @@ static int __clk_core_init(struct clk_core *core) goto out; } + if (core->ops->set_parent && !core->ops->determine_rate) { + pr_err("%s: %s must implement .set_parent & .determine_rate\n", + __func__, core->name); + ret = -EINVAL; + goto out; + } + if (core->num_parents > 1 && !core->ops->get_parent) { pr_err("%s: %s must implement .get_parent as it has multi parents\n", __func__, core->name);