From patchwork Wed May 10 03:00:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Weiwei Li X-Patchwork-Id: 13236234 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 348FCC7EE22 for ; Wed, 10 May 2023 03:01:56 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pwa4l-00035V-Bx; Tue, 09 May 2023 23:01:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pwa4i-000354-TE; Tue, 09 May 2023 23:01:08 -0400 Received: from smtp80.cstnet.cn ([159.226.251.80] helo=cstnet.cn) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pwa4Z-0003uZ-1U; Tue, 09 May 2023 23:01:02 -0400 Received: from localhost.localdomain (unknown [61.165.33.195]) by APP-01 (Coremail) with SMTP id qwCowABnSIHcCFtk4anMEg--.27533S2; Wed, 10 May 2023 11:00:45 +0800 (CST) From: Weiwei Li To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, wangjunqiang@iscas.ac.cn, lazyparser@gmail.com, Weiwei Li Subject: [PATCH] target/riscv: Move zc* out of the experimental properties Date: Wed, 10 May 2023 11:00:40 +0800 Message-Id: <20230510030040.20528-1-liweiwei@iscas.ac.cn> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CM-TRANSID: qwCowABnSIHcCFtk4anMEg--.27533S2 X-Coremail-Antispam: 1UD129KBjvJXoW7KFy7CF1kXw1DAr48Aw18Zrb_yoW8ZF13pr n5JFW7Kws3JryfCay8tw1DJrW8Ga1fA392g3yfZa1xArWfKr47WF1DKFs5Cr4fJr4rZa1S 9F13ur10v39Yya7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvG14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4U JVWxJr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gc CE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E 2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJV W8JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lFIxGxcIEc7CjxVA2 Y2ka0xkIwI1lc2xSY4AK67AK6r48MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r 1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CE b7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0x vE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAI cVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIYCTnIWIevJa 73UjIFyTuYvjfUnQ6pDUUUU X-Originating-IP: [61.165.33.195] X-CM-SenderInfo: 5olzvxxzhlqxpvfd2hldfou0/ Received-SPF: pass client-ip=159.226.251.80; envelope-from=liweiwei@iscas.ac.cn; helo=cstnet.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Zc* extensions (version 1.0) are ratified. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: LIU Zhiwei Reviewed-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index db0875fb43..99ed9cb80e 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1571,6 +1571,14 @@ static Property riscv_cpu_extensions[] = { DEFINE_PROP_BOOL("zmmul", RISCVCPU, cfg.ext_zmmul, false), + DEFINE_PROP_BOOL("zca", RISCVCPU, cfg.ext_zca, false), + DEFINE_PROP_BOOL("zcb", RISCVCPU, cfg.ext_zcb, false), + DEFINE_PROP_BOOL("zcd", RISCVCPU, cfg.ext_zcd, false), + DEFINE_PROP_BOOL("zce", RISCVCPU, cfg.ext_zce, false), + DEFINE_PROP_BOOL("zcf", RISCVCPU, cfg.ext_zcf, false), + DEFINE_PROP_BOOL("zcmp", RISCVCPU, cfg.ext_zcmp, false), + DEFINE_PROP_BOOL("zcmt", RISCVCPU, cfg.ext_zcmt, false), + /* Vendor-specific custom extensions */ DEFINE_PROP_BOOL("xtheadba", RISCVCPU, cfg.ext_xtheadba, false), DEFINE_PROP_BOOL("xtheadbb", RISCVCPU, cfg.ext_xtheadbb, false), @@ -1588,14 +1596,6 @@ static Property riscv_cpu_extensions[] = { /* These are experimental so mark with 'x-' */ DEFINE_PROP_BOOL("x-zicond", RISCVCPU, cfg.ext_zicond, false), - DEFINE_PROP_BOOL("x-zca", RISCVCPU, cfg.ext_zca, false), - DEFINE_PROP_BOOL("x-zcb", RISCVCPU, cfg.ext_zcb, false), - DEFINE_PROP_BOOL("x-zcd", RISCVCPU, cfg.ext_zcd, false), - DEFINE_PROP_BOOL("x-zce", RISCVCPU, cfg.ext_zce, false), - DEFINE_PROP_BOOL("x-zcf", RISCVCPU, cfg.ext_zcf, false), - DEFINE_PROP_BOOL("x-zcmp", RISCVCPU, cfg.ext_zcmp, false), - DEFINE_PROP_BOOL("x-zcmt", RISCVCPU, cfg.ext_zcmt, false), - /* ePMP 0.9.3 */ DEFINE_PROP_BOOL("x-epmp", RISCVCPU, cfg.epmp, false), DEFINE_PROP_BOOL("x-smaia", RISCVCPU, cfg.ext_smaia, false),