From patchwork Thu May 11 04:12:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rabara, Niravkumar L" X-Patchwork-Id: 13237503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 592C3C7EE22 for ; Thu, 11 May 2023 04:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235540AbjEKEMg (ORCPT ); Thu, 11 May 2023 00:12:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231486AbjEKEMf (ORCPT ); Thu, 11 May 2023 00:12:35 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D522949C0; Wed, 10 May 2023 21:12:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683778354; x=1715314354; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=c+g78DzIgPnotxKbjQZUyQiRs7PXweLqQiSMjMRFCM8=; b=QXIiygcOAwKpum1jyb63enWer/jJT279RHnuS3Ouz2fnOLr3ioieS6s+ m0zFt7SdTP9BIQXTb4q7MUfptYWMVScywCimdG4lRuymiLAs3GQnXJBGL NPCZrzrWH4JUEZx4WVH3uZ2HYMl7UXArjg6r2bCOn0h1JNqQGTOf8fcnh E0aq8MkjH34S8r4BqswQ2T4L10MfSyf9O3lECL/15lNME4MxqlmCeKAtO cnkvN1H6ax7DFHW3MmZzidatg3v125/5C1CzTcU3HdjenekiKUDqVNxY2 ckdzCVlxxJoiGG1NBBoh9RTr4300K6MFP/i3JXsEEDZCi+gyLNexDwutc w==; X-IronPort-AV: E=McAfee;i="6600,9927,10706"; a="347854499" X-IronPort-AV: E=Sophos;i="5.99,266,1677571200"; d="scan'208";a="347854499" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2023 21:12:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10706"; a="1029467214" X-IronPort-AV: E=Sophos;i="5.99,266,1677571200"; d="scan'208";a="1029467214" Received: from unknown (HELO localhost.localdomain) ([10.226.216.116]) by fmsmga005.fm.intel.com with ESMTP; 10 May 2023 21:12:32 -0700 From: niravkumar.l.rabara@intel.com To: niravkumar.l.rabara@intel.com Cc: bp@alien8.de, dinguyen@kernel.org, james.morse@arm.com, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, mchehab@kernel.org, rric@kernel.org, tony.luck@intel.com Subject: [PATCH v3 1/2] firmware: stratix10-svc: Add command to get SEU error info Date: Thu, 11 May 2023 12:12:20 +0800 Message-Id: <20230511041221.135527-2-niravkumar.l.rabara@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230511041221.135527-1-niravkumar.l.rabara@intel.com> References: <20230503061000.3279381-1-niravkumar.l.rabara@intel.com> <20230511041221.135527-1-niravkumar.l.rabara@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Niravkumar L Rabara Introduce a new command to get Single Event Upset Error information. Signed-off-by: Niravkumar L Rabara --- include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h index a718f853d457..48810c39f612 100644 --- a/include/linux/firmware/intel/stratix10-smc.h +++ b/include/linux/firmware/intel/stratix10-smc.h @@ -595,4 +595,24 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA) +/** + * Request INTEL_SIP_SMC_READ_SEU_ERR + * Sync call to get Single Event Upset Error information + * SEU detects both corrected and uncorrected error + * + * Call register usage: + * a0 INTEL_SIP_SMC_READ_SEU_ERR + * a1-7 not used + * + * Return status: + * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_NOT_SUPPORTED or + * INTEL_SIP_SMC_STATUS_ERROR + * a1 error count of response data + * a2 sector address of response data + * a3 error data + */ +#define INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS 153 +#define INTEL_SIP_SMC_READ_SEU_ERR \ + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS) + #endif From patchwork Thu May 11 04:12:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rabara, Niravkumar L" X-Patchwork-Id: 13237504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4135C7EE26 for ; Thu, 11 May 2023 04:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236225AbjEKEMo (ORCPT ); Thu, 11 May 2023 00:12:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236268AbjEKEMj (ORCPT ); Thu, 11 May 2023 00:12:39 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09B754EDA; Wed, 10 May 2023 21:12:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683778359; x=1715314359; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=axe73vAyyjPq73X02dATlO5y4758SkBzgXH7klxT9xs=; b=ImG62oimcSMkmeNbIqKWsvavz4UOepK29KSfhS1vOuS3p6TdlHSOKq+k ElpVcEGVCipbnQ1OEnMlQhB0NDPAtlma+6eTBVVEmWFdEs8wGd/xz9mi8 Ez3ihR9uUrfljwh4Z8/iz+ke86M9Fw4OitxbJ16IPpyzWqGIIx/titxG0 GnkAuezXD3DwxjdJW4fxRoNr37mQzaBzyeVRGYmoN0ACAdVihVp5Mofq5 /QuL8fKxe/EkFdv9QOyItwQYJ+EYtJqZ6DJstWZqR9knf9FFNZVY5KQUK kHZOdhFvOTXcfVb3tKAbrWgCE2vf1N2G8YajwHpirhwoYACZEcwRDBC45 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10706"; a="347854511" X-IronPort-AV: E=Sophos;i="5.99,266,1677571200"; d="scan'208";a="347854511" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2023 21:12:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10706"; a="1029467225" X-IronPort-AV: E=Sophos;i="5.99,266,1677571200"; d="scan'208";a="1029467225" Received: from unknown (HELO localhost.localdomain) ([10.226.216.116]) by fmsmga005.fm.intel.com with ESMTP; 10 May 2023 21:12:36 -0700 From: niravkumar.l.rabara@intel.com To: niravkumar.l.rabara@intel.com Cc: bp@alien8.de, dinguyen@kernel.org, james.morse@arm.com, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, mchehab@kernel.org, rric@kernel.org, tony.luck@intel.com Subject: [PATCH v3 2/2] EDAC/altera: Check previous DDR DBE during driver probe Date: Thu, 11 May 2023 12:12:21 +0800 Message-Id: <20230511041221.135527-3-niravkumar.l.rabara@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230511041221.135527-1-niravkumar.l.rabara@intel.com> References: <20230503061000.3279381-1-niravkumar.l.rabara@intel.com> <20230511041221.135527-1-niravkumar.l.rabara@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Niravkumar L Rabara Add DDR DBE check during driver probe to notify user if previous reboot cause by DDR DBE and print DBE error related information. Signed-off-by: Niravkumar L Rabara --- drivers/edac/altera_edac.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c index 8b31cd54bdb6..04c0675adc8c 100644 --- a/drivers/edac/altera_edac.c +++ b/drivers/edac/altera_edac.c @@ -2159,6 +2159,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev) #ifdef CONFIG_64BIT { int dberror, err_addr; + struct arm_smccc_res result; edac->panic_notifier.notifier_call = s10_edac_dberr_handler; atomic_notifier_chain_register(&panic_notifier_list, @@ -2168,11 +2169,29 @@ static int altr_edac_a10_probe(struct platform_device *pdev) regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, &dberror); if (dberror) { - regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST, - &err_addr); - edac_printk(KERN_ERR, EDAC_DEVICE, - "Previous Boot UE detected[0x%X] @ 0x%X\n", - dberror, err_addr); + /* Bit-31 is set if previous DDR UE happened */ + if (dberror & (1 << 31)) { + /* Read previous DDR UE info */ + arm_smccc_smc(INTEL_SIP_SMC_READ_SEU_ERR, 0, + 0, 0, 0, 0, 0, 0, &result); + + if (!result.a0) { + edac_printk(KERN_ERR, EDAC_DEVICE, + "Previous DDR UE:Count=0x%X,Address=0x%X,ErrorData=0x%X\n" + , (unsigned int)result.a1 + , (unsigned int)result.a2 + , (unsigned int)result.a3); + } else { + edac_printk(KERN_ERR, EDAC_DEVICE, + "INTEL_SIP_SMC_SEU_ERR_STATUS failed\n"); + } + } else { + regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST, + &err_addr); + edac_printk(KERN_ERR, EDAC_DEVICE, + "Previous Boot UE detected[0x%X] @ 0x%X\n", + dberror, err_addr); + } /* Reset the sticky registers */ regmap_write(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, 0);