From patchwork Sat Feb 2 00:15:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 10793859 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EE33113B4 for ; Sat, 2 Feb 2019 00:16:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DB7433314E for ; Sat, 2 Feb 2019 00:16:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CC3E433151; Sat, 2 Feb 2019 00:16:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 405A83314E for ; Sat, 2 Feb 2019 00:16:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727161AbfBBAPi (ORCPT ); Fri, 1 Feb 2019 19:15:38 -0500 Received: from mail-pg1-f193.google.com ([209.85.215.193]:44078 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727034AbfBBAPh (ORCPT ); Fri, 1 Feb 2019 19:15:37 -0500 Received: by mail-pg1-f193.google.com with SMTP id t13so3672244pgr.11; Fri, 01 Feb 2019 16:15:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nSRUQnVI9WIETg7K/wATyf0nSEPKuobaySZ5tG4KrzQ=; b=U23DCKQ0ly4TuQ9pT7CE74m/k1GlfzX/bW2MG9LipuZzG2TzI4aOle8JtYbo52EwSc zN6A+S2+RnDK2eY85VrRDLrAc+4lbhnYQOZUy888dV+XPNj3WKZktcMKR0UQdSd61TI+ L96uhArX//LsnSlj19wl9+p5g6lQN+c10R9MuBqVpF9GdwToLdDumSk9xxd/RO57tdke RsyXWbQSKGdRcL09jba3MMcql5vrm4TR0ThunAPdzDQs8n6+1mhILxNdqExc3b+mNiKd A/aRbqHJqLxfHmP3AvsvLcYspIzWNFoGY/6dMsOM7o98SoNMQdMJpAgLN8whAwY8+8wU XJjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nSRUQnVI9WIETg7K/wATyf0nSEPKuobaySZ5tG4KrzQ=; b=kpx6J2xxmwKIkeRCgoNpiQkhoTOxJQPYWPd4zJKZSQsld/ujeiQ+jMIT++kta7ia+/ jkW3JAwF2gp28WSvJnStg/QnWYc4IYipBnGoIZeqURmU44zHZJn66ls4Z7g8lQv+Eglp FigD0884FwxxBgo5W5BNiphQs8+jjBIX9rqcMtWp/G7EDb/MIE6fuMnKVpVF1rhltTOG 9AdA6Uzu2GdHTE7I/OD846Eo92TIdIZNYWMg4AV/nkfUUbiIJk3UbwuSqmRS5KnbLHLI SxyaM81im6zdSCFq1UQMZqANalEPry5937yRDcfsPohGSOTU8Aazdad0RMqpsIf7F/g4 L/Qw== X-Gm-Message-State: AHQUAuYT8DHQ+btniARt1GOjzIbbKYxoJEfUUptF+sPfOtzKDubJb7iR K1zVAGLpOjo20Lkc6/9AaUM= X-Google-Smtp-Source: AHgI3IayhMP0Hp5oBha9Xf8gbjLnQ0tWuPWUL7D9LWxbpKSLeGUD7rjJxNMyzkDW7v+Ba6NRm4vWIA== X-Received: by 2002:a63:ee4c:: with SMTP id n12mr4282607pgk.21.1549066536384; Fri, 01 Feb 2019 16:15:36 -0800 (PST) Received: from squirtle.lan (c-24-22-235-96.hsd1.wa.comcast.net. [24.22.235.96]) by smtp.gmail.com with ESMTPSA id w6sm28374545pga.72.2019.02.01.16.15.34 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Feb 2019 16:15:35 -0800 (PST) From: Andrey Smirnov To: Lorenzo Pieralisi Cc: Andrey Smirnov , Stefan Agner , Lucas Stach , Bjorn Helgaas , Fabio Estevam , Chris Healy , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v7 1/4] PCI: imx6: Introduce drvdata Date: Fri, 1 Feb 2019 16:15:20 -0800 Message-Id: <20190202001523.12517-2-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190202001523.12517-1-andrew.smirnov@gmail.com> References: <20190202001523.12517-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce driver data struct. This will simplify handling of device specific differences. Signed-off-by: Stefan Agner [andrew.smirnov@gmail.com reformatted drvdata, to simplify future diffs] Signed-off-by: Andrey Smirnov Reviewed-by: Lucas Stach Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org --- drivers/pci/controller/dwc/pci-imx6.c | 56 ++++++++++++++++++--------- 1 file changed, 37 insertions(+), 19 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 52e47dac028f..1e940ba7e4c4 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -41,6 +41,10 @@ enum imx6_pcie_variants { IMX7D, }; +struct imx6_pcie_drvdata { + enum imx6_pcie_variants variant; +}; + struct imx6_pcie { struct dw_pcie *pci; int reset_gpio; @@ -53,7 +57,6 @@ struct imx6_pcie { struct reset_control *pciephy_reset; struct reset_control *apps_reset; struct reset_control *turnoff_reset; - enum imx6_pcie_variants variant; u32 tx_deemph_gen1; u32 tx_deemph_gen2_3p5db; u32 tx_deemph_gen2_6db; @@ -66,6 +69,7 @@ struct imx6_pcie { struct device *pd_pcie; /* power domain for pcie phy */ struct device *pd_pcie_phy; + const struct imx6_pcie_drvdata *drvdata; }; /* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */ @@ -339,7 +343,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) { struct device *dev = imx6_pcie->pci->dev; - switch (imx6_pcie->variant) { + switch (imx6_pcie->drvdata->variant) { case IMX7D: reset_control_assert(imx6_pcie->pciephy_reset); reset_control_assert(imx6_pcie->apps_reset); @@ -381,7 +385,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) struct device *dev = pci->dev; int ret = 0; - switch (imx6_pcie->variant) { + switch (imx6_pcie->drvdata->variant) { case IMX6SX: ret = clk_prepare_enable(imx6_pcie->pcie_inbound_axi); if (ret) { @@ -484,7 +488,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) !imx6_pcie->gpio_active_high); } - switch (imx6_pcie->variant) { + switch (imx6_pcie->drvdata->variant) { case IMX7D: reset_control_deassert(imx6_pcie->pciephy_reset); imx7d_pcie_wait_for_phy_pll_lock(imx6_pcie); @@ -522,7 +526,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) { - switch (imx6_pcie->variant) { + switch (imx6_pcie->drvdata->variant) { case IMX7D: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); @@ -644,7 +648,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) { struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); - switch (imx6_pcie->variant) { + switch (imx6_pcie->drvdata->variant) { case IMX6Q: case IMX6SX: case IMX6QP: @@ -697,7 +701,7 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie) tmp |= PORT_LOGIC_SPEED_CHANGE; dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, tmp); - if (imx6_pcie->variant != IMX7D) { + if (imx6_pcie->drvdata->variant != IMX7D) { /* * On i.MX7, DIRECT_SPEED_CHANGE behaves differently * from i.MX6 family when no link speed transition @@ -794,7 +798,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) { struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); - switch (imx6_pcie->variant) { + switch (imx6_pcie->drvdata->variant) { case IMX6SX: case IMX6QP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -820,7 +824,7 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) } /* Others poke directly at IOMUXC registers */ - switch (imx6_pcie->variant) { + switch (imx6_pcie->drvdata->variant) { case IMX6SX: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF, @@ -850,7 +854,7 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) clk_disable_unprepare(imx6_pcie->pcie_phy); clk_disable_unprepare(imx6_pcie->pcie_bus); - switch (imx6_pcie->variant) { + switch (imx6_pcie->drvdata->variant) { case IMX6SX: clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); break; @@ -866,8 +870,8 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) static inline bool imx6_pcie_supports_suspend(struct imx6_pcie *imx6_pcie) { - return (imx6_pcie->variant == IMX7D || - imx6_pcie->variant == IMX6SX); + return (imx6_pcie->drvdata->variant == IMX7D || + imx6_pcie->drvdata->variant == IMX6SX); } static int imx6_pcie_suspend_noirq(struct device *dev) @@ -933,8 +937,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) pci->ops = &dw_pcie_ops; imx6_pcie->pci = pci; - imx6_pcie->variant = - (enum imx6_pcie_variants)of_device_get_match_data(dev); + imx6_pcie->drvdata = of_device_get_match_data(dev); dbi_base = platform_get_resource(pdev, IORESOURCE_MEM, 0); pci->dbi_base = devm_ioremap_resource(dev, dbi_base); @@ -978,7 +981,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) return PTR_ERR(imx6_pcie->pcie); } - switch (imx6_pcie->variant) { + switch (imx6_pcie->drvdata->variant) { case IMX6SX: imx6_pcie->pcie_inbound_axi = devm_clk_get(dev, "pcie_inbound_axi"); @@ -1084,11 +1087,26 @@ static void imx6_pcie_shutdown(struct platform_device *pdev) imx6_pcie_assert_core_reset(imx6_pcie); } +static const struct imx6_pcie_drvdata drvdata[] = { + [IMX6Q] = { + .variant = IMX6Q, + }, + [IMX6SX] = { + .variant = IMX6SX, + }, + [IMX6QP] = { + .variant = IMX6QP, + }, + [IMX7D] = { + .variant = IMX7D, + }, +}; + static const struct of_device_id imx6_pcie_of_match[] = { - { .compatible = "fsl,imx6q-pcie", .data = (void *)IMX6Q, }, - { .compatible = "fsl,imx6sx-pcie", .data = (void *)IMX6SX, }, - { .compatible = "fsl,imx6qp-pcie", .data = (void *)IMX6QP, }, - { .compatible = "fsl,imx7d-pcie", .data = (void *)IMX7D, }, + { .compatible = "fsl,imx6q-pcie", .data = &drvdata[IMX6Q], }, + { .compatible = "fsl,imx6sx-pcie", .data = &drvdata[IMX6SX], }, + { .compatible = "fsl,imx6qp-pcie", .data = &drvdata[IMX6QP], }, + { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], }, {}, }; From patchwork Sat Feb 2 00:15:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 10793857 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DAA9513B4 for ; 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[24.22.235.96]) by smtp.gmail.com with ESMTPSA id w6sm28374545pga.72.2019.02.01.16.15.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Feb 2019 16:15:37 -0800 (PST) From: Andrey Smirnov To: Lorenzo Pieralisi Cc: Andrey Smirnov , Trent Piepho , Lucas Stach , Bjorn Helgaas , Fabio Estevam , Chris Healy , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v7 2/4] PCI: imx6: Mark PHY functions as i.MX6 specific Date: Fri, 1 Feb 2019 16:15:21 -0800 Message-Id: <20190202001523.12517-3-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190202001523.12517-1-andrew.smirnov@gmail.com> References: <20190202001523.12517-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PCIe PHY IP block on i.MX7D differs from the one used on i.MX6 family, so none of the code in current implementation of imx6_setup_phy_mpll() or imx6_pcie_reset_phy() is applicable. Introduce IMX6_PCIE_FLAG_IMX6_PHY and checks for it to aforementioned functions to make sure they are only executed on apporpriate PCIe IP variants. Tested-by: Trent Piepho Signed-off-by: Andrey Smirnov Reviewed-by: Lucas Stach Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org --- drivers/pci/controller/dwc/pci-imx6.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 1e940ba7e4c4..26e1e974b0dd 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -41,8 +41,11 @@ enum imx6_pcie_variants { IMX7D, }; +#define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) + struct imx6_pcie_drvdata { enum imx6_pcie_variants variant; + u32 flags; }; struct imx6_pcie { @@ -255,6 +258,9 @@ static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie) { u32 tmp; + if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) + return; + pcie_phy_read(imx6_pcie, PHY_RX_OVRD_IN_LO, &tmp); tmp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN | PHY_RX_OVRD_IN_LO_RX_PLL_EN); @@ -572,6 +578,9 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie) int mult, div; u32 val; + if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) + return 0; + switch (phy_rate) { case 125000000: /* @@ -1090,12 +1099,15 @@ static void imx6_pcie_shutdown(struct platform_device *pdev) static const struct imx6_pcie_drvdata drvdata[] = { [IMX6Q] = { .variant = IMX6Q, + .flags = IMX6_PCIE_FLAG_IMX6_PHY, }, [IMX6SX] = { .variant = IMX6SX, + .flags = IMX6_PCIE_FLAG_IMX6_PHY, }, [IMX6QP] = { .variant = IMX6QP, + .flags = IMX6_PCIE_FLAG_IMX6_PHY, }, [IMX7D] = { .variant = IMX7D, From patchwork Sat Feb 2 00:15:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 10793851 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 00D0113B4 for ; Sat, 2 Feb 2019 00:15:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E58553314E for ; Sat, 2 Feb 2019 00:15:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D961333151; Sat, 2 Feb 2019 00:15:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 718B53314E for ; Sat, 2 Feb 2019 00:15:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726658AbfBBAPm (ORCPT ); Fri, 1 Feb 2019 19:15:42 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:35905 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727417AbfBBAPk (ORCPT ); Fri, 1 Feb 2019 19:15:40 -0500 Received: by mail-pg1-f195.google.com with SMTP id n2so3691977pgm.3; Fri, 01 Feb 2019 16:15:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Yd2+XR0UA7pRXNwABMnDIgYdZjl0Ef+YMaD3CGi30fw=; b=QpRe5KqqiD85JDv27e4U53jb/4XchwvvgEezZfwQAoKV2ZeatiFmCrOEgBmIAu9XnY 2TYEHB9KGZQEhV72QR4C5/UnSovwFwEHa18raZUuO0/L+jPHEOLNj2OOCYdISv+rGJYh xhWYfg5trel7TlWLKMovEU69hPZvGUAJJIxZqaL/SjFe2nTPilg3o7WJ82Lcx7rYjpFt v1sOk7c4GFCFajLMssrYLgv/+UCk1R16xQItZT5YyCXhEDzh5CQc7v9PZD1vEUQzbHyt 3F7vW103YP97IQ8G8DLbPeSadMqNtq46wRdYTogXExdzM5QK1h1JZLEeWeVay7W89CkB Ox2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Yd2+XR0UA7pRXNwABMnDIgYdZjl0Ef+YMaD3CGi30fw=; b=oa6EV2zsnJL2JoFVVjDuqPq+200tW3YLO/ARGxGSNyCYPdcC1rtCUW/89tDCQ775TK 80UDke3E+ZiyRSELzN3ibCn86qUzGFfUdxan6e1rEiviW+Vsmg+8S4CNyrCZQL913wjS WfKxUnyGZImYgfVm6yZGJFNGw2YhERAtex28vhXFVA+bq/pOk9IK9MMmNwk9xWD3xyrk J1ho/bhTyLYjgCXu51bV87euYUadTc+DG7drw+1jp00SrPAjwM30/Gu43dM3iAEslir6 /3TZk3laAJbj2oo7gKaCJ9SiRXudUYFKqNxmC4UwiijucujnnbQKgKQ6Y/NdTC5OevKd gbWg== X-Gm-Message-State: AHQUAuYPnTfxFgfntJ1ojF/wwaXjDGTLqhE+AFWFsq5EsFRT48n6Epx6 +r3mziEEuxV7YSW8vxXYGZw= X-Google-Smtp-Source: AHgI3Ialmns9vf81P5vAzECyruePRiN7VmO1ORw9BhKVifPxgaRTc7BbAtwe5QHFhHliNwHdy6KwGA== X-Received: by 2002:a63:5455:: with SMTP id e21mr4439654pgm.316.1549066539641; Fri, 01 Feb 2019 16:15:39 -0800 (PST) Received: from squirtle.lan (c-24-22-235-96.hsd1.wa.comcast.net. [24.22.235.96]) by smtp.gmail.com with ESMTPSA id w6sm28374545pga.72.2019.02.01.16.15.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Feb 2019 16:15:38 -0800 (PST) From: Andrey Smirnov To: Lorenzo Pieralisi Cc: Andrey Smirnov , Lucas Stach , Bjorn Helgaas , Fabio Estevam , Chris Healy , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v7 3/4] PCI: imx6: Convert DIRECT_SPEED_CHANGE quirk code to use a flag Date: Fri, 1 Feb 2019 16:15:22 -0800 Message-Id: <20190202001523.12517-4-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190202001523.12517-1-andrew.smirnov@gmail.com> References: <20190202001523.12517-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Both i.MX7D and i.MX8MQ have the same behaviour when it comes to clearing DIRECT_SPEED_CHANGE bit when no speed change occur. To account for that change the code handling that to use a generic flag instead of checking IP block variant. Signed-off-by: Andrey Smirnov Reviewed-by: Lucas Stach Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org --- drivers/pci/controller/dwc/pci-imx6.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 26e1e974b0dd..11b73d733dae 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -42,6 +42,7 @@ enum imx6_pcie_variants { }; #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) +#define IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE BIT(1) struct imx6_pcie_drvdata { enum imx6_pcie_variants variant; @@ -710,7 +711,8 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie) tmp |= PORT_LOGIC_SPEED_CHANGE; dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, tmp); - if (imx6_pcie->drvdata->variant != IMX7D) { + if (imx6_pcie->drvdata->flags & + IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE) { /* * On i.MX7, DIRECT_SPEED_CHANGE behaves differently * from i.MX6 family when no link speed transition @@ -1099,15 +1101,18 @@ static void imx6_pcie_shutdown(struct platform_device *pdev) static const struct imx6_pcie_drvdata drvdata[] = { [IMX6Q] = { .variant = IMX6Q, - .flags = IMX6_PCIE_FLAG_IMX6_PHY, + .flags = IMX6_PCIE_FLAG_IMX6_PHY | + IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE, }, [IMX6SX] = { .variant = IMX6SX, - .flags = IMX6_PCIE_FLAG_IMX6_PHY, + .flags = IMX6_PCIE_FLAG_IMX6_PHY | + IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE, }, [IMX6QP] = { .variant = IMX6QP, - .flags = IMX6_PCIE_FLAG_IMX6_PHY, + .flags = IMX6_PCIE_FLAG_IMX6_PHY | + IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE, }, [IMX7D] = { .variant = IMX7D, From patchwork Sat Feb 2 00:15:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 10793855 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 95B3F746 for ; Sat, 2 Feb 2019 00:15:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 854883314E for ; Sat, 2 Feb 2019 00:15:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7923C33151; Sat, 2 Feb 2019 00:15:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A0E3A3314E for ; Sat, 2 Feb 2019 00:15:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727417AbfBBAPt (ORCPT ); Fri, 1 Feb 2019 19:15:49 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:44832 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726740AbfBBAPm (ORCPT ); Fri, 1 Feb 2019 19:15:42 -0500 Received: by mail-pf1-f193.google.com with SMTP id u6so4006219pfh.11; Fri, 01 Feb 2019 16:15:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+V3m+R4Z9ojnTs9h00XX9PhmXqogAjMhmuyUa8cKNeo=; b=nchCTLIJNLEGiaMsFjhng8Srf/qrwT110j633Xud76hhQA2xR0aKltgVTn+5TkHxAV Gt6aI+4sR8ixTNU8GOCJ34SDqvu/s0GJEun8dsrRixl2prVJ+65jZqONegsHyqrt45GQ IvW6FhafDCPZbErDcW9rgkcBhCt7iAxYk9vKSsu9Q2ONYqXBoIgZecaVotvztBDb9FSp 7i4Gy+NQYrISP7mNdtSJRunt5w2uiNXozTJR3zMSP2TrpTl1XRlX5Ilw2EIYXMAs2Dgi kUm0zGyS4Yhy3RFZLmxJFvbNMNHNQ1WzNutJrykurAcmvMhfEcX/lbC52BgScFfYvccS xX3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+V3m+R4Z9ojnTs9h00XX9PhmXqogAjMhmuyUa8cKNeo=; b=kjgqGEWdMRk4LlNN1fM5vKUO74HyFZtLOjyj5AgZrszFQfu3PekrZp0pQBQSWr0zLH N3f0k8sKh/tZmK4wsERsZZ6s6kyUwuAsTrwfkVu8V2VfgZfHp3cFp+xwIEklapRm1u1e 0NEE3e8BUcju5LuntN+y2FoMScNdnOKUIL/RB1Y2jN8XALmXFVXFcLcn43xQyHKTtVa3 pgC5febXXwKY+TSLXadmGMZDMzYfT0c5y6pU+FppPSIiE/Q+lDwjpTA3IC471eUaVdud RbscBYp40IMrLtrfNrSDqiGx8zJdq6TWaEsFrk0w7fLaUbq0KPCtAdUi94nd2tqbFjtn dOmA== X-Gm-Message-State: AHQUAuY6KJNPjUhIv4DmZIRBoCmjwRlnxcqfQLbIa0q/lhZiC8JhkgVt APvs2Z6JzY9OPIPC4uVroPU= X-Google-Smtp-Source: AHgI3Ib7ckfWoX+1YXRgfJMiGV3ZTWlircVFiXnvYU6kpG+/1GnxNkcq97ZJJ60zdyS6tD7ub7uvyw== X-Received: by 2002:a63:a002:: with SMTP id r2mr4325154pge.212.1549066541270; Fri, 01 Feb 2019 16:15:41 -0800 (PST) Received: from squirtle.lan (c-24-22-235-96.hsd1.wa.comcast.net. [24.22.235.96]) by smtp.gmail.com with ESMTPSA id w6sm28374545pga.72.2019.02.01.16.15.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Feb 2019 16:15:40 -0800 (PST) From: Andrey Smirnov To: Lorenzo Pieralisi Cc: Andrey Smirnov , Lucas Stach , Bjorn Helgaas , Fabio Estevam , Chris Healy , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v7 4/4] PCI: imx6: Add support for i.MX8MQ Date: Fri, 1 Feb 2019 16:15:23 -0800 Message-Id: <20190202001523.12517-5-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190202001523.12517-1-andrew.smirnov@gmail.com> References: <20190202001523.12517-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add code needed to support i.MX8MQ variant. Signed-off-by: Andrey Smirnov Reviewed-by: Lucas Stach Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org --- .../bindings/pci/fsl,imx6q-pcie.txt | 3 +- drivers/pci/controller/dwc/Kconfig | 4 +- drivers/pci/controller/dwc/pci-imx6.c | 77 ++++++++++++++++++- 3 files changed, 79 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index d514c1f2365f..920ca93870a8 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -9,6 +9,7 @@ Required properties: - "fsl,imx6sx-pcie", - "fsl,imx6qp-pcie" - "fsl,imx7d-pcie" + - "fsl,imx8mq-pcie" - reg: base address and length of the PCIe controller - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. @@ -45,7 +46,7 @@ Additional required properties for imx6sx-pcie: PCIE_PHY power domains - power-domain-names: Must be "pcie", "pcie_phy" -Additional required properties for imx7d-pcie: +Additional required properties for imx7d-pcie and imx8mq-pcie: - power-domains: Must be set to a phandle pointing to PCIE_PHY power domain - resets: Must contain phandles to PCIe-related reset lines exposed by SRC IP block diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index 548c58223868..6ea74b1c0d94 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -89,8 +89,8 @@ config PCI_EXYNOS select PCIE_DW_HOST config PCI_IMX6 - bool "Freescale i.MX6/7 PCIe controller" - depends on SOC_IMX6Q || SOC_IMX7D || (ARM && COMPILE_TEST) + bool "Freescale i.MX6/7/8 PCIe controller" + depends on SOC_IMX6Q || SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST depends on PCI_MSI_IRQ_DOMAIN select PCIE_DW_HOST diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 11b73d733dae..c1d434ba3642 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -8,6 +8,7 @@ * Author: Sean Cross */ +#include #include #include #include @@ -32,6 +33,12 @@ #include "pcie-designware.h" +#define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) +#define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN BIT(10) +#define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11) +#define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE GENMASK(11, 8) +#define IMX8MQ_PCIE2_BASE_ADDR 0x33c00000 + #define to_imx6_pcie(x) dev_get_drvdata((x)->dev) enum imx6_pcie_variants { @@ -39,6 +46,7 @@ enum imx6_pcie_variants { IMX6SX, IMX6QP, IMX7D, + IMX8MQ, }; #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) @@ -58,6 +66,7 @@ struct imx6_pcie { struct clk *pcie_inbound_axi; struct clk *pcie; struct regmap *iomuxc_gpr; + u32 controller_id; struct reset_control *pciephy_reset; struct reset_control *apps_reset; struct reset_control *turnoff_reset; @@ -275,6 +284,7 @@ static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie) pcie_phy_write(imx6_pcie, PHY_RX_OVRD_IN_LO, tmp); } +#ifdef CONFIG_ARM /* Added for PCI abort handling */ static int imx6q_pcie_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs) @@ -308,6 +318,7 @@ static int imx6q_pcie_abort_handler(unsigned long addr, return 1; } +#endif static int imx6_pcie_attach_pd(struct device *dev) { @@ -352,6 +363,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) switch (imx6_pcie->drvdata->variant) { case IMX7D: + case IMX8MQ: reset_control_assert(imx6_pcie->pciephy_reset); reset_control_assert(imx6_pcie->apps_reset); break; @@ -386,10 +398,17 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) } } +static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) +{ + WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ); + return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; +} + static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; struct device *dev = pci->dev; + unsigned int offset; int ret = 0; switch (imx6_pcie->drvdata->variant) { @@ -420,6 +439,19 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) break; case IMX7D: break; + case IMX8MQ: + offset = imx6_pcie_grp_offset(imx6_pcie); + /* + * Set the over ride low and enabled + * make sure that REF_CLK is turned on. + */ + regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, + IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE, + 0); + regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, + IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN, + IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN); + break; } return ret; @@ -496,6 +528,9 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) } switch (imx6_pcie->drvdata->variant) { + case IMX8MQ: + reset_control_deassert(imx6_pcie->pciephy_reset); + break; case IMX7D: reset_control_deassert(imx6_pcie->pciephy_reset); imx7d_pcie_wait_for_phy_pll_lock(imx6_pcie); @@ -531,9 +566,37 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) } } +static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie) +{ + unsigned int mask, val; + + if (imx6_pcie->drvdata->variant == IMX8MQ && + imx6_pcie->controller_id == 1) { + mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; + val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, + PCI_EXP_TYPE_ROOT_PORT); + } else { + mask = IMX6Q_GPR12_DEVICE_TYPE; + val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, + PCI_EXP_TYPE_ROOT_PORT); + } + + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); +} + static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) { switch (imx6_pcie->drvdata->variant) { + case IMX8MQ: + /* + * TODO: Currently this code assumes external + * oscillator is being used + */ + regmap_update_bits(imx6_pcie->iomuxc_gpr, + imx6_pcie_grp_offset(imx6_pcie), + IMX8MQ_GPR_PCIE_REF_USE_PAD, + IMX8MQ_GPR_PCIE_REF_USE_PAD); + break; case IMX7D: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); @@ -569,8 +632,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) break; } - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6Q_GPR12_DEVICE_TYPE, PCI_EXP_TYPE_ROOT_PORT << 12); + imx6_pcie_configure_type(imx6_pcie); } static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie) @@ -667,6 +729,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) IMX6Q_GPR12_PCIE_CTL_2); break; case IMX7D: + case IMX8MQ: reset_control_deassert(imx6_pcie->apps_reset); break; } @@ -1002,6 +1065,10 @@ static int imx6_pcie_probe(struct platform_device *pdev) } break; case IMX7D: + case IMX8MQ: + if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) + imx6_pcie->controller_id = 1; + imx6_pcie->pciephy_reset = devm_reset_control_get_exclusive(dev, "pciephy"); if (IS_ERR(imx6_pcie->pciephy_reset)) { @@ -1117,6 +1184,9 @@ static const struct imx6_pcie_drvdata drvdata[] = { [IMX7D] = { .variant = IMX7D, }, + [IMX8MQ] = { + .variant = IMX8MQ, + }, }; static const struct of_device_id imx6_pcie_of_match[] = { @@ -1124,6 +1194,7 @@ static const struct of_device_id imx6_pcie_of_match[] = { { .compatible = "fsl,imx6sx-pcie", .data = &drvdata[IMX6SX], }, { .compatible = "fsl,imx6qp-pcie", .data = &drvdata[IMX6QP], }, { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], }, + { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], } , {}, }; @@ -1140,6 +1211,7 @@ static struct platform_driver imx6_pcie_driver = { static int __init imx6_pcie_init(void) { +#ifdef CONFIG_ARM /* * Since probe() can be deferred we need to make sure that * hook_fault_code is not called after __init memory is freed @@ -1149,6 +1221,7 @@ static int __init imx6_pcie_init(void) */ hook_fault_code(8, imx6q_pcie_abort_handler, SIGBUS, 0, "external abort on non-linefetch"); +#endif return platform_driver_register(&imx6_pcie_driver); }